Patents by Inventor Ken Tokashiki

Ken Tokashiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20100062613
    Abstract: A method of processing a substrate using plasma includes loading a substrate into a chamber, processing the substrate with a first plasma mode and then processing the substrate with a second plasma mode, wherein at least one of the first plasma mode and the second plasma mode is a time-modulation mode in which a plasma induced in the chamber is periodically turned on and off to reduce plasma-induced damage in the substrate.
    Type: Application
    Filed: May 21, 2009
    Publication date: March 11, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yoon-jae Kim, Yong-jin Kim, Ken Tokashiki, Keun-hee Bai
  • Publication number: 20030190807
    Abstract: A film containing low dielectric constant MSQ is used for an interlayer insulation film, an opening is provided in the MSQ by use of a resist as a mask, and resist is ashed while the MSQ is exposed. Ashing conditions in this case are set to a low temperature (−20° C. to 60° C.) and lower pressure (5 to 200 mTorr), and RF supply is carried out in the order of bias power and source power. Thus, a CH3 group which determines a low dielectric constant characteristic of the MSQ can be left in the film.
    Type: Application
    Filed: April 8, 2003
    Publication date: October 9, 2003
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Eiichi Soda, Ken Tokashiki, Atsushi Nishizawa
  • Publication number: 20030114015
    Abstract: There is provided a method of fabricating a semiconductor device, including the steps of (a) generating plasma in the following conditions: (a1) an RF bias voltage has a frequency equal to or greater than 1 MHz, (a2) an RF source voltage has a frequency equal to or greater than 1 MHz, (a3) the RF source voltage is modulated by pulses in a cycle equal to or greater than 100 &mgr;sec, and (a4) pulse-on time is equal to or greater than 50 &mgr;sec, and (b) patterning multi-layered metal wirings by etching through the plasma The method makes it possible to reduce charging damage to a gate insulating film, even if wirings are further spaced away from adjacent ones and/or an antenna ratio of multi-layered metal wirings is further increased.
    Type: Application
    Filed: January 28, 2002
    Publication date: June 19, 2003
    Inventor: Ken Tokashiki
  • Publication number: 20020119677
    Abstract: A semiconductor device manufacturing method according to the invention includes a process for forming an insulating film made of organic material the dielectric constant of which is low and which has a relative dielectric constant lower than that of silicon oxide on a semiconductor substrate, a process for forming a resist film having an opening on the insulating film, a process for dry-etching the insulating film using the resist film as a mask and a process for removing at least a part of the resist film by ashing using the plasma of mixed gas including nitrogen and hydrogen.
    Type: Application
    Filed: February 26, 2002
    Publication date: August 29, 2002
    Inventors: Eiichi Soda, Ken Tokashiki, Atsushi Nishizawa, Hidetaka Nanbu
  • Publication number: 20020119669
    Abstract: A high-dielectric-constant film etching method realizing a high etching rate and, moreover, etching of a highly anisotropic shape is provided. At the time of etching a high-dielectric-constant film, a mask made of an inorganic material is used, a mixed gas of a fluorine gas or fluorine compound gas and an inert gas is used as an etching gas, gaseous oxygen is added to the mixed gas, and the high-dielectric-constant film is etched with the resultant gas.
    Type: Application
    Filed: February 21, 2002
    Publication date: August 29, 2002
    Applicant: NEC Corporation
    Inventors: Yasuhiro Ono, Ken Tokashiki
  • Patent number: 6391772
    Abstract: A method for forming interconnects of a semiconductor device in which an amount of the fluorocarbon-based gas in an etching gas is adjusted to form a side-wall film which has a film thickness not less than a critical film thickness. In the present invention, the damage of a gate electrode and a gate dielectric film, due to charging imbalance caused by an electron shading effect during the etching of an interconnect layer, can be prevented.
    Type: Grant
    Filed: August 9, 2000
    Date of Patent: May 21, 2002
    Assignee: NEC Corporation
    Inventors: Ken Tokashiki, Eiichi Soda
  • Patent number: 6372654
    Abstract: There is provided a method of fabricating a semiconductor device, including the steps of (a) generating plasma in the following conditions: (a1) an RF bias voltage has a frequency equal to or greater than 1 MHz, (a2) an RF source voltage has a frequency equal to or greater than 1 MHz, (a3) the RF source voltage is modulated by pulses in a cycle equal to or greater than 100 &mgr;sec, and (a4) pulse-on time is equal to or greater than 50 &mgr;sec, and (b) patterning multi-layered metal wirings by etching through the plasma The method makes it possible to reduce charging damage to a gate insulating film, even if wirings are further spaced away from adjacent ones and/or an antenna ratio of multi-layered metal wirings is further increased.
    Type: Grant
    Filed: April 5, 2000
    Date of Patent: April 16, 2002
    Assignee: NEC Corporation
    Inventor: Ken Tokashiki
  • Publication number: 20010055884
    Abstract: A photo-resist having a predetermined pattern is formed on a top surface of a Pt layer. Next, the Pt layer is dry-etched by using a mixture of Cl2 and Ar as an etching gas. In this case, etching by-products are deposited on both side surfaces of the photo-resist and the Pt layer is shaped into an electrode. Then, the photo-resist which has become unnecessary after the Pt layer is dry etched is ashed and stripped by oxygen plasma. A Si substrate on which the etching by-products are deposited is soaked in a mixing solution composed of acetoacetylacetone, ammonia and DI water. The etching by-products are easily dissolved and removed.
    Type: Application
    Filed: June 5, 2001
    Publication date: December 27, 2001
    Inventor: Ken Tokashiki
  • Patent number: 5624583
    Abstract: A method of manufacturing a semiconductor device containing a ruthenium oxide includes the step of dry-etching the ruthenium oxide using a gas mixture containing oxygen or ozone gas and at least one material selected from the group consisting of fluorine gas, chlorine gas, bromine gas, iodine gas, a halogen gas containing at least one of the fluorine, chlorine, bromine, and iodine gases, and a hydrogen halide.
    Type: Grant
    Filed: September 6, 1995
    Date of Patent: April 29, 1997
    Assignee: NEC Corporation
    Inventors: Ken Tokashiki, Kiyoyuki Sato