Patents by Inventor Kenichi Aoyagi

Kenichi Aoyagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10190044
    Abstract: A method for producing a ?-sialon fluorescent material can be provided. The method includes preparing a composition containing silicon nitride that contains aluminium, an oxygen atom, and europium, heat-treating the composition in a rare gas atmosphere or in a vacuum, and contacting the heat-treated composition with a gas containing elemental fluorine.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: January 29, 2019
    Assignee: NICHIA CORPORATION
    Inventors: Shoji Hosokawa, Motoharu Morikawa, Tadayoshi Yanagihara, Kenichi Aoyagi, Takashi Kaide
  • Patent number: 10134795
    Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: November 20, 2018
    Assignee: Sony Corporation
    Inventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
  • Patent number: 10093855
    Abstract: A method for producing a ?-sialon fluorescent material is provided. The method includes heat-treating a mixture containing an aluminum compound, a first europium compound, and silicon nitride to obtain a first heat-treated product; and heat-treating the first heat-treated product with a second europium compound in a rare gas atmosphere to obtain a second heat-treated product.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: October 9, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Kenichi Aoyagi, Takashi Kaide, Motoharu Morikawa, Shoji Hosokawa
  • Publication number: 20180286911
    Abstract: The present technology relates to a semiconductor device and a solid-state imaging device of which crack resistance can be improved in a simpler way. The semiconductor device has an upper substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and a second substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and is joined to the upper substrate. In addition, a pad for wire bonding or probing is formed in the upper substrate, and pads for protecting corner or side parts of the pad for wire bonding or probing are radially laminated and provided in each of the wiring layers between the pad and the Si substrate of the lower substrate. The present technology can be applied to a solid-state imaging device.
    Type: Application
    Filed: June 6, 2018
    Publication date: October 4, 2018
    Applicant: Sony Corporation
    Inventors: Yoshihisa KAGAWA, Nobutoshi FUJII, Masanaga FUKASAWA, Tokihisa KANEGUCHI, Yoshiya HAGIMOTO, Kenichi AOYAGI, Ikue MITSUHASHI
  • Publication number: 20180277585
    Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.
    Type: Application
    Filed: May 30, 2018
    Publication date: September 27, 2018
    Inventors: Yoshihisa Kagawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
  • Publication number: 20180277528
    Abstract: A display unit is provided, on a substrate, with a first wiring layer and a device section. The device section has a plurality of pixels. The device section includes, in each of the pixels, a light-emitting device section and a drive device. The light-emitting device section includes a light-emitting device and a light-emitting surface. The drive device drives the light-emitting device section and is electrically coupled to the light-emitting device section through the first wiring layer. An end of the light-emitting surface of the light-emitting device section is disposed at a position as high as an upper end of the drive device, or at a position higher than the upper end.
    Type: Application
    Filed: December 16, 2015
    Publication date: September 27, 2018
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Toshiaki Hasegawa, Kenichi Aoyagi, Nobutatsu Araki, Tsuyoshi Jyouno, Katsunori Ootsubo, Yoshiya Flagimoto, Yasuhiro Mizuma
  • Publication number: 20180269248
    Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.
    Type: Application
    Filed: May 23, 2018
    Publication date: September 20, 2018
    Applicant: Sony Corporation
    Inventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
  • Publication number: 20180241960
    Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.
    Type: Application
    Filed: April 24, 2018
    Publication date: August 23, 2018
    Applicant: SONY CORPORATION
    Inventors: Masaki SAKAKIBARA, Kenichi AOYAGI, Seiji YAMADA
  • Patent number: 10048427
    Abstract: There is provided a display device including a plurality of light-emitting elements that are disposed on a first substrate, and a guide member that is disposed in a boundary between pixel regions corresponding to the light-emitting elements and guides light emitted from each of the light-emitting elements between the first substrate and a second substrate facing the first substrate in a main light emission direction of each of the light-emitting elements.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: August 14, 2018
    Assignee: JOLED Inc.
    Inventors: Kenichi Aoyagi, Hayato Iwamoto
  • Patent number: 10038024
    Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: July 31, 2018
    Assignee: Sony Corporation
    Inventors: Yoshihisa Kagawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
  • Patent number: 10026769
    Abstract: The present technology relates to a semiconductor device and a solid-state imaging device of which crack resistance can be improved in a simpler way. The semiconductor device has an upper substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and a second substrate that is constituted by a Si substrate and wiring layers laminated on the Si substrate and is joined to the upper substrate. In addition, a pad for wire bonding or probing is formed in the upper substrate, and pads for protecting corner or side parts of the pad for wire bonding or probing are radially laminated and provided in each of the wiring layers between the pad and the Si substrate of the lower substrate. The present technology can be applied to a solid-state imaging device.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: July 17, 2018
    Assignee: Sony Corporation
    Inventors: Yoshihisa Kagawa, Nobutoshi Fujii, Masanaga Fukasawa, Tokihisa Kaneguchi, Yoshiya Hagimoto, Kenichi Aoyagi, Ikue Mitsuhashi
  • Patent number: 10021331
    Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: July 10, 2018
    Assignee: Sony Corporation
    Inventors: Masaki Sakakibara, Kenichi Aoyagi, Seiji Yamada
  • Patent number: 9941326
    Abstract: The present technology includes: bonding a device formation side of a first substrate having a first device and a device formation side of a second substrate having a second device in opposition to each other; forming a protective film on at least an edge of the second substrate having the second device; and reducing a thickness of the first substrate.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: April 10, 2018
    Assignee: SONY CORPORATION
    Inventors: Nobutoshi Fujii, Kenichi Aoyagi, Yoshiya Hagimoto, Hayato Iwamoto
  • Patent number: 9911778
    Abstract: Disclosed herein is a semiconductor device, including: a first substrate including a first electrode, and a first insulating film configured from a diffusion preventing material for the first electrode and covering a periphery of the first electrode, the first electrode and the first insulating film cooperating with each other to configure a bonding face; and a second substrate bonded to and provided on the first substrate and including a second electrode joined to the first electrode, and a second insulating film configured from a diffusion preventing material for the second electrode and covering a periphery of the second electrode, the second electrode and the second insulating film cooperating with each other to configure a bonding face to the first substrate.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: March 6, 2018
    Assignee: Sony Corporation
    Inventors: Yoshihisa Kagawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
  • Publication number: 20180045383
    Abstract: An electronic component mounting substrate 10A is configured of an electronic component 20, and a mounting substrate 10 mounting the electronic component 20 thereon, in which concave parts 24 are formed on a mounting surface 23 of the electronic component 20 opposite to the mounting substrate 10, a connection part 39 is exposed at the bottom of the concave part 24, and electronic component attachment parts 12 provided on the mounting substrate 10 are soldered to the connection parts 39 provided in the electronic component 20.
    Type: Application
    Filed: January 27, 2016
    Publication date: February 15, 2018
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Toshiaki Hasegawa, Kenichi Aoyagi, Yoshiya Hagimoto, Nobutoshi Fujii
  • Publication number: 20170354199
    Abstract: There is provided a semiconductor device, including a semiconductor substrate, an interlayer insulating layer formed on the semiconductor substrate, a bonding electrode formed on a surface of the interlayer insulating layer, and a metal film which covers an entire surface of a bonding surface including the interlayer insulating layer and the bonding electrode.
    Type: Application
    Filed: June 27, 2017
    Publication date: December 14, 2017
    Inventors: Yoshiya Hagimoto, Nobutoshi Fujii, Kenichi Aoyagi
  • Publication number: 20170342321
    Abstract: Provided is a method of producing a ?-sialon fluorescent material having a high light emission intensity and an excellent light emission luminance. The method includes preparing a calcined product having a composition of ?-sialon containing an activating element; grinding the calcined product to obtain a ground product; and heat-treating the ground product to obtain a heat-treated product. A specific surface area of the ground product is 0.2 m2/g or more.
    Type: Application
    Filed: May 26, 2017
    Publication date: November 30, 2017
    Applicant: NICHIA CORPORATION
    Inventors: Kenichi AOYAGI, Takashi KAIDE, Motoharu MORIKAWA, Shoji HOSOKAWA
  • Publication number: 20170272678
    Abstract: The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.
    Type: Application
    Filed: July 1, 2015
    Publication date: September 21, 2017
    Inventors: Masaki SAKAKIBARA, Kenichi AOYAGI, Seiji YAMADA
  • Publication number: 20170263666
    Abstract: A semiconductor device includes a first substrate having an attaching surface on which first electrodes and a first insulating film are exposed, an insulating thin film that covers the attaching surface of the first substrate, and a second substrate which has an attaching surface on which second electrodes and a second insulating film are exposed and is attached to the first substrate in a state in which the attaching surface of the second substrate and the attaching surface of the first substrate are attached together sandwiching the insulating thin film therebetween, and the first electrodes and the second electrodes deform and break a part of the insulating thin film so as to be directly electrically connected to each other.
    Type: Application
    Filed: May 30, 2017
    Publication date: September 14, 2017
    Inventors: Nobutoshi Fujii, Yoshiya Hagimoto, Kenichi Aoyagi, Yoshihisa Kagawa
  • Patent number: 9716076
    Abstract: There is provided a semiconductor device, including a semiconductor substrate, an interlayer insulating layer formed on the semiconductor substrate, a bonding electrode formed on a surface of the interlayer insulating layer, and a metal film which covers an entire surface of a bonding surface including the interlayer insulating layer and the bonding electrode.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: July 25, 2017
    Assignee: Sony Corporation
    Inventors: Yoshiya Hagimoto, Nobutoshi Fujii, Kenichi Aoyagi