Patents by Inventor Kenichi Matsushita

Kenichi Matsushita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6822313
    Abstract: A diode has a semiconductor layer of a first conductive type having a first principal plane and a second principal plane facing the first principal plane; a first impurity layer of a second conductive type which is opposite to said first conductive type, said first impurity layer being selectively formed on said first principal plane of said semiconductor layer; a second impurity layer of the first conductive type which is selectively formed on said first principal plane of said semiconductor layer apart from said first impurity layer; a first main electrode connected to said first impurity layer; a second main electrode connected to said second impurity layer; a third impurity layer of the first conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said first impurity layer; a fourth impurity layer of the second conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: November 23, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kenichi Matsushita
  • Publication number: 20030227052
    Abstract: A semiconductor device includes: a semiconductor substrate, at least a surface portion thereof serving as a low-resistance drain layer of a first conductivity type; a first main electrode connected to the low-resistance drain layer; a high-resistance epitaxial layer of a second-conductivity type formed on the low-resistance drain layer; a second-conductivity type base layer selectively formed on the high-resistance epitaxial layer; a first-conductivity type source layer selectively formed in a surface portion of the second-conductivity type base layer; a trench formed in a region sandwiched by the second-conductivity type base layers with a depth extending from the surface of the high-resistance epitaxial layer to the semiconductor substrate; a jfet layer of the first conductivity type formed on side walls of the trench; an insulating layer formed in the trench; an LDD layer of the first-conductivity type formed in a surface portion of the second-conductivity type base layer so as to be connected to the first
    Type: Application
    Filed: March 28, 2003
    Publication date: December 11, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Syotaro Ono, Yoshihiro Yamaguchi, Yusuke Kawaguchi, Kazutoshi Nakamura, Norio Yasuhara, Kenichi Matsushita, Shinichi Hodama, Akio Nakagawa
  • Publication number: 20020140054
    Abstract: A diode has a semiconductor layer of a first conductive type having a first principal plane and a second principal plane facing the first principal plane; a first impurity layer of a second conductive type which is opposite to said first conductive type, said first impurity layer being selectively formed on said first principal plane of said semiconductor layer; a second impurity layer of the first conductive type which is selectively formed on said first principal plane of said semiconductor layer apart from said first impurity layer; a first main electrode connected to said first impurity layer; a second main electrode connected to said second impurity layer; a third impurity layer of the first conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is formed so as to face said first impurity layer; a fourth impurity layer of the second conductive type which is selectively formed on said second principal plane of said semiconductor layer and which is
    Type: Application
    Filed: March 26, 2002
    Publication date: October 3, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kenichi Matsushita
  • Patent number: 5883402
    Abstract: A semiconductor device comprises a main switching element, an electric field detector and an on-voltage application unit. The main switching element includes a high-voltage main electrode, at least a low-voltage main electrode and at least a first gate electrode. The electric field detector has a MOS structure making conductive between the high-voltage main electrode and the first gate electrode in a path other than the main switching element in accordance with a predetermined electric field generated in the main switching element. The on-voltage application unit applies an on-voltage to the first gate electrode on the basis of the conductive state.
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: March 16, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ichiro Omura, Tsuneo Ogura, Kenichi Matsushita, Hideaki Ninomiya
  • Patent number: 5695540
    Abstract: Optical fibers are fixed to elongating tables by optical fiber fixing jigs. Coatings are removed from portions of the fibers and respective fibers of two different groups are placed into tight contact with one another. The fibers are then heated by a gas burner 4A so as to be welded integrally with each other, and are then elongated. In one preferred embodiment, the fibers are arranged such that there are gaps therebetween. These gaps are substantially 250 .mu.m. The gaps are sufficiently wide that heating gas flows in a manner such that all the optical fiber strands are heated uniformly to make it possible uniform welding and elongation.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: December 9, 1997
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Suganuma, Tomoyuki Hattori, Hiroaki Takimoto, Eisuke Sasaoka, Hiroshi Yokota, Kenichi Matsushita
  • Patent number: 5417734
    Abstract: Optical fibers are fixed to elongating tables by optical fiber fixing jigs. Coatings are removed from portions of the fibers and respective fibers of two different groups are placed into tight contact with one another. Rectifier rods, supported movably by rectifier rod supporting members, are disposed outside the optical fiber strands. The fibers are then heated by a gas burner 4A so as to be welded integrally with each other, and are then elongated. By using rectifier rods, the outside optical fiber strands of the groups being welded are not so strongly heated that uniform welding and elongation can be realized. In one preferred embodiment, the fibers are arranged such that there are gaps therebetween. These gaps are substantially 250 .mu.m. The gaps are sufficiently wide that heating gas flows in a manner such that all the optical fiber strands are heated uniformly to make it possible uniform welding and elongation.
    Type: Grant
    Filed: November 4, 1993
    Date of Patent: May 23, 1995
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Suganuma, Tomoyuki Hattori, Hiroaki Takimoto, Eisuke Sasaoka, Hiroshi Yokota, Kenichi Matsushita