Patents by Inventor Kenichi Ohno

Kenichi Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210051304
    Abstract: To provide a video projector which improves visibility in response to changes in projection environment, a video projector has an initial level setter, a level adjuster, a projection display, an image capture, and a projection histogram calculator. The initial level setter performs a prescribed initial level setting on an input video signal and outputs an initial display signal. The level adjuster adjusts the level of the initial display signal on the basis of a projection image and outputs a display signal. The image capture captures the projection image projected on a projection surface by the projection display based on the display signal. The projection histogram calculator prepares a projection histogram for each color. The level adjuster adjusts the level of the initial display signal for each color on the basis of the projection histogram.
    Type: Application
    Filed: February 12, 2019
    Publication date: February 18, 2021
    Applicant: NEC Platforms, Ltd.
    Inventor: Kenichi OHNO
  • Patent number: 10923993
    Abstract: An alignment apparatus is configured to include an alignment mechanism. At least one of first legs or second legs of electric conductors are retained so as to be aligned in an arcuate shape or a circular shape by a plurality of holders that make up the alignment mechanism. Thereafter, the plurality of holders are rotated. Accordingly, the electric conductors, which are aligned in an arcuate or circular shape, are rotated and arranged on the same circumference. In other words, the electric conductors are aligned in an annular shape.
    Type: Grant
    Filed: February 8, 2018
    Date of Patent: February 16, 2021
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Shuhei Okuda, Kenichi Ohno, Kenichi Omagari
  • Publication number: 20210044365
    Abstract: A communication device according to an embodiment is capable of communicating with another communication device via a first network and a second network each transmitting radio signal data by different communication methods. The communication device includes: a first communicator capable of communicating with another communication device via the first network; a second communicator capable of communicating with another communication device via the second network; a delay parameter acquirer to acquire a delay parameter of the first network; and a delay parameter reflector to reflect the delay parameter of the first network acquired by the delay parameter acquirer on a delay parameter of the second network.
    Type: Application
    Filed: July 23, 2020
    Publication date: February 11, 2021
    Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA INFRASTRUCTURE SYSTEMS & SOLUTIONS CORPORATION
    Inventors: Kenichi OHNO, Toshihiro TANGO, Takahiro YAMAURA
  • Patent number: 10910218
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: February 2, 2021
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Yasuhiro Kimura, Yoichiro Mitani
  • Publication number: 20200392626
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on aerospace components and methods for depositing the protective coatings. In one or more embodiments, a method for producing a protective coating on an aerospace component includes depositing a metal oxide template layer on the aerospace component containing nickel and aluminum (e.g., nickel-aluminum superalloy) and heating the aerospace component containing the metal oxide template layer during a thermal process and/or an oxidation process. The thermal process and/or oxidation process includes diffusing aluminum contained within the aerospace component towards a surface of the aerospace component containing the metal oxide template layer, oxidizing the diffused aluminum to produce an aluminum oxide layer disposed between the aerospace component and the metal oxide template layer, and removing at least a portion of the metal oxide template layer while leaving the aluminum oxide layer.
    Type: Application
    Filed: September 4, 2019
    Publication date: December 17, 2020
    Inventors: Sukti CHATTERJEE, Kenichi OHNO, Lance A. SCUDDER, Yuriy MELNIK, David A. BRITZ, Pravin K. NARWANKAR, Thomas KNISLEY, Mark SALY, Jeffrey ANTHIS
  • Publication number: 20200355493
    Abstract: A light emitting element array includes: a light emitting element group that includes plural light emitting elements; and plural lenses that are provided, corresponding to the plural light emitting elements, on a light emitting surface side of the plural light emitting elements, and that deflects light emitted from the plural light emitting elements according to a positional relation with the plural light emitting elements. Distances between central axes of light emission of the plural light emitting elements and central axes of the plural lenses corresponding to the plural light emitting elements increase from a center side of the light emitting element group toward an end side of the light emitting element group, and a degree of change in the distances decreases from the center side of the light emitting element group toward the end side of the light emitting element group.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Shigetoshi NAKAMURA, Kenichi OHNO, Michiaki MURATA, Tsutomu ISHII, Jiro MINABE
  • Patent number: 10830756
    Abstract: Methods of manufacturing well-controlled nanopores using directed self-assembly and methods of manufacturing free-standing membranes using selective etching are disclosed. In one aspect, one or more nanopores are formed by directed self-assembly with block co-polymers to shrink the critical dimension of a feature which is then transferred to a thin film. In another aspect, a method includes providing a substrate having a thin film over a highly etchable layer thereof, forming one or more nanopores through the thin film over the highly etchable layer, for example, by a pore diameter reduction process, and then selectively removing a portion of the highly etchable layer under the one or more nanopores to form a thin, free-standing membrane.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: November 10, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Ankit Vora, Kenichi Ohno, Philip Allan Kraus, Zohreh Hesabi, Joseph R. Johnson
  • Publication number: 20200340107
    Abstract: Embodiments of the present disclosure generally relate to protective coatings on an aerospace component and methods for depositing the protective coatings. In one or more embodiments, a method for depositing a coating on an aerospace component includes depositing one or more layers on a surface of the aerospace component using an atomic layer deposition or chemical vapor deposition process, and performing a partial oxidation and annealing process to convert the one or more layers to a coalesced layer having a preferred phase crystalline assembly. During oxidation cycles, an aluminum depleted region is formed at the surface of the aerospace component, and an aluminum oxide region is formed between the aluminum depleted region and the coalesced layer. The coalesced layer forms a protective coating, which decreases the rate of aluminum depletion from the aerospace component and the rate of new aluminum oxide scale formation.
    Type: Application
    Filed: April 16, 2020
    Publication date: October 29, 2020
    Applicant: Applied Materials, Inc.
    Inventors: Sukti CHATTERJEE, Lance A. SCUDDER, Yuriy MELNIK, David A. BRITZ, Thomas KNISLEY, Kenichi OHNO, Pravin K. NARWANKAR
  • Patent number: 10742101
    Abstract: Provided are an insertion method and an insertion apparatus for efficiently and reliably inserting a plurality of coil elements aligned in a ring shape into respective slots of a stator core. In an insertion method of inserting, the insertion method includes a coil element alignment process S3 of forming an assembly body 50 by assembling the plurality of coil elements 40 in a ring shape in the state where the turn portions 42 alternately overlap each other, a supporting process S42 of supporting the assembly body 50 by using the turn portions 42, and an insertion process S45 of allowing the assembly body 50 and the stator core 60 to be close to each other and inserting the leg portions 41 of the coil elements 40 of the assembly body 50 into the slots 61.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: August 11, 2020
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Kenichi Ohno, Yutaka Matsumoto, Shinichi Kawano, Daisuke Ueno
  • Patent number: 10711372
    Abstract: A silicon carbide epitaxial wafer manufacturing method includes: a stabilization step of nitriding, oxidizing or oxynitriding and stabilizing silicon carbide attached to an inner wall surface of a growth furnace; after the stabilization step, a bringing step of bringing a substrate in the growth furnace; and after the bringing step, a growth step of epitaxially growing a silicon carbide epitaxial layer on the substrate by supplying a process gas into the growth furnace to manufacture a silicon carbide epitaxial wafer.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: July 14, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Akihito Ohno, Kenichi Hamano, Takashi Kanazawa
  • Patent number: 10707075
    Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.
    Type: Grant
    Filed: November 28, 2016
    Date of Patent: July 7, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kenichi Hamano, Akihito Ohno, Takuma Mizobe, Masashi Sakai, Yasuhiro Kimura, Yoichiro Mitani, Takashi Kanazawa
  • Publication number: 20200194183
    Abstract: A ceramic electronic device includes: a multilayer chip in which each of internal electrode layers and each of dielectric layers are alternately stacked, wherein the multilayer chip has a first capacity region having a first electrostatic capacity C1 and a first inductance L1 and a second capacity region having a second electrostatic capacity C2 and a second inductance L2, wherein the first electrostatic capacity C1, the first inductance L1, the second electrostatic capacity C2 and the second inductance L2 satisfy (C1·L1)/(C2·L2)<0.5 or 1.9<(C1·L1)/(C2·L2).
    Type: Application
    Filed: December 2, 2019
    Publication date: June 18, 2020
    Inventors: Hirotaka OHNO, Tomoyasu EGUCHI, Kenichi KITAZAWA, Ryuichi SHIBASAKI
  • Publication number: 20200180950
    Abstract: Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.
    Type: Application
    Filed: February 17, 2020
    Publication date: June 11, 2020
    Inventors: Joseph R. JOHNSON, Kenichi OHNO
  • Publication number: 20200144053
    Abstract: A semiconductor wafer includes a silicon carbide substrate having a first carrier concentration, a carrier concentration transition layer, and an epitaxial layer provided on the carrier concentration transition layer, the epitaxial layer having a second carrier concentration, and the second carrier concentration being lower than the first carrier concentration. The carrier concentration transition layer has a concentration gradient in the thickness direction. The carrier concentration decreases as the film thickness increases from an interface between a layer directly below the carrier concentration transition layer and the carrier concentration transition layer, and the carrier concentration decreases at a lower rate of decrease as the film thickness of the carrier concentration transition layer increases.
    Type: Application
    Filed: November 28, 2016
    Publication date: May 7, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Akihito OHNO, Takuma MIZOBE, Masashi SAKAI, Yasuhiro KIMURA, Yoichiro MITANI, Takashi KANAZAWA
  • Publication number: 20200137312
    Abstract: The present disclosure provides a control device for controlling an imaging device. The control device includes an operation unit configured to be operated by an external force; a detection unit configured to detect an operation state of the operation unit; a processor configured to execute a program to: perform a predetermined operation based on the operation state of the operation unit; and invalidate an execution of the predetermined operation performed by the processor based on the operation state of the operation unit when the imaging device is connected to an object satisfying a condition.
    Type: Application
    Filed: December 27, 2019
    Publication date: April 30, 2020
    Inventors: Takashi KOYAMA, Naoyuki OHNO, Kenichi HONJO
  • Patent number: 10618805
    Abstract: Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: April 14, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Joseph R. Johnson, Kenichi Ohno
  • Publication number: 20200020528
    Abstract: A SiC substrate (1) has an off angle ?°. A SiC epitaxial layer (2) having a film thickness of Tm ?m is provided on the SiC substrate (1). Triangular defects (3) are formed on a surface of the SiC epitaxial layer (2). A density of triangular defects (3) having a length of Tm/Tan ?×0.9 or more in a substrate off direction is denoted by A. A density of triangular (3) defects having a length smaller than Tm/Tan ?×0.9 in the substrate off direction is denoted by B. B/A?0.5 is satisfied.
    Type: Application
    Filed: April 6, 2017
    Publication date: January 16, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Kenichi HAMANO, Akihito OHNO, Takuma MIZOBE, Yasuhiro KIMURA, Yoichiro MITANI
  • Patent number: 10523097
    Abstract: An electrical conductor aligning device that can, without mutual interference, easily, and in a short period of time, align a plurality of electrical conductors in an annular shape while overlapping in the peripheral direction. The coil element aligning device includes: holding sections, a slide mechanism and a cylinder mechanism. One leg of each coil element is held by the plurality of holding sections, the plurality of coil elements being aligned in an annular shape at a spacing such that there is no overlapping in the peripheral direction, and then the plurality of holding sections being moved inwards in the radial direction by the slide mechanism and the cylinder mechanism, thereby aligning the plurality of coil elements in an annular shape while overlapping in the peripheral direction.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: December 31, 2019
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Mitsuhiro Yamada, Yutaka Matsumoto, Toru Yoshida, Kenichi Ohno, Yoshihisa Matsuoka
  • Patent number: 10491292
    Abstract: According to one embodiment, a communication repeater system includes a master station device, slave station devices, and radio frequency units which convert a signal from each base station system into an optical digital signal for transmission to the master station device. The base station systems establish communication by time-division duplex scheme. The communication repeater system repeats communication between a mobile communication terminal device and each base station system via a corresponding one of the slave station devices. The radio frequency units each include a detector that detects transmission/reception switching timing between the master station device and each of the radio frequency units. The slave station devices each include a setter that sets reference transmission/reception switching timing on the basis of acquired reference time information.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: November 26, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Infrastructure Systems & Solutions Corporation
    Inventors: Kensei Kawabata, Toshinori Doi, Kenichi Ohno
  • Patent number: 10442517
    Abstract: A marine reduction gear makes it possible to reduce the installation space of an electrical rotating machine. A marine reduction gear includes: an input shaft coupled to an output shaft of an engine; an output shaft coupled to a propeller shaft that rotates a screw propeller; a gearbox accommodating an input gear provided on the input shaft and an output gear provided on the output shaft, the gearbox supporting a first bearing that supports the output shaft in a rotatable manner; and an electrical rotating machine including: a central shaft that rotates together with the output shaft; a rotor fixed to the central shaft; and a stator surrounding the rotor. The gearbox supports the stator and a second bearing that supports the central shaft of the electrical rotating machine in a rotatable manner.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 15, 2019
    Assignee: KAWASAKI JUKOGYO KABUSHIKI KAISHA
    Inventors: Ryo Miyamae, Shoichi Takahashi, Tatsuya Ohno, Yoshihiko Ozaki, Kenichi Masamoto