Patents by Inventor Kenichi Okazaki

Kenichi Okazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220181492
    Abstract: A circuit capable of high-speed operation and a pixel are integrally formed over the same substrate. A first metal oxide film, a first metal film, and an island-shaped first resist mask are formed over a first insulating layer. An island-shaped first metal layer and an island-shaped first oxide semiconductor layer are formed and a part of a top surface of the first insulating layer is exposed; then, the first resist mask is removed. A second metal oxide film, a second metal film, and an island-shaped second resist mask are formed over the first metal layer and the first insulating layer. An island-shaped second metal layer and an island-shaped second oxide semiconductor layer are formed; then, the second resist mask is removed. The first metal layer and the second metal layer are removed.
    Type: Application
    Filed: November 23, 2021
    Publication date: June 9, 2022
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Mitsuo MASHIYAMA, Kenichi OKAZAKI
  • Patent number: 11352690
    Abstract: A metal oxide film containing a crystal part is provided. Alternatively, a metal oxide film with highly stable physical properties is provided. Alternatively, a metal oxide film with improved electrical characteristics is provided. Alternatively, a metal oxide film with which field-effect mobility can be increased is provided. A metal oxide film including In, M (M is Al, Ga, Y, or Sn), and Zn includes a first crystal part and a second crystal part; the first crystal part has c-axis alignment; the second crystal part has no c-axis alignment; and the existing proportion of the second crystal part is higher than the existing proportion of the first crystal part.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: June 7, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Masashi Tsubuku
  • Patent number: 11349006
    Abstract: A semiconductor device is fabricated by a method including the following steps: a first step of forming a semiconductor film containing a metal oxide over an insulating layer; a second step of forming a conductive film over the semiconductor film; a third step of forming a first resist mask over the conductive film and etching the conductive film to form a first conductive layer and to expose a top surface of the semiconductor film that is not covered with the first conductive layer; and a fourth step of forming a second resist mask that covers a top surface and a side surface of the first conductive layer and part of the top surface of the semiconductor film and etching the semiconductor film to form a semiconductor layer and to expose a top surface of the insulating layer that is not covered with the semiconductor layer.
    Type: Grant
    Filed: February 18, 2019
    Date of Patent: May 31, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Kenichi Okazaki, Takayuki Ohide, Rai Sato
  • Patent number: 11342462
    Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
    Type: Grant
    Filed: July 1, 2020
    Date of Patent: May 24, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Yukinori Shima, Shinpei Matsuda, Haruyuki Baba, Ryunosuke Honda
  • Publication number: 20220149201
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with high reliability is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, and a conductive layer. The semiconductor layer, the second insulating layer, and the conductive layer are stacked in this order over the first insulating layer. The semiconductor layer contains indium and oxygen and has a composition falling within a range obtained by connecting first coordinates (1:0:0), second coordinates (2:1:0), third coordinates (14:7:1), fourth coordinates (7:2:2), fifth coordinates (14:4:21), sixth coordinates (2:0:3), and the first coordinates in this order with a straight line in a ternary diagram showing atomic ratios of indium to an element M and zinc. In addition, the element M is one or more of gallium, aluminum, yttrium, and tin.
    Type: Application
    Filed: February 19, 2020
    Publication date: May 12, 2022
    Inventors: Shunpei YAMAZAKI, Toshimitsu OBONAI, Junichi KOEZUKA, Kenichi OKAZAKI
  • Patent number: 11327376
    Abstract: To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: May 10, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masatoshi Yokoyama, Shigeki Komori, Manabu Sato, Kenichi Okazaki, Shunpei Yamazaki
  • Publication number: 20220140152
    Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. One embodiment of the present invention is a semiconductor device which includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same element. The second oxide semiconductor film includes a region having lower crystallinity than one or both of the first oxide semiconductor film and the third oxide semiconductor film.
    Type: Application
    Filed: January 20, 2022
    Publication date: May 5, 2022
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Kenichi OKAZAKI, Yasutaka NAKAZAWA
  • Publication number: 20220137469
    Abstract: To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.
    Type: Application
    Filed: January 21, 2022
    Publication date: May 5, 2022
    Inventors: Masatoshi YOKOYAMA, Shigeki KOMORI, Manabu SATO, Kenichi OKAZAKI, Shunpei YAMAZAKI
  • Publication number: 20220140144
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable display device is provided. The semiconductor device includes a first conductive layer, a first insulating layer, a semiconductor layer, and a pair of second conductive layers. The first insulating layer is in contact with a top surface of the first conductive layer. The semiconductor layer is in contact with a top surface of the first insulating layer. The pair of second conductive layers are in contact with a top surface of the semiconductor layer. The pair of second conductive layers are apart from each other in a region overlapping with the first conductive layer.
    Type: Application
    Filed: February 17, 2020
    Publication date: May 5, 2022
    Inventors: Shunpei YAMAZAKI, Toshimitsu OBONAI, Junichi KOEZUKA, Kenichi OKAZAKI
  • Publication number: 20220127713
    Abstract: A metal oxide film with high electrical characteristics is provided. A metal oxide film with high reliability is provided. The metal oxide film contains indium, M (M is aluminum, gallium, yttrium, or tin), and zinc. In the metal oxide film, distribution of interplanar spacings d determined by electron diffraction by electron beam irradiation from a direction perpendicular to a film surface of the metal oxide film has a first peak and a second peak. The top of the first peak is positioned at greater than or equal to 0.25 nm and less than or equal to 0.30 nm, and the top of the second peak is positioned at greater than or equal to 0.15 nm and less than or equal to 0.20 nm. The distribution of the interplanar spacings d is obtained from a plurality of electron diffraction patterns of a plurality of regions of the metal oxide film. The electron diffraction is performed using an electron beam with a beam diameter of greater than or equal to 0.3 nm and less than or equal to 10 nm.
    Type: Application
    Filed: February 10, 2020
    Publication date: April 28, 2022
    Inventors: Toshimitsu OBONAI, Yasuharu HOSAKA, Kenichi OKAZAKI, Masahiro TAKAHASHI, Tomonori NAKAYAMA, Tomosato KANAGAWA, Shunpei YAMAZAKI
  • Patent number: 11316016
    Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: April 26, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Yukinori Shima, Junichi Koezuka, Kenichi Okazaki
  • Patent number: 11309181
    Abstract: To provide a sputtering apparatus capable of forming a semiconductor film in which impurities such as hydrogen or water are reduced. The sputtering apparatus is capable of forming a semiconductor film and includes a deposition chamber, a gas supply device connected to the deposition chamber, a gas refining device connected to the gas supply device, a vacuum pump for evacuating the deposition chamber, a target disposed in the deposition chamber, and a cathode disposed to face the target. The gas supply device is configured to supply at least one of an argon gas, an oxygen gas, and a nitrogen gas. The partial pressure of hydrogen molecules is lower than or equal to 0.01 Pa and the partial pressure of water molecules is lower than or equal to 0.0001 Pa in the deposition chamber.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: April 19, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masahiro Watanabe, Takuya Handa, Yasuharu Hosaka, Kenichi Okazaki, Shunpei Yamazaki
  • Patent number: 11296132
    Abstract: A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 ?m and less than or equal to 3 ?m is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.
    Type: Grant
    Filed: May 27, 2020
    Date of Patent: April 5, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yasuharu Hosaka, Satoru Idojiri, Kenichi Okazaki, Hiroki Adachi, Daisuke Kubota
  • Publication number: 20220102534
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable display device is provided. A method for fabricating the semiconductor device includes a step of forming a semiconductor layer including a metal oxide; a step of forming, over the semiconductor layer, a first conductive layer and a second conductive layer that are apart from each other over the semiconductor layer; a step of performing plasma treatment using a mixed gas including an oxidizing gas and a reducing gas on a region where the semiconductor layer is exposed; a step of forming a first insulating layer over the semiconductor layer, the first conductive layer, and the second conductive layer; and a step of forming a second insulating layer over the first insulating layer.
    Type: Application
    Filed: February 6, 2020
    Publication date: March 31, 2022
    Inventors: Takashi HAMOCHI, Kenichi OKAZAKI, Satoru IDOJIRI, Yasutaka NAKAZAWA
  • Patent number: 11282965
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. A highly reliable display device is provided. The semiconductor device is fabricated by a method that includes a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a conductive film over the semiconductor layer, a third step of etching the conductive film such that the conductive film is divided over the semiconductor layer and a portion of the semiconductor layer is uncovered, and a fourth step of performing first treatment on the conductive film and the portion of the semiconductor layer. The conductive film contains copper, silver, gold, or aluminum. The first treatment is plasma treatment in an atmosphere containing a mixed gas of a first gas containing an oxygen element and a second gas containing a hydrogen element.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: March 22, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Takashi Hamochi, Takayuki Ohide, Kenichi Okazaki
  • Patent number: 11282865
    Abstract: A change in electrical characteristics can be inhibited and reliability can be improved in a semiconductor device including an oxide semiconductor. The semiconductor device including an oxide semiconductor film includes a first insulating film, the oxide semiconductor film over the first insulating film, a second insulating film over the oxide semiconductor film, and a third insulating film over the second insulating film. The second insulating film includes oxygen and silicon, the third insulating film includes nitrogen and silicon, and indium is included in a vicinity of an interface between the second insulating film and the third insulating film.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: March 22, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Okazaki, Junichi Koezuka, Masami Jintyou, Takahiro Iguchi
  • Publication number: 20220029120
    Abstract: An object of the invention is to improve the reliability of a light-emitting device. Another object of the invention is to provide flexibility to a light-emitting device having a thin film transistor using an oxide semiconductor film. A light-emitting device has, over one flexible substrate, a driving circuit portion including a thin film transistor for a driving circuit and a pixel portion including a thin film transistor for a pixel. The thin film transistor for a driving circuit and the thin film transistor for a pixel are inverted staggered thin film transistors including an oxide semiconductor layer which is in contact with a part of an oxide insulating layer.
    Type: Application
    Filed: October 7, 2021
    Publication date: January 27, 2022
    Inventors: Shingo EGUCHI, Yoshiaki OIKAWA, Kenichi OKAZAKI, Hotaka MARUYAMA
  • Publication number: 20220020781
    Abstract: To provide a semiconductor device including a planar transistor having an oxide semiconductor and a capacitor. In a semiconductor device, a transistor includes an oxide semiconductor film, a gate insulating film over the oxide semiconductor film, a gate electrode over the gate insulating film, a second insulating film over the gate electrode, a third insulating film over the second insulating film, and a source and a drain electrodes over the third insulating film; the source and the drain electrodes are electrically connected to the oxide semiconductor film; a capacitor includes a first and a second conductive films and the second insulating film; the first conductive film and the gate electrode are provided over the same surface; the second conductive film and the source and the drain electrodes are provided over the same surface; and the second insulting film is provided between the first and the second conductive films.
    Type: Application
    Filed: August 3, 2021
    Publication date: January 20, 2022
    Inventors: Shunpei YAMAZAKI, Kenichi OKAZAKI, Masahiro KATAYAMA, Masataka NAKADA
  • Publication number: 20220013754
    Abstract: A high-yield fabricating method of a semiconductor device including a peeling step is provided. A peeling method includes a step of stacking and forming a first material layer and a second material layer over a substrate and a step of separating the first material layer and the second material layer from each other. The second material layer is formed over the substrate with the first material layer therebetween. The first material layer includes a first compound layer in contact with the second material layer and a second compound layer positioned closer to the substrate side than the first compound layer is. The first compound layer has the highest oxygen content among the layers included in the first material layer. The second compound layer has the highest nitrogen content among the layers included in the first material layer. The second material layer includes a resin.
    Type: Application
    Filed: September 20, 2021
    Publication date: January 13, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiji Yasumoto, Kayo KUMAKURA, Yuka SATO, Satoru IDOJIRI, Hiroki ADACHI, Kenichi OKAZAKI
  • Publication number: 20220013545
    Abstract: Provided is a semiconductor device with high capacitance while the aperture ratio is increased or a semiconductor device whose manufacturing cost is low. The semiconductor device includes a transistor, a first insulating film, and a capacitor including a second insulating film between a pair of electrodes. The transistor includes a gate electrode, a gate insulating film in contact with the gate electrode, a first oxide semiconductor film overlapping with the gate electrode, and a source electrode and a drain electrode electrically connected to the first oxide semiconductor film. One of the pair of electrodes of the capacitor includes a second oxide semiconductor film. The first insulating film is over the first oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is between the first insulating film and the second insulating film.
    Type: Application
    Filed: September 23, 2021
    Publication date: January 13, 2022
    Inventors: Kenichi OKAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yasuharu HOSAKA, Junichi KOEZUKA, Hiroyuki MIYAKE, Shunpei YAMAZAKI