Patents by Inventor Kenichi Okazaki

Kenichi Okazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220320184
    Abstract: A high-definition or high-resolution display apparatus is provided. In the display apparatus, a first light-emitting device includes a first pixel electrode, a first light-emitting layer, and a common electrode. A second light-emitting device includes a second pixel electrode, a second light-emitting layer, and the common electrode. End portions of the first and second pixel electrodes are covered with a first insulating layer. A second insulating layer covers side surfaces of the first and second light-emitting layers. A first color conversion layer overlaps the first light-emitting device. A second color conversion layer overlaps the second light-emitting device. The first and second light-emitting devices each have a function of emitting blue light. The first and second color conversion layers each have a function of converting light.
    Type: Application
    Filed: March 3, 2022
    Publication date: October 6, 2022
    Inventors: Kenichi OKAZAKI, Daiki NAKAMURA, Rai SATO
  • Patent number: 11462645
    Abstract: A semiconductor device which has favorable electrical characteristics is provided. A method for manufacturing a semiconductor device with high productivity is provided. A method for manufacturing a semiconductor device with a high yield is provided.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: October 4, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
  • Patent number: 11456320
    Abstract: A display device includes a liquid crystal element, a transistor, a scan line, and a signal line. The liquid crystal element includes a pixel electrode, a liquid crystal layer, and a common electrode. The scan line and the signal line are each electrically connected to the transistor. The scan line and the signal line each include a metal layer. The transistor is electrically connected to the pixel electrode. A semiconductor layer of the transistor includes a stack of a first metal oxide layer and a second metal oxide layer. The first metal oxide layer includes a region with lower crystallinity than the second metal oxide layer. The transistor includes a first region connected to the pixel electrode. The pixel electrode, the common electrode, and the first region are each configured to transmit visible light. Visible light passes through the first region and the liquid crystal element and exits from the display device.
    Type: Grant
    Filed: August 21, 2020
    Date of Patent: September 27, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kenichi Okazaki, Daisuke Kurosaki, Yasutaka Nakazawa, Kazunori Watanabe, Koji Kusunoki
  • Patent number: 11450691
    Abstract: To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. A semiconductor device includes an oxide semiconductor film, a gate electrode, an insulating film over the gate electrode, the oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film and the second oxide semiconductor film, include the same element. The first oxide semiconductor film includes a region having lower crystallinity than the second oxide semiconductor film.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: September 20, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kenichi Okazaki, Daisuke Kurosaki, Yasutaka Nakazawa
  • Publication number: 20220285555
    Abstract: To improve field-effect mobility and reliability in a transistor including an oxide semiconductor film. A semiconductor device includes a transistor including an oxide semiconductor film. The transistor includes a region where the maximum value of field-effect mobility of the transistor at a gate voltage of higher than 0 V and lower than or equal to 10 V is larger than or equal to 40 and smaller than 150; a region where the threshold voltage is higher than or equal to minus 1 V and lower than or equal to 1 V; and a region where the S value is smaller than 0.3 V/decade.
    Type: Application
    Filed: May 13, 2022
    Publication date: September 8, 2022
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Kenichi OKAZAKI, Yukinori SHIMA, Shinpei MATSUDA, Haruyuki BABA, Ryunosuke HONDA
  • Patent number: 11437524
    Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. One embodiment of the present invention is a semiconductor device which includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same element. The second oxide semiconductor film includes a region having lower crystallinity than one or both of the first oxide semiconductor film and the third oxide semiconductor film.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: September 6, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Yasutaka Nakazawa
  • Patent number: 11437523
    Abstract: In a semiconductor device including a transistor including an oxide semiconductor film and a protective film over the transistor, an oxide insulating film containing oxygen in excess of the stoichiometric composition is formed as the protective film under the following conditions: a substrate placed in a treatment chamber evacuated to a vacuum level is held at a temperature higher than or equal to 180° C. and lower than or equal to 260° C.; a source gas is introduced into the treatment chamber so that the pressure in the treatment chamber is set to be higher than or equal to 100 Pa and lower than or equal to 250 Pa; and a high-frequency power higher than or equal to 0.17 W/cm2 and lower than or equal to 0.5 W/cm2 is supplied to an electrode provided in the treatment chamber.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: September 6, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Okazaki, Toshinari Sasaki, Shuhei Yokoyama, Takashi Hamochi
  • Publication number: 20220271150
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.
    Type: Application
    Filed: May 13, 2022
    Publication date: August 25, 2022
    Inventors: Kenichi OKAZAKI, Yukinori SHIMA
  • Patent number: 11424334
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.
    Type: Grant
    Filed: October 23, 2018
    Date of Patent: August 23, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Takahiro Iguchi, Yukinori Shima, Kenichi Okazaki
  • Publication number: 20220259716
    Abstract: A metal oxide film containing a crystal part is provided. Alternatively, a metal oxide film with highly stable physical properties is provided. Alternatively, a metal oxide film with improved electrical characteristics is provided. Alternatively, a metal oxide film with which field-effect mobility can be increased is provided. A metal oxide film including In, M (M is Al, Ga, Y, or Sn), and Zn includes a first crystal part and a second crystal part; the first crystal part has c-axis alignment; the second crystal part has no c-axis alignment; and the existing proportion of the second crystal part is higher than the existing proportion of the first crystal part.
    Type: Application
    Filed: April 27, 2022
    Publication date: August 18, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Junichi KOEZUKA, Kenichi OKAZAKI, Masashi TSUBUKU
  • Publication number: 20220246731
    Abstract: A novel material is provided. A composite oxide semiconductor includes a first region and a second region. The first region contains indium. The second region contains an element M (the element M is one or more of Ga, Al, Hf, Y, and Sn). The first region and the second region are arranged in a mosaic pattern. The composite oxide semiconductor further includes a third region. The element M is gallium. The first region contains indium oxide or indium zinc oxide. The second region contains gallium oxide or gallium zinc oxide. The third region contains zinc oxide.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Yukinori SHIMA, Junichi KOEZUKA, Kenichi OKAZAKI
  • Publication number: 20220238836
    Abstract: A display device with high display quality is provided. The display device includes a first lower electrode, a first EL layer over the first lower electrode, a second lower electrode, a second EL layer over the second lower electrode, an upper electrode over the first EL layer and the second EL layer, a first region not provided with the first lower electrode below the first EL layer, and a second region not provided with the second lower electrode below the second EL layer. In the first region, the upper electrode is positioned not to be in contact with the first lower electrode. In the second region, the upper electrode is positioned not to be in contact with the second lower electrode.
    Type: Application
    Filed: January 21, 2022
    Publication date: July 28, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Okazaki, Shingo Eguchi, Hiroki Adachi
  • Patent number: 11392004
    Abstract: The manufacturing yield of a display device is improved. The resistance of a display device to ESD is increased. The display device includes a substrate, a display portion, a connection terminal, a first wiring, and a second wiring. The first wiring is electrically connected to the connection terminal and includes a portion positioned between the connection terminal and the display portion. The second wiring is electrically connected to the connection terminal, is positioned between the connection terminal and an end portion of the substrate, and includes a portion in which a side surface is exposed at an end portion of the substrate. The display portion includes a transistor. The transistor includes a semiconductor layer, a gate insulating layer, and a gate electrode. The semiconductor layer and the second wiring include a metal oxide.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: July 19, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Okazaki, Yukinori Shima, Daisuke Kurosaki, Masataka Nakada
  • Patent number: 11393918
    Abstract: In a top-gate transistor in which an oxide semiconductor film, a gate insulating film, a gate electrode layer, and a silicon nitride film are stacked in this order and the oxide semiconductor film includes a channel formation region, nitrogen is added to regions of part of the oxide semiconductor film and the regions become low-resistance regions by forming a silicon nitride film over and in contact with the oxide semiconductor film. A source and drain electrode layers are in contact with the low-resistance regions. A region of the oxide semiconductor film, which does not contact the silicon nitride film (that is, a region overlapping with the gate insulating film and the gate electrode layer) becomes the channel formation region.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: July 19, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kenichi Okazaki, Junichi Koezuka, Toshinari Sasaki
  • Publication number: 20220223671
    Abstract: A novel display panel that is highly convenient, useful, or reliable can be provided. The display panel includes a first light-emitting device, a second light-emitting device, a first insulating film, and a conductive film. The first light-emitting device includes a first electrode and a second electrode; the first electrode includes a first region overlapping with the second electrode and a second region outside the first region. The second light-emitting device includes a third electrode and a fourth electrode, and the third electrode includes a third region overlapping with the fourth electrode and a fourth region outside the third region. The first insulating film is in contact with the second region and the fourth region, and the first insulating film includes a first opening and a second opening. The first opening overlaps with the second electrode and the second opening overlaps with the fourth electrode.
    Type: Application
    Filed: January 7, 2022
    Publication date: July 14, 2022
    Inventors: Shunpei YAMAZAKI, Takayuki IKEDA, Kenichi OKAZAKI, Yasumasa YAMANE, Hajime KIMURA, Tatsuya ONUKI
  • Publication number: 20220216243
    Abstract: A peeling method at low cost with high mass productivity is provided. A resin layer having a thickness greater than or equal to 0.1 ?m and less than or equal to 3 ?m is formed over a formation substrate using a photosensitive and thermosetting material, a transistor including an oxide semiconductor in a channel formation region is formed over the resin layer, the resin layer is irradiated with light using a linear laser device, and the transistor and the formation substrate are separated from each other. A first region and a second region which is thinner than the first region or an opening can be formed in the resin layer. In the case of forming a conductive layer functioning as an external connection terminal or the like to overlap with the second region or the opening of the resin layer, the conductive layer is exposed.
    Type: Application
    Filed: March 23, 2022
    Publication date: July 7, 2022
    Inventors: Shunpei YAMAZAKI, Yasuharu HOSAKA, Satoru IDOJIRI, Kenichi OKAZAKI, Hiroki ADACHI, Daisuke KUBOTA
  • Patent number: 11380799
    Abstract: To provide a novel oxide semiconductor film. The oxide semiconductor film includes In, M, and Zn. The M is Al, Ga, Y, or Sn. In the case where the proportion of In in the oxide semiconductor film is 4, the proportion of M is greater than or equal to 1.5 and less than or equal to 2.5 and the proportion of Zn is greater than or equal to 2 and less than or equal to 4.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: July 5, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akihisa Shimomura, Junichi Koezuka, Kenichi Okazaki, Yasumasa Yamane, Yuhei Sato, Shunpei Yamazaki
  • Patent number: 11380802
    Abstract: To reduce defects in an oxide semiconductor film in a semiconductor device. To improve electrical characteristics of and reliability in the semiconductor device including an oxide semiconductor film. A method for manufacturing a semiconductor device includes the steps of forming a gate electrode and a gate insulating film over a substrate, forming an oxide semiconductor film over the gate insulating film, forming a pair of electrodes over the oxide semiconductor film, forming a first oxide insulating film over the oxide semiconductor film and the pair of electrodes by a plasma CVD method in which a film formation temperature is 280° C. or higher and 400° C. or lower, forming a second oxide insulating film over the first oxide insulating film, and performing heat treatment at a temperature of 150° C. to 400° C. inclusive, preferably 300° C. to 400° C. inclusive, further preferably 320° C. to 370° C. inclusive.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: July 5, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junichi Koezuka, Yukinori Shima, Suzunosuke Hiraishi, Kenichi Okazaki
  • Patent number: 11374117
    Abstract: A semiconductor device having favorable electrical characteristics is provided. The semiconductor device is manufactured by a first step of forming a semiconductor layer containing a metal oxide, a second step of forming a first insulating layer, a third step of forming a first conductive film over the first insulating layer, a fourth step of etching part of the first conductive film to form a first conductive layer, thereby forming a first region over the semiconductor layer that overlaps with the first conductive layer and a second region over the semiconductor layer that does not overlap with the first conductive layer, and a fifth step of performing first treatment on the conductive layer. The first treatment is plasma treatment in an atmosphere including a mixed gas of a first gas containing an oxygen element but not containing a hydrogen element, and a second gas containing a hydrogen element but not containing an oxygen element.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: June 28, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kenichi Okazaki, Yukinori Shima
  • Publication number: 20220187645
    Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.
    Type: Application
    Filed: December 27, 2021
    Publication date: June 16, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuharu HOSAKA, Yukinori SHIMA, Kenichi OKAZAKI, Shunpei YAMAZAKI