Patents by Inventor Kenichi Osada

Kenichi Osada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240020245
    Abstract: An object of the present invention is to provide a technology that enables second control software to continue processing using a peripheral circuit even in a situation where an abnormality related to first control software occurs. An electronic control device includes a memory (3) that stores the first control software and the second control software, a CPU (1) that executes the first control software and the second control software, and a peripheral circuit (200) used by the first control software and the second control software. The memory further includes a first buffer (313a) and a second buffer (323a). The CPU interrupts at least one of the processing of storing first peripheral transmission information in the first buffer and the processing of transmitting the first peripheral transmission information to the peripheral in a specific situation in which the abnormality related to the first control software occurs.
    Type: Application
    Filed: September 9, 2021
    Publication date: January 18, 2024
    Applicant: HITACHI ASTEMO, LTD.
    Inventors: Masashi MIZOGUCHI, Tomohito EBINA, Tasuku ISHIGOOKA, Kazuyoshi SERIZAWA, Kenichi OSADA
  • Patent number: 11590907
    Abstract: An in-vehicle network system which is mounted on a vehicle includes an electronic control unit, a plurality of gateway devices, and a plurality of sensor devices that collects ambient information which is information around the vehicle. Each of the sensor devices communicates with the electronic control unit via at least one gateway device. The electronic control unit includes a mode management unit that determines one operation mode in a plurality of operation modes associated with the sensor device to be operated, and a sleep instruction control unit that specifies a gateway device which is the gateway device, in which the connected sensor device does not operate, and does not need to relay sensor information, based on the operation mode determined by the mode management unit, and transitions the gateway device having no need to relay the sensor information to a low power state in which a processing capacity is lowered.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 28, 2023
    Assignee: HITACHI ASTEMO, LTD.
    Inventors: Jun Sugawa, Kazuyoshi Serizawa, Shuhei Kaneko, Kenichi Osada
  • Patent number: 11472354
    Abstract: Provided is a vehicle controller that can suppress increase in startup time due to increase in the number of function portions related to communication. The invention includes a power supply unit 3 that is capable of supplying or shutting off operating power to a microcomputer 2 that communicates with other electronic control units through CAN channels (CAN1, CAN2), and communication controllers 4 and 6 that are respectively provided in the multiple CAN channels (CAN 1, CAN 2) used for communication of the microcomputer 2.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: October 18, 2022
    Assignee: HITACHI ASTEMO, LTD.
    Inventors: Shuhei Kaneko, Kenichi Osada
  • Patent number: 11467818
    Abstract: A software update device is connected to a control device and includes an update control unit executing an update process of causing software for the control device to transit from a non-updated state to a completely updated state, a recovery control information managing unit acquiring recovery control information, and a recovery control unit executing a recovery process of causing the software to transit to the completely updated state on a basis of the recovery control information in a case where an abnormality in the update process has prevented the software from transiting to the completely updated state.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: October 11, 2022
    Assignee: Hitachi Astemo, Ltd.
    Inventors: Hidetoshi Teraoka, Kohei Sakurai, Kenichi Osada, Kenichi Kurosawa, Fumiharu Nakahara
  • Patent number: 11299112
    Abstract: The autonomous driving ECU includes a first communication unit that transmits and receives autonomous driving data to and from the plurality of data ECUs, and a vehicle control unit that controls a vehicle on the basis of the autonomous driving data transmitted from the plurality of data ECUs. Each data ECU includes a data construction unit that performs a construction of the autonomous driving data transmitted to the autonomous driving ECU, and a second communication unit that transmits and receives the autonomous driving data to and from the autonomous driving ECU. If a predetermined event occurs, among the data ECUs, the data construction unit of the data ECU in which the predetermined event occurs constructs the autonomous driving data so that a total amount of the autonomous driving data transmitted from the data ECU in which the predetermined event occurs is not greater than a predetermined amount of data.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: April 12, 2022
    Assignee: HITACHI ASTEMO, LTD.
    Inventors: Mitsuhiro Kitani, Hidetoshi Teraoka, Kohei Sakurai, Kenichi Osada, Mikio Kataoka
  • Patent number: 11159456
    Abstract: It is possible to perform transfer with low latency. The control apparatus includes a routing control unit, transmission queues, and a plurality of controllers.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: October 26, 2021
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Naoyuki Yamamoto, Kenichi Osada, Shuhei Kaneko, Hitoshi Kawaguchi
  • Patent number: 11016928
    Abstract: A microcomputer is connected to a logic circuit. The microcomputer includes a monitoring unit monitoring the state of the logic circuit, a storage unit storing a plurality of information processing items executed by the microcomputer, and a processing unit executing a process on the basis of the state of the logic circuit and at least one information processing item selected from the plurality of information processing items on the basis of a communication frame inputted to the microcomputer.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: May 25, 2021
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Satoshi Tsutsumi, Taisuke Ueta, Shuhei Kaneko, Kenichi Osada
  • Publication number: 20210061194
    Abstract: An in-vehicle network system includes a control unit, a plurality of gateway devices, and a plurality of sensors that collect ambient vehicle information. Each sensor communicates with the control unit via at least one gateway device. The control unit includes a mode management unit that determines an operation mode in a plurality of operation modes associated with the sensor, and a sleep instruction control unit that specifies a gateway device, which is the gateway device in which the connected sensor does not operate, and does not need to relay a sensor, based on the operation mode, and transitions the gateway device having no need to relay the sensor to a low power state in which a processing capacity is lowered. The gateway device is connected to the plurality of sensors which do not operate in any one of the same operation modes without passing through the other gateway devices.
    Type: Application
    Filed: December 21, 2018
    Publication date: March 4, 2021
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Jun SUGAWA, Kazuyoshi SERIZAWA, Shuhei KANEKO, Kenichi OSADA
  • Patent number: 10903735
    Abstract: A conventional power supply device has a problem in miniaturization. A power supply device generates a prediction value of an error signal from first and second error signals, and controls an output voltage so that the prediction value lies between first and second threshold values. The first error signal is obtained by converting an error voltage based on the difference between the output voltage and a reference voltage at a first timing. The second error signal is obtained by converting an error voltage based on the difference between the output voltage and the reference voltage at a second timing.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: January 26, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Ming Liu, Tatsuo Nakagawa, Kenichi Osada
  • Publication number: 20200225930
    Abstract: A software update device is connected to a control device and includes an update control unit executing an update process of causing software for the control device to transit from a non-updated state to a completely updated state, a recovery control information managing unit acquiring recovery control information, and a recovery control unit executing a recovery process of causing the software to transit to the completely updated state on a basis of the recovery control information in a case where an abnormality in the update process has prevented the software from transiting to the completely updated state.
    Type: Application
    Filed: September 8, 2017
    Publication date: July 16, 2020
    Inventors: Hidetoshi TERAOKA, Kohei SAKURAI, Kenichi OSADA, Kenichi KUROSAWA, Fumiharu NAKAHARA
  • Publication number: 20200186470
    Abstract: It is possible to perform transfer with low latency. The control apparatus includes a routing control unit, transmission queues, and a plurality of controllers.
    Type: Application
    Filed: July 18, 2018
    Publication date: June 11, 2020
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Naoyuki YAMAMOTO, Kenichi OSADA, Shuhei KANEKO, Hitoshi KAWAGUCHI
  • Publication number: 20200094755
    Abstract: Provided is a vehicle controller that can suppress increase in startup time due to increase in the number of function portions related to communication. The invention includes a power supply unit 3 that is capable of supplying or shutting off operating power to a microcomputer 2 that communicates with other electronic control units through CAN channels (CAN1, CAN2), and communication controllers 4 and 6 that are respectively provided in the multiple CAN channels (CAN 1, CAN 2) used for communication of the microcomputer 2.
    Type: Application
    Filed: June 19, 2018
    Publication date: March 26, 2020
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Shuhei KANEKO, Kenichi OSADA
  • Patent number: 10573376
    Abstract: A logic circuit in a system LSI (Large Scale Integrated Circuit) is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM (Static Random Access Memory) circuit of the system LSI controls a substrate bias to reduce leakage current.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: February 25, 2020
    Assignee: Renesas Electronics Corporation
    Inventors: Masanao Yamaoka, Koichiro Ishibashi, Shigezumi Matsui, Kenichi Osada
  • Publication number: 20190370220
    Abstract: A microcomputer is connected to a logic circuit. The microcomputer includes a monitoring unit monitoring the state of the logic circuit, a storage unit storing a plurality of information processing items executed by the microcomputer, and a processing unit executing a process on the basis of the state of the logic circuit and at least one information processing item selected from the plurality of information processing items on the basis of a communication frame inputted to the microcomputer.
    Type: Application
    Filed: October 12, 2017
    Publication date: December 5, 2019
    Applicant: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Satoshi TSUTSUMI, Taisuke UETA, Shuhei KANEKO, Kenichi OSADA
  • Patent number: 10484202
    Abstract: Provided are a relay device and the like with which it is possible to suppress bus signal reflections and suppress signal delays. A relay device 100A includes a signal processing and forwarding pathway P1 and a bypass connection pathway P2. The signal processing and forwarding pathway P1 processes a signal received from one bus CAN1 of a plurality of buses, and forwards the processed signal to another bus CAN2. The bypass connection pathway P2 connects the one bus CAN1 to the other bus CAN2, bypassing the signal processing and forwarding pathway P1.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: November 19, 2019
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Kenichi Osada, Kenichi Kurosawa
  • Patent number: 10454722
    Abstract: The present invention provides an in-vehicle processing device and an in-vehicle system capable of reducing power consumption while suppressing quality degradation of data to be transmitted and received. An ECU includes a data transmission and reception device for transmitting and receiving data and an MPU for controlling the data transmission and reception device. The data transmission and reception device includes a filter device and a steady current suppression circuit. The filter device attenuates noise that is superimposed on data by reflection of the data. The steady current suppression circuit suppresses a steady current flowing through the filter device and facilitates a transient current flowing through the filter device.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: October 22, 2019
    Assignee: HITACHI AUTOMOTIVE SYSTEMS, LTD.
    Inventors: Koichi Soraku, Kenichi Osada
  • Patent number: 10446224
    Abstract: When threshold voltages of constituent transistors are reduced in order to operate an SRAM circuit at a low voltage, there is a problem in that a leakage current of the transistors is increased and, as a result, electric power consumption when the SRAM circuit is not operated while storing data is increased. Therefore, there is provided a technique for reducing the leakage current of MOS transistors in SRAM memory cells MC by controlling a potential of a source line ssl of the driver MOS transistors in the memory cells.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: October 15, 2019
    Assignee: Renesas Electronics Corporation
    Inventors: Masanao Yamaoka, Kenichi Osada, Kazumasa Yanagisawa
  • Patent number: 10397022
    Abstract: The gateway device includes a plurality of communication ports that are connected to the respective low-level networks and receive low-level data that is transmitted and received to and from the low-level networks; a storage unit that stores each of the plurality of communication ports and a source identifier in association with each other; and a control unit that generates high-level data and transmits the high-level data to the high-level network, in which the payload of the high-level data that is generated by the control unit includes at least a part of the low-level data that is received by the communication ports, and in which the header of the high-level data that is generated by the control unit includes the source identifier which is associated with the communication ports.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: August 27, 2019
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Mikio Kataoka, Mitsuhiro Kitani, Hidetoshi Teraoka, Kenichi Osada, Naoyuki Yamamoto, Masaaki Nakamura
  • Publication number: 20190209081
    Abstract: The present invention addresses the problem of providing a system and a method for noninvasively and conveniently diagnosing difficult-to-diagnose chronic pain-related diseases and/or diseases requiring differentiation from the chronic pain-related diseases. The problem was solved by providing a method for obtaining an indicator for determining the presence and/or type of a chronic pain-related disease and/or disease requiring differentiation from chronic pain-related diseases, the method comprising: (a) performing an offset measurement test of pain on a subject that does not suffer from a neurological disorder; (b) analyzing the results obtained from the test in (a); and (c) comparing the analysis results obtained in (b) with a reference value.
    Type: Application
    Filed: September 15, 2017
    Publication date: July 11, 2019
    Inventor: Kenichi Osada
  • Publication number: 20190172528
    Abstract: A logic circuit in a system LSI is provided with a power switch so as to cut off the switch at the time of standby, reducing leakage current. At the same time, an SRAM circuit of the system LSI controls a substrate bias to reduce leakage current.
    Type: Application
    Filed: February 11, 2019
    Publication date: June 6, 2019
    Inventors: Masanao Yamaoka, Koichiro Ishibashi, Shigezumi Matsui, Kenichi Osada