Patents by Inventor Kenji Hiratsuka

Kenji Hiratsuka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8409889
    Abstract: A method for producing a semiconductor optical device, includes the steps of: (a) forming a semiconductor region on a substrate, the substrate including first and second areas; the first area including device sections (b) forming a first mask on the semiconductor region, the first mask including first patterns periodically arranged in the first area and a second pattern provided in the second area; (c) forming a plurality of periodic structures in each of the device sections and a monitoring structure in the second area by using the first mask, the periodic structures respectively corresponding to the first patterns, the monitoring structure corresponding to the second pattern; (d) measuring a shape of the monitoring structure; (e) selecting a desired periodic structure from the plurality of periodic structures on a basis of a result of measuring the shape of the monitoring structure; (f) forming a second mask including a pattern on the desired periodic structure; and (g) forming stripe mesas including the de
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: April 2, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji Hiratsuka
  • Publication number: 20130058371
    Abstract: A semiconductor optical integrated device includes a substrate having a main surface with a first and second regions arranged along a waveguiding direction; a gain region including a first cladding layer, an active layer, and a second cladding layer arranged on the first region of the main surface; and a wavelength control region including a third cladding layer, an optical waveguide layer, and a fourth cladding layer arranged on the second region of the main surface and including a heater arranged along the optical waveguide layer. The substrate includes a through hole extending from a back surface of the substrate in the thickness direction and reaching the first region. A metal member is arranged in the through hole. The metal member extends from the back surface of the substrate in the thickness direction and is in contact with the first cladding layer.
    Type: Application
    Filed: August 29, 2012
    Publication date: March 7, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Masaki YANAGISAWA, Kenji KOYAMA, Hirohiko KOBAYASHI, Kenji HIRATSUKA
  • Publication number: 20130023077
    Abstract: A method for manufacturing a semiconductor optical device includes the steps of growing a stacked semiconductor layer on a substrate having a cleavage direction in a first direction; forming a first mask having a plurality of openings arranged in the first direction; forming a mark array by etching the stacked semiconductor layer using the first mask; forming a second mask having first and second openings extending in a second direction intersecting the first direction; forming first and second grooves, and a waveguide mesa by etching the stacked semiconductor layer using the second mask; and producing a laser diode bar by cleaving a substrate product including the waveguide mesa. First and second residual marks are formed on the upper surface of the waveguide mesa. First and second transfer marks are formed on the bottoms of the first and the second grooves, respectively.
    Type: Application
    Filed: July 16, 2012
    Publication date: January 24, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Kenji HIRATSUKA
  • Publication number: 20130012002
    Abstract: A method for producing a semiconductor optical integrated device includes the steps of forming a substrate product including first and second stacked semiconductor layer portions; forming a first mask on the first and second stacked semiconductor layer portions, the first mask including a stripe-shaped first pattern region and a second pattern region, the second pattern region including a first end edge; forming a stripe-shaped mesa structure; removing the second pattern region of the first mask; forming a second mask on the second stacked semiconductor layer portion; and selectively growing a buried semiconductor layer with the first and second masks. The second mask includes a second end edge separated from the first end edge of the first mask, the second end edge being located on the side of the second stacked semiconductor layer portion in the predetermined direction with respect to the first end edge of the first mask.
    Type: Application
    Filed: June 29, 2012
    Publication date: January 10, 2013
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Hirohiko KOBAYASHI, Kenji KOYAMA, Masaki YANAGISAWA, Kenji HIRATSUKA
  • Publication number: 20120309121
    Abstract: A method of making a semiconductor optical integrated device includes the steps of forming, on a substrate, a plurality of semiconductor integrated devices including a first optical semiconductor element having a first bonding pad and a second optical semiconductor element; forming a plurality of bar-shaped semiconductor optical integrated device arrays by cutting the substrate, each of the semiconductor optical integrated device arrays including two or more semiconductor optical integrated devices; alternately arranging the plurality of semiconductor optical integrated device arrays and a plurality of spacers in a thickness direction of the substrate so as to be fixed in place; and forming a coating film on a facet of the semiconductor optical integrated device array. Furthermore, the spacer has a movable portion facing the first bonding pad, the movable portion protruding toward the first bonding pad and being displaceable in a protruding direction.
    Type: Application
    Filed: May 24, 2012
    Publication date: December 6, 2012
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshihiro YONEDA, Hirohiko KOBAYASHI, Kenji KOYAMA, Masaki YANAGISAWA, Kenji HIRATSUKA
  • Patent number: 8216868
    Abstract: A substrate product is formed, and the substrate product includes a first region, a second region, a protrusion structure, and first and second scribe marks. The first region includes sections arranged in first and second axes to form an array, and the second region is provided adjacent to the array. The protrusion structure is provided in the second region; the first and second scribe marks are provided in the second region; the first and second scribe marks extend along first and second reference lines, respectively; and the first and second reference lines define boundary of the sections. After sandwiching the substrate product between films, a first cleavage of the substrate product is performed along the first scribe mark to form a first laser bar and another substrate product, and a second cleavage of the other substrate product is performed along the second scribe mark to form a second laser bar and still another substrate product.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: July 10, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji Hiratsuka
  • Patent number: 8039282
    Abstract: In a method of fabricating a semiconductor optical device, a semiconductor region is formed by growing an InP lower film, a active region, an InP upper film and a capping film on a substrate sequentially. Material of the capping film is different from that of InP. Next, a mask is formed on the capping film, and the semiconductor region is etched using the mask to form a semiconductor stripe mesa, which includes an InP lower cladding layer, a active layer, an InP upper cladding layer and a capping layer. The active layer comprises aluminum-based III-V compound. A width of the top surface of the capping layer is greater than that of a width of the bottom surface of the capping layer. A width of the top surface of the InP upper cladding layer is smaller than that of the bottom surface of the InP upper cladding layer. The minimum width of the semiconductor mesa is in the InP upper cladding layer.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: October 18, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Manabu Yoshimura, Nobuyuki Ikoma, Kenji Hiratsuka
  • Patent number: 7947520
    Abstract: In the method of making a semiconductor laser, a semiconductor region is grown on an active layer, and a part of the semiconductor region is etched to form a ridge structure. An insulating film is formed over the ridge structure, and a resin layer of photosensitive material is formed to bury the ridge structure. A cured resin portion and an uncured resin portion are formed in the resin layer by performing lithographic exposure of the resin layer, and the uncured resin portion is on the top of the ridge structure. The uncured resin portion is removed to form a dent which is provided on the top of the ridge structure. An overall surface of the cured resin portion and dent is etched to form an etched resin layer. An opening is formed in the etched resin layer by thinning the cured resin portion, and a part of the insulating film is exposed in the opening of the etched resin layer. The part of the insulating film is etched using the etched resin layer as a mask to form an opening in the insulating film.
    Type: Grant
    Filed: October 31, 2008
    Date of Patent: May 24, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hideki Yagi, Toshio Nomaguchi, Kenji Hiratsuka
  • Patent number: 7897422
    Abstract: A new structure of a semiconductor optical device and a method to produce the device are disclosed. One embodiment of the optical device of the invention provides a blocking region including, from the side close to the mesa, a p-type first layer and a p-type second layer. The first layer is co-doped with an n-type impurity and a p-type impurity. The doping concentration of the p-type impurity in the first layer is smaller than that in the second layer, so, the first layer performs a function of a buffer layer for the Zn diffusion from the second layer to the active layer in the mesa structure.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: March 1, 2011
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji Hiratsuka
  • Publication number: 20100297789
    Abstract: A method for producing a semiconductor optical device, includes the steps of: (a) forming a semiconductor region on a substrate, the substrate including first and second areas; the first area including device sections (b) forming a first mask on the semiconductor region, the first mask including first patterns periodically arranged in the first area and a second pattern provided in the second area; (c) forming a plurality of periodic structures in each of the device sections and a monitoring structure in the second area by using the first mask, the periodic structures respectively corresponding to the first patterns, the monitoring structure corresponding to the second pattern; (d) measuring a shape of the monitoring structure; (e) selecting a desired periodic structure from the plurality of periodic structures on a basis of a result of measuring the shape of the monitoring structure; (f) forming a second mask including a pattern on the desired periodic structure; and (g) forming stripe mesas including the de
    Type: Application
    Filed: May 18, 2010
    Publication date: November 25, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji Hiratsuka
  • Publication number: 20100291718
    Abstract: A substrate product is formed, and the substrate product includes a first region, a second region, a protrusion structure, and first and second scribe marks. The first region includes sections arranged in first and second axes to form an array, and the second region is provided adjacent to the array. The protrusion structure is provided in the second region; the first and second scribe marks are provided in the second region; the first and second scribe marks extend along first and second reference lines, respectively; and the first and second reference lines define boundary of the sections. After sandwiching the substrate product between films, a first cleavage of the substrate product is performed along the first scribe mark to form a first laser bar and another substrate product, and a second cleavage of the other substrate product is performed along the second scribe mark to form a second laser bar and still another substrate product.
    Type: Application
    Filed: May 12, 2010
    Publication date: November 18, 2010
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventor: Kenji HIRATSUKA
  • Patent number: 7807489
    Abstract: A light-emitting device with a protection layer for Zn inter-diffusion and a process to form the device are described. The device of the invention provides an active layer containing aluminum (Al) as a group III element, typically AlGaInAs, and protection layers containing silicon (Si) to prevent the inter-diffusion of zing (Zn) atoms contained in p-type layers surrounding the active layer. One of protection layers is put between the active layer and the p-type cladding layer, while, the other of protection layers is disposed between the active layer and the p-type burying layer.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: October 5, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Mitsuo Takahashi, Kenji Hiratsuka, Akiko Kumagai
  • Patent number: 7772023
    Abstract: Si atoms obtained by thermal decomposition of SiH4 are adsorbed in advance on one surface of a semiconductor substrate and side surfaces of a semiconductor mesa part. Thereby, prior to the growth of a buried layer, a diffusion protection layer composed of Si-doped InP with high impurity concentration is formed. As a result, when the buried layer is grown, Zn diffusing from an upper cladding layer is trapped by the diffusion protection layer, and interdiffusion between Zn and Fe is inhibited. Since the diffusion protection layer is formed uniformly at a small thickness of several monolayers, the diffusion protection layer is also inhibited from becoming a current leakage path. Consequently, the reliability of the semiconductor optical device can be improved.
    Type: Grant
    Filed: November 20, 2008
    Date of Patent: August 10, 2010
    Assignee: Sumitomo Electric Industries Ltd.
    Inventor: Kenji Hiratsuka
  • Publication number: 20090252190
    Abstract: In a method of fabricating a semiconductor optical device, a semiconductor region is formed by growing an InP lower film, a active region, an InP upper film and a capping film on a substrate sequentially. Material of the capping film is different from that of InP. Next, a mask is formed on the capping film, and the semiconductor region is etched using the mask to form a semiconductor stripe mesa, which includes an InP lower cladding layer, a active layer, an InP upper cladding layer and a capping layer. The active layer comprises aluminum-based III-V compound. A width of the top surface of the capping layer is greater than that of a width of the bottom surface of the capping layer. A width of the top surface of the InP upper cladding layer is smaller than that of the bottom surface of the InP upper cladding layer. The minimum width of the semiconductor mesa is in the InP upper cladding layer.
    Type: Application
    Filed: March 30, 2009
    Publication date: October 8, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Manabu YOSHIMURA, Nobuyuki Ikoma, Kenji Hiratsuka
  • Publication number: 20090142869
    Abstract: Si atoms obtained by thermal decomposition of SiH4 are adsorbed in advance on one surface of a semiconductor substrate and side surfaces of a semiconductor mesa part. Thereby, prior to the growth of a buried layer, a diffusion protection layer composed of Si-doped InP with high impurity concentration is formed. As a result, when the buried layer is grown, Zn diffusing from an upper cladding layer is trapped by the diffusion protection layer, and interdiffusion between Zn and Fe is inhibited. Since the diffusion protection layer is formed uniformly at a small thickness of several monolayers, the diffusion protection layer is also inhibited from becoming a current leakage path. Consequently, the reliability of the semiconductor optical device can be improved.
    Type: Application
    Filed: November 20, 2008
    Publication date: June 4, 2009
    Inventor: Kenji Hiratsuka
  • Publication number: 20090141764
    Abstract: In the method of making a semiconductor laser, a semiconductor region is grown on an active layer, and a part of the semiconductor region is etched to form a ridge structure. An insulating film is formed over the ridge structure, and a resin layer of photosensitive material is formed to bury the ridge structure. A cured resin portion and an uncured resin portion are formed in the resin layer by performing lithographic exposure of the resin layer, and the uncured resin portion is on the top of the ridge structure. The uncured resin portion is removed to form a dent which is provided on the top of the ridge structure. An overall surface of the cured resin portion and dent is etched to form an etched resin layer. An opening is formed in the etched resin layer by thinning the cured resin portion, and a part of the insulating film is exposed in the opening of the etched resin layer. The part of the insulating film is etched using the etched resin layer as a mask to form an opening in the insulating film.
    Type: Application
    Filed: October 31, 2008
    Publication date: June 4, 2009
    Inventors: Hideki Yagi, Toshio Nomaguchi, Kenji Hiratsuka
  • Publication number: 20090032997
    Abstract: The present invention provides a resin pattern formation method. When a mold 10 is pressed against a substrate 20, a spacer portion 14 that it is taller than a protrusion portion 12, makes contact with the substrate 20. As a result, regardless of the density of the protrusion pattern 12, uniform loading can be realized. Consequently, the desired resin pattern 30A can be obtained with high precision, and high production yields can be attained.
    Type: Application
    Filed: July 31, 2008
    Publication date: February 5, 2009
    Inventor: Kenji Hiratsuka
  • Publication number: 20090010291
    Abstract: A light-emitting device with a protection layer for Zn inter-diffusion and a process to form the device are described. The device of the invention provides an active layer containing aluminum (Al) as a group III element, typically AlGaInAs, and protection layers containing silicon (Si) to prevent the inter-diffusion of zing (Zn) atoms contained in p-type layers surrounding the active layer. One of protection layers is put between the active layer and the p-type cladding layer, while, the other of protection layers is disposed between the active layer and the p-type burying layer.
    Type: Application
    Filed: June 18, 2008
    Publication date: January 8, 2009
    Inventors: Mitsuo Takahashi, Kenji Hiratsuka, Akiko Kumagai
  • Publication number: 20080290358
    Abstract: A new structure of a semiconductor optical device and a method to produce the device are disclosed. One embodiment of the optical device of the invention provides a blocking region including, from the side close to the mesa, a p-type first layer and a p-type second layer. The first layer is co-doped with an n-type impurity and a p-type impurity. The doping concentration of the p-type impurity in the first layer is smaller than that in the second layer, so, the first layer performs a function of a buffer layer for the Zn diffusion from the second layer to the active layer in the mesa structure.
    Type: Application
    Filed: April 22, 2008
    Publication date: November 27, 2008
    Inventor: Kenji Hiratsuka
  • Patent number: 7456040
    Abstract: The present invention is to provide a method for manufacturing a semiconductor optical device, in which the unevenness of the burying of the mesa structure may be reduced. The process is configured to form a mask extending along [011] direction on the cap layer, to form a mesa structure by etching the upper cladding layer made of InP, the active region, and the lower cladding layer, to form a surfaces with the (01-1) and the (0-11) planes on both sides of the mesa structure, respectively, by causing the mass transportation, and finally to form the blocking layer by using the mask formed in advance. A semiconductor region with the second conduction type, which is the same with that of the upper cladding layer and is different from that of the lower cladding layer, is grown on the upper cladding layer after removing the mask and the cap layer.
    Type: Grant
    Filed: December 11, 2006
    Date of Patent: November 25, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kouichiro Yamazaki, Kenji Hiratsuka