Patents by Inventor Kenji Kouno

Kenji Kouno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8710568
    Abstract: A semiconductor device includes a semiconductor substrate that includes a plurality of section having different thicknesses. The sections include a first section having a first thickness and a second section having a second thickness, the second section is the thinnest section among all the sections, and the first thickness is greater than the second thickness. A plurality of isolation trenches penetrates the semiconductor substrate for defining a plurality of element-forming regions in the first section and the second section. A plurality of elements is located at respective ones of the plurality of element-forming regions. The elements include a double-sided electrode element that includes a pair of electrodes separately disposed on the first surface and the second surface, and the double-sided electrode element is located in the second section.
    Type: Grant
    Filed: October 23, 2008
    Date of Patent: April 29, 2014
    Assignee: DENSO CORPORATION
    Inventors: Yoshihiko Ozeki, Tetsuo Fujii, Kenji Kouno
  • Patent number: 8648385
    Abstract: A semiconductor device includes a semiconductor substrate with a first surface and a second surface. The semiconductor substrate has an element region including an IGBT region and a diode region located adjacent to the IGBT region. An IGBT element is formed in the IGBT region. A diode element is formed in the diode region. A heavily doped region of first conductivity type is located on the first surface side around the element region. An absorption region of first conductivity type is located on the second surface side around the element region. A third semiconductor region of second conductivity type is located on the second surface side around the element region.
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: February 11, 2014
    Assignee: DENSO CORPORATION
    Inventors: Kenji Kouno, Hiromitsu Tanabe, Yukio Tsuzuki
  • Publication number: 20130344270
    Abstract: The present invention provides a polyethylene-based structure including from 60 to 90% by mass of a polyethylene (A), from 5 to 35% by mass of an acid-modified polyethylene (B) and from 5 to 35% by mass of a m-xylylene group-containing polyamide (C), in which the m-xylylene group-containing polyamide (C) is dispersed in a layer form in the polyethylene (A) to partially form a continuous phase thereof, and has a relative viscosity of from 2.5 to 4.5.
    Type: Application
    Filed: March 7, 2012
    Publication date: December 26, 2013
    Applicant: MITSUBISHI GAS CHEMICAL COMPANY, INC.
    Inventors: Ryoji Otaki, Kenji Kouno
  • Patent number: 8614483
    Abstract: An insulated gate semiconductor device includes a first conductivity-type semiconductor substrate, a second conductivity-type base layer on a first surface side of the substrate, a trench dividing the base layer into channel and floating layers, and a first conductivity-type emitter region that is formed in the channel layer and in contact with the trench. The semiconductor device includes a gate insulation layer in the trench, a gate electrode on the insulation layer, an emitter electrode electrically connected to the emitter region and the floating layer, a second conductivity-type collector layer in the substrate, and a collector electrode on the collector layer. The floating layer has a lower impurity concentration than the channel layer. The floating layer has a first conductivity-type hole stopper layer located at a predetermined depth from the first surface of the substrate and at least partially spaced from the insulation layer.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: December 24, 2013
    Assignee: DENSO CORPORATION
    Inventors: Hiromitsu Tanabe, Yukio Tsuzuki, Kenji Kouno, Tomofusa Shiga
  • Publication number: 20130251927
    Abstract: The molded article includes a resin composition with a single shaft extruder, in which the resin composition is generated by melting and mixing a raw mixture, the raw mixture being obtained by blending 40-90 parts by mass of the polyolefin (A), 3-30 parts by mass of the metaxylylene group-containing polyamide (B), and 3-50 parts by mass of the modified polyolefin (C). In the single shaft extruder, the ratio of the length of the feeding part to the screw effective length is 0.40-0.55, the ratio of the length of the compressing part to the screw effective length is 0.10-0.30, the ratio of the length of the measuring part to the screw effective length is 0.10-0.40, the upper limit of the temperature of the feeding part falls within the range of +20° C. from the melting point of the metaxylylene group-containing polyamide or less, and the temperatures of the compressing part and the measuring part fall within the range of ?30° C. to +20° C.
    Type: Application
    Filed: November 29, 2011
    Publication date: September 26, 2013
    Applicant: Mitsubishi Gas Chemical Company Inc.
    Inventors: Kenji Kouno, Ryoji Otaki
  • Patent number: 8455958
    Abstract: An insulated gate semiconductor device includes a semiconductor substrate, a drift layer on the substrate, a base layer on the drift layer, a ring-shaped gate trench dividing the base layer into a channel layer and a floating layer, an emitter region located in the channel layer to be in contact with a side surface of the gate trench, a well region located on the periphery of a cell area of the base layer and having a depth greater than a depth of the base layer, and a ring-shaped buffer trench located adjacent to and spaced from the gate trench in a length direction of the gate trench. An edge of the well region is located in an area enclosed by the buffer trench in the length direction of the gate trench.
    Type: Grant
    Filed: April 20, 2011
    Date of Patent: June 4, 2013
    Assignee: DENSO CORPORATION
    Inventors: Yukio Tsuzuki, Kenji Kouno
  • Patent number: 8451023
    Abstract: A semiconductor device includes: a semiconductor substrate; a diode-built-in insulated-gate bipolar transistor having an insulated-gate bipolar transistor and a diode, which are disposed in the substrate, wherein the insulated-gate bipolar transistor includes a gate, and is driven with a driving signal input into the gate; and a feedback unit for detecting current passing through the diode. The driving signal is input from an external unit into the feedback unit. The feedback unit passes the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects no current through the diode, and the feedback unit stops passing the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects the current through the diode.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: May 28, 2013
    Assignee: DENSO CORPORATION
    Inventor: Kenji Kouno
  • Publication number: 20130087829
    Abstract: In a semiconductor device including an IGBT and a freewheeling diode (FWD), W1, W2, and W3 satisfy predetermined formulas. W1 denotes a distance from a boundary between a cathode region and a collector region to a position, where a peripheral-region-side end of the well layer is projected, on a back side of the drift layer. W2 denotes a distance from a boundary between the IGBT and the FWD in a base region to the peripheral-region-side end of the well layer. W3 denotes a distance from the boundary between the cathode region and the collector region to a position, where a boundary between the base region and the well layer is projected, on the back side.
    Type: Application
    Filed: June 29, 2011
    Publication date: April 11, 2013
    Applicant: DENSO CORPORATION
    Inventors: Hiromitsu Tanabe, Kenji Kouno, Yukio Tsuzuki
  • Patent number: 8405122
    Abstract: An insulated gate semiconductor device includes a semiconductor substrate, channel regions, floating regions, an emitter region, a body region, a hole stopper layer, and an emitter electrode. The channel regions and the floating regions are repeatedly arranged such that at least one floating region is located between adjacent channel regions. The emitter region and the body region are located in a surface portion of each channel region. The body region is deeper than the emitter region. The hole stopper layer is located in each floating region to divide the floating region into a first region and a second region. The emitter electrode is electrically connected to the emitter region and the first region.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: March 26, 2013
    Assignee: DENSO CORPORATION
    Inventors: Kenji Kouno, Yukio Tsuzuki
  • Publication number: 20130009205
    Abstract: A semiconductor device has a first conductivity-type semiconductor substrate, second conductivity-type channel regions, and second conductivity-type thinning-out regions. The channel regions and the thinning-out regions are formed adjacent to a substrate surface of the semiconductor substrate. Further, a hole stopper layer is formed in each of the thinning-out regions to divide the thinning-out region into a first part adjacent to the substrate surface and a second part adjacent to a bottom of the thinning-out region. The hole stopper layer has an area density of equal to or less than 4.0×1012 cm?2 to permit a depletion layer to punch through the hole stopper layer, thereby to restrict breakdown properties from being decreased.
    Type: Application
    Filed: June 27, 2012
    Publication date: January 10, 2013
    Applicant: Denso Corporation
    Inventors: Yukio TSUZUKI, Kenji Kouno, Hiromitsu Tanabe
  • Publication number: 20120319163
    Abstract: A semiconductor device includes an IGBT forming region and a diode forming region. The IGBT forming region includes an IGBT operating section that operates as an IGBT and a thinned-out section that does not operate as an IGBT. The IGBT operating section includes a channel region, and the thinned-out section includes a first anode region. The diode forming region includes a second anode region. When an area density is defined as a value calculated by integrating a concentration profile of second conductivity type impurities in each of the channel region, the first anode region, and the second anode region in a depth direction, an area density of the channel region is higher than an area density of the first anode region and an area density of the second anode region.
    Type: Application
    Filed: June 13, 2012
    Publication date: December 20, 2012
    Applicant: DENSO CORPORATION
    Inventors: Yukio TSUZUKI, Hiromitsu Tanabe, Kenji Kouno
  • Patent number: 8299539
    Abstract: A semiconductor device includes: a semiconductor substrate; an IGBT element including a collector region; a FWD element including a cathode region adjacent to the collector region; a base layer on the substrate; multiple trench gate structures including a gate electrode. The base layer is divided by the trench gate structures into multiple first and second regions. Each first region includes an emitter region contacting the gate electrode. Each first region together with the emitter region is electrically coupled with an emitter electrode. The first regions include collector side and cathode side first regions, and the second regions include collector side and cathode side second regions. At least a part of the cathode side second region is electrically coupled with the emitter electrode, and at least a part of the collector side second region has a floating potential.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: October 30, 2012
    Assignee: Denso Corporation
    Inventor: Kenji Kouno
  • Patent number: 8288824
    Abstract: A semiconductor device includes a vertical IGBT and a vertical free-wheeling diode in a semiconductor substrate. A plurality of base regions is disposed at a first-surface side portion of the semiconductor substrate, and a plurality of collector regions and a plurality of cathode regions are alternately disposed in a second-surface side portion of the semiconductor substrate. The base regions include a plurality of regions where channels are provided when the vertical IGBT is in an operating state. The first-side portion of the semiconductor substrate include a plurality of IGBT regions each located between adjacent two of the channels, including one of the base regions electrically coupled with an emitter electrode, and being opposed to one of the cathode regions. The IGBT regions include a plurality of narrow regions and a plurality of wide regions.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: October 16, 2012
    Assignee: DENSO CORPORATION
    Inventors: Yukio Tsuzuki, Hiromitsu Tanabe, Kenji Kouno
  • Patent number: 8242536
    Abstract: A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: August 14, 2012
    Assignee: DENSO CORPORATION
    Inventors: Hiromitsu Tanabe, Kenji Kouno, Yukio Tsuzuki, Shinji Amano
  • Publication number: 20120189908
    Abstract: An electric storage device is provided having a structure that can reliably produce the sealing effect between a case and a sealing member. The electric storage device of the present invention includes an electrode assembly; a case that includes a defining wall and houses the electrode assembly; a sealing member that is arranged on the defining wall; and a conductive member that is electrically connected to the electrode assembly, the conductive member being supported by the sealing member, wherein at least a portion of the defining wall where the sealing member is arranged is made of an aluminum-based metallic material; and the sealing member is made of a material that is softer than the material for the at least a portion of the defining wall where the sealing member is arranged.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 26, 2012
    Applicant: GS Yuasa International Ltd.
    Inventors: Masakazu Tsutsumi, Hajime Kawamoto, Katsuhiko Okamoto, Shinsuke Yoshitake, Takuma Tonari, Jun Nakamura, Kenji Kouno
  • Publication number: 20120146091
    Abstract: An insulated gate semiconductor device includes a first conductivity-type semiconductor substrate, a second conductivity-type base layer on a first surface side of the substrate, a trench dividing the base layer into channel and floating layers, and a first conductivity-type emitter region that is formed in the channel layer and in contact with the trench. The semiconductor device includes a gate insulation layer in the trench, a gate electrode on the insulation layer, an emitter electrode electrically connected to the emitter region and the floating layer, a second conductivity-type collector layer in the substrate, and a collector electrode on the collector layer. The floating layer has a lower impurity concentration than the channel layer. The floating layer has a first conductivity-type hole stopper layer located at a predetermined depth from the first surface of the substrate and at least partially spaced from the insulation layer.
    Type: Application
    Filed: December 7, 2011
    Publication date: June 14, 2012
    Applicant: DENSO CORPORATION
    Inventors: Hiromitsu Tanabe, Yukio Tsuzuki, Kenji Kouno, Tomofusa Shiga
  • Publication number: 20120132954
    Abstract: A semiconductor device includes a semiconductor substrate with a first surface and a second surface. The semiconductor substrate has an element region including an IGBT region and a diode region located adjacent to the IGBT region. An IGBT element is formed in the IGBT region. A diode element is formed in the diode region. A heavily doped region of first conductivity type is located on the first surface side around the element region. An absorption region of first conductivity type is located on the second surface side around the element region. A third semiconductor region of second conductivity type is located on the second surface side around the element region.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 31, 2012
    Applicant: DENSO CORPORATION
    Inventors: Kenji KOUNO, Hiromitsu Tanabe, Yukio Tsuzuki
  • Patent number: 8168999
    Abstract: A semiconductor device includes: a substrate; an active element cell area including IGBT cell region and a diode cell region; a first semiconductor region on a first side of the substrate in the active element cell area; a second semiconductor region on a second side of the substrate in the IGBT cell region; a third semiconductor region on the second side in the diode cell region; a fourth semiconductor region on the first side surrounding the active element cell area; a fifth semiconductor region on the first side surrounding the fourth semiconductor region; and a sixth semiconductor region on the second side below the fourth semiconductor region. The second semiconductor region, the third semiconductor region and the sixth semiconductor region are electrically coupled with each other.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: May 1, 2012
    Assignee: DENSO CORPORATION
    Inventors: Yukio Tsuzuki, Kenji Kouno
  • Publication number: 20120056242
    Abstract: A semiconductor device includes a vertical IGBT and a vertical free-wheeling diode in a semiconductor substrate. A plurality of base regions is disposed at a first-surface side portion of the semiconductor substrate, and a plurality of collector regions and a plurality of cathode regions are alternately disposed in a second-surface side portion of the semiconductor substrate. The base regions include a plurality of regions where channels are provided when the vertical IGBT is in an operating state. The first-side portion of the semiconductor substrate include a plurality of IGBT regions each located between adjacent two of the channels, including one of the base regions electrically coupled with an emitter electrode, and being opposed to one of the cathode regions. The IGBT regions include a plurality of narrow regions and a plurality of wide regions.
    Type: Application
    Filed: October 27, 2011
    Publication date: March 8, 2012
    Applicant: DENSO CORPORATION
    Inventors: Yukio TSUZUKI, Hiromitsu Tanabe, Kenji Kouno
  • Publication number: 20120025264
    Abstract: A semiconductor device includes: a semiconductor substrate; a diode-built-in insulated-gate bipolar transistor having an insulated-gate bipolar transistor and a diode, which are disposed in the substrate, wherein the insulated-gate bipolar transistor includes a gate, and is driven with a driving signal input into the gate; and a feedback unit for detecting current passing through the diode. The driving signal is input from an external unit into the feedback unit. The feedback unit passes the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects no current through the diode, and the feedback unit stops passing the driving signal to the gate of the insulated-gate bipolar transistor when the feedback unit detects the current through the diode.
    Type: Application
    Filed: October 11, 2011
    Publication date: February 2, 2012
    Applicant: DENSO CORPORATION
    Inventor: Kenji KOUNO