Patents by Inventor Kenji Sasaki

Kenji Sasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210255556
    Abstract: An electroconductive roll includes a core member, a rubber base material disposed around the core member, and a surface layer disposed around the rubber base material. The arithmetic mean peak curvature Spc of a surface of the surface layer is equal to or greater than 1,880 (1/mm), and is equal to or less than 14,024 (1/mm).
    Type: Application
    Filed: August 29, 2019
    Publication date: August 19, 2021
    Inventors: Kousuke OURA, Shogo SUZUKI, Satoshi FUKUOKA, Kenji SASAKI
  • Publication number: 20210257873
    Abstract: A first portion of an insulator is provided on a first region of an end surface of a tooth. A second portion of the insulator is provided on a second region of the end surface of the tooth so as to be separated from the first portion in a circumferential direction. A third portion of the insulator is connected to fourth side ends of the first portion and the second portion in a radial direction. A coil includes a crossing portion in a coil end. A stator includes an insert body in a housing space. The insert is made of a material having a higher thermal conductivity than a material forming the insulator.
    Type: Application
    Filed: November 21, 2019
    Publication date: August 19, 2021
    Applicant: TOP CO., LTD.
    Inventors: Yuji Amaya, Norihito Shimode, Yuga Hashizume, Takao Sakai, Kenji Sasaki
  • Patent number: 11086149
    Abstract: An electro-optic device is provided with a substrate, an optical waveguide formed of a lithium niobate film with a ridge shape on the substrate, and an electrode that applies an electric field to the optical waveguide. The optical waveguide includes a first waveguide section provided at least in an electric field application region applied with the electric field and having a thickness of 1 ?m or larger and a second waveguide section provided in a region other than the electric field application region and having a thickness of 0.3 ?m or larger and less than 1 ?m.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: August 10, 2021
    Assignees: TDK CORPORATION, FUJITSU OPTICAL COMPONENTS LIMITED
    Inventors: Shinji Iwatsuka, Kenji Sasaki, Hiroki Hara, Yasuhiro Ohmori, Masaharu Doi, Shintaro Takeuchi, Yoshihiko Yoshida, Yoshinobu Kubota
  • Publication number: 20210137078
    Abstract: Provided are a livestock sensor device, a livestock astasia inference method, a livestock astasia inference program, and a livestock management system that are capable of preventing damage to stockbreeders. According to an embodiment of the present technology, there is provided a livestock sensor device including a postural-state determination unit, a state inference unit, a transmission unit, and a casing. The postural-state determination unit determines in which of a prostrate state and a non-prostrate state a livestock animal has been on a basis of output values from an acceleration sensor. The state inference unit infers whether or not the livestock animal has developed astasia on a basis of a duration of the prostrate state. The transmission unit transmits, to a server, an astasia-notification data item indicating that an inference that the livestock animal has developed the astasia is made when the inference that the livestock animal has developed the astasia is made.
    Type: Application
    Filed: July 10, 2018
    Publication date: May 13, 2021
    Inventors: HIDETATSU YAMAMOTO, SEIJI OHISHI, HIDETOSHI ISAWA, KAZUHIKO TSUJI, NAOKI TAMAI, HIDEAKI KAMEI, YOSHINORI USAMI, TAKESHI NEGORO, KOICHI YAMAGUCHI, KAZUYA TERASAKI, OSAMU MIKI, KENJI SASAKI, TOMOYA IMAMURA, MAMI MAMIYA
  • Publication number: 20210125982
    Abstract: On a single-crystal semiconductor substrate with an upper surface including a first direction in which an inverted mesa step extends and a second direction in which a forward mesa step extends in response to anisotropic etching in which an etching rate depends on crystal plane orientation, a bipolar transistor including a collector layer, a base layer, and an emitter layer that are epitaxially grown, and a base wire connected to the base layer are arranged. A step is provided at an edge of the base layer, and the base wire is extended from inside to outside of the base layer in a direction intersecting the first direction in a plan view. An intersection of the edge of the base layer and the base wire has a disconnection prevention structure that makes it difficult for step-caused disconnection of the base wire to occur.
    Type: Application
    Filed: January 6, 2021
    Publication date: April 29, 2021
    Inventors: Kenji SASAKI, Yasuhisa YAMAMOTO
  • Patent number: 10985302
    Abstract: A system and method are provided for repairing an emissive display. Following assembly, the emissive substrate is inspected to determine defective array sites, and defect items are removed using a pick-and-remove process. In one aspect, the emissive substrate includes an array of wells, with emissive elements located in the wells, but not electrically connected to the emissive substrate. If the emissive elements are light emitting diodes (LEDs), then the emissive substrate is exposed to ultraviolet illumination to photoexcite the array of LED, so that LED illumination can be measured to determine defective array sites. The defect items may be determined to be misaligned, mis-located, or non-functional emissive elements, or debris. Subsequent to determining these defect items, the robotic pick-and-remove process is used to remove them. The pick-and-remove process can also be repurposed to populate empty wells with replacement emissive elements.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: April 20, 2021
    Assignee: eLUX, Inc.
    Inventors: Kenji Sasaki, Paul J. Schuele, Kurt Ulmer, Jong-Jan Lee
  • Publication number: 20210108717
    Abstract: A gear shift operation device for a vehicle to which a multiple-stage automatic transmission is mounted, is provided. By a control lever being manually operated in a range switchable mode, a range position is switched at least between a D-range where automatic transmission is performed and an R-range, and by the control lever being manually operated in a manual transmission mode, a gear change is performed. An operation reaction force when the control lever is manually operated is set larger when the gear change is performed in the manual transmission mode than when the range position is switched in the range switchable mode.
    Type: Application
    Filed: September 23, 2020
    Publication date: April 15, 2021
    Inventors: Hajime Oyama, Kenji Sasaki, Junichi Kubo, Hideyuki Nishi, Kenta Kubo, Yasuhiko Shinya, Takashi Hasegawa, Shigeo Yoshikawa
  • Publication number: 20210103165
    Abstract: An electro-optic device is provided with a substrate, an optical waveguide formed of a lithium niobate film with a ridge shape on the substrate, and an electrode that applies an electric field to the optical waveguide. The optical waveguide includes a modulation waveguide provided in an electric field application region applied with the electric field and having a thickness of 1 ?m or larger and a bent waveguide provided in a region other than the electric field application region and having a curvature radius of 16 ?m or larger and 80 ?m or smaller.
    Type: Application
    Filed: March 27, 2020
    Publication date: April 8, 2021
    Inventors: Shinji IWATSUKA, Kenji SASAKI, Hiroki HARA, Yasuhiro OHMORI, Masaharu DOI, Shintaro TAKEUCHI, Yoshihiko YOSHIDA, Yoshinobu KUBOTA
  • Patent number: 10972060
    Abstract: In a radio frequency power amplifier, a semiconductor chip includes at least one first transistor amplifying a radio frequency signal, a first external-connection conductive member connected to the first transistor, a bias circuit including a second transistor that applies a bias voltage to the first transistor, and a second external-connection conductive member connected to the second transistor. The second external-connection conductive member at least partially overlaps with the second transistor when viewed in plan.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: April 6, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Isao Obu, Takayuki Tsutsui
  • Publication number: 20210098403
    Abstract: Two transistor rows are arranged on or in a substrate. Each of the two transistor rows is configured by a plurality of transistors aligned in a first direction, and the two transistor rows are arranged at an interval in a second direction orthogonal to the first direction. A first wiring is arranged between the two transistor rows when seen from above. The first wiring is connected to collectors or drains of the plurality of transistors in the two transistor rows. The first bump overlaps with the first wiring when seen from above, is arranged between the two transistor rows, and is connected to the first wiring.
    Type: Application
    Filed: August 14, 2020
    Publication date: April 1, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Masao KONDO, Kenji SASAKI, Shigeki KOYA, Shinnosuke TAKAHASHI
  • Publication number: 20210091052
    Abstract: A microLED mass transfer stamping system includes a stamp substrate with an array of trap sites, each configured with a columnar-shaped recess to temporarily secure a keel extended from a bottom surface of a microLED. In the case of surface mount microLEDs, the keel is electrically nonconductive. In the case of vertical microLEDs, the keel is an electrically conductive second electrode. The stamping system also includes a fluidic assembly carrier substrate with an array of wells having a pitch separating adjacent wells that matches the pitch separating the stamp substrate trap sites. A display substrate includes an array of microLED pads with the same pitch as the trap sites. The stamp substrate top surface is pressed against the display substrate, with each trap site interfacing a corresponding microLED site, and the microLEDs are transferred. Fluidic assembly stamp substrates are also presented for use with microLEDs having keels or axial leads.
    Type: Application
    Filed: November 23, 2020
    Publication date: March 25, 2021
    Inventors: Paul J. Schuele, Kenji Sasaki, Kurt Ulmer, Jong-Jan Lee
  • Patent number: 10955722
    Abstract: An object of the present invention is to provide a single drive type optical modulator having good high-frequency characteristics and reduced wavelength chirp of the modulated light.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: March 23, 2021
    Assignee: TDK CORPORATION
    Inventors: Shinji Iwatsuka, Kenji Sasaki
  • Publication number: 20210083080
    Abstract: An electrically conductive sub-collector layer is provided in a surface layer portion of a substrate. A collector layer, a base layer, and an emitter layer are located within the sub-collector layer when viewed in plan. The collector layer is connected to the sub-collector layer. An emitter electrode and a base electrode are long in a first direction when viewed in plan. The emitter electrode overlaps the emitter layer. The base electrode and the emitter electrode are discretely located away from each other in a second direction orthogonal to the first direction. A collector electrode is located on one side in the second direction with respect to the emitter electrode and is not located on the other side when viewed in plan. A base line is connected to the base electrode in a manner so as to adjoin a portion other than longitudinal ends of the base electrode.
    Type: Application
    Filed: August 25, 2020
    Publication date: March 18, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenji SASAKI, Yasunari UMEMOTO, Shigeki KOYA, Shinnosuke TAKAHASHI, Masao KONDO
  • Publication number: 20210066479
    Abstract: A compound semiconductor device comprises a heterojunction bipolar transistor including a plurality of unit transistors, a capacitor electrically connected between a RF input wire and a base wire for each unit transistor of the unit transistors, and a bump electrically connected to emitters of the unit transistors. The unit transistors are arranged in a first direction. The bump is disposed above the emitters of the unit transistors while extending in the first direction. The transistors include first and second unit transistors, the respective emitters of the first and second unit transistors being disposed on first and second sides, respectively, of a second direction, perpendicular to the first direction, with respect to a center line of the bump extending in the first direction. The capacitor is not covered by the bump, and respective lengths of the respective base wires connected respectively to the first and second unit transistors are different.
    Type: Application
    Filed: November 13, 2020
    Publication date: March 4, 2021
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kenji SASAKI, Kingo KUROTANI, Takashi KITAHARA, Shigeki KOYA
  • Patent number: 10910484
    Abstract: On a single-crystal semiconductor substrate with an upper surface including a first direction in which an inverted mesa step extends and a second direction in which a forward mesa step extends in response to anisotropic etching in which an etching rate depends on crystal plane orientation, a bipolar transistor including a collector layer, a base layer, and an emitter layer that are epitaxially grown, and a base wire connected to the base layer are arranged. A step is provided at an edge of the base layer, and the base wire is extended from inside to outside of the base layer in a direction intersecting the first direction in a plan view. An intersection of the edge of the base layer and the base wire has a disconnection prevention structure that makes it difficult for step-caused disconnection of the base wire to occur.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: February 2, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenji Sasaki, Yasuhisa Yamamoto
  • Publication number: 20200411933
    Abstract: Rechargeable metal-air battery, air electrodes for use in the metal-air battery, and methods to manufacture the same are provided. The battery includes a negative electrode capable of taking and releasing active metal ions, a porous positive electrode using oxygen as an electroactive material and an electrolyte configured to conduct ions between the negative and positive electrodes and comprising one or more phases, wherein at least one phase comprises a liquid that at least partially fills the pores of the positive electrode and wherein the liquid comprises an oxygen evolving catalyst (OEC). The OEC a) is soluble in the liquid of the phase that partially fills the positive electrode pores, b) is electrochemically activated at a potential above the equilibrium cell voltage and c) is capable of evolving oxygen gas by oxidizing a metal oxide discharge product produced during discharge of the rechargeable metal-air battery.
    Type: Application
    Filed: September 11, 2020
    Publication date: December 31, 2020
    Inventors: Gregory V. Chase, Strahinja ZECEVIC, Wesley T. WALKER, Jasim UDDIN, Kenji A. SASAKI, Vincent P. GIORDANI, Vyacheslav BRYANTSEV, Mario BLANCO, Dan D. ADDISON
  • Patent number: 10868155
    Abstract: A semiconductor device includes a heterojunction bipolar transistor and a bump. The heterojunction bipolar transistor (HBT) includes a plurality of unit transistors. The bump is electrically connected to emitters of the plurality of unit transistors through respective overlying conductor filled via openings that overlap in a plan view with a width portion of the bump. The semiconductor device reduces heat resistance in an HBT cell by satisfying two conditions, the first of which is related to specific sizing and positioning of a width portion of the overlying via opening relative to the width portion of the bump, and the second of which is related to positioning the base electrode entirely within a specific region of the width portion of the overlapping overlying via opening.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: December 15, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Kingo Kurotani, Takashi Kitahara, Shigeki Koya
  • Patent number: 10855132
    Abstract: A bus bar unit includes: a plurality of bus bars arranged to be laminated, the respective bus bars having conductivity, the respective bus bars having a hole part; an insulating member interposed between the bus bars, the insulating member having insulating property, the insulating member having a hole part; a positioning member formed by insulating resin, the positioning member having a pin protruding in direction of laminating the bus bars, the pin being inserted through the hole parts of the bus bars and the hole part of the insulating member; and a fixing part provided at a tip end of the pin, the fixing part being configured to fix the bus bars and the insulating member.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: December 1, 2020
    Assignee: TOP CO., LTD.
    Inventors: Nobuji Houzumi, Kenji Sasaki, Yoshihiro Kodera
  • Publication number: 20200365777
    Abstract: A method is provided for fabricating an encapsulated emissive element. Beginning with a growth substrate, a plurality of emissive elements is formed. The growth substrate top surface is conformally coated with an encapsulation material. The encapsulation material may be photoresist, a polymer, a light reflective material, or a light absorbing material. The encapsulant is patterned to form fluidic assembly keys having a profile differing from the emissive element profiles. In one aspect, prior to separating the emissive elements from the handling substrate, a fluidic assembly keel or post is formed on each emissive element bottom surface. In one variation, the emissive elements have a horizontal profile. The fluidic assembly key has horizontal profile differing from the emissive element horizontal profile useful in selectively depositing different types of emissive elements during fluidic assembly.
    Type: Application
    Filed: August 4, 2020
    Publication date: November 19, 2020
    Inventors: Kenji Sasaki, Paul J. Schuele
  • Patent number: 10840236
    Abstract: A semiconductor device includes a sub-collector layer disposed on a substrate, a bipolar transistor including a collector layer formed of a semiconductor having a lower carrier concentration than the sub-collector layer, a base layer, and an emitter layer, and a protection diode including a Schottky electrode. The Schottky electrode forms, in a partial region of an upper surface of the collector layer, a Schottky junction to the collector layer and is connected to one of the base layer and the emitter layer. In the collector layer, a part that forms a junction to the base layer and a part that forms a junction to the Schottky electrode are electrically connected to each other via the collector layer.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: November 17, 2020
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kenji Sasaki, Isao Obu