Abstract: A multi-layer metal sandwich structure with taper and reduced etch bias formed on a substrate includes a first metal layer formed on the substrate and a second metal layer formed on the first metal layer. The width of the first metal layer is greater than the width of the second metal layer at the interface of the first metal layer and the second metal layer. The second metal layer has tapered side walls. The taper angle between each side wall and the intersection of the first and second metal layers is between 5.degree. and 90.degree.. The multi-layer metal sandwich may also include a third metal layer formed on the second metal layer.

Abstract: An interconnect structure and method for an integrated circuit chip for resisting electromigration is described incorporating patterned interconnect layers of Al or Al-Cu and interlayer contact regions or studs of Al.sub.2 Cu between patterned interconnect layers. The invention overcomes the problem of electromigration at high current density in the interconnect structure by providing a continuous path for Cu and/or Al atoms to move in the interconnect structure.

Abstract: A test system having an improved physical layout and electrical design allows the 1/f noise of metal interconnects to be measured at levels close to that of Johnson or thermal noise. A detailed description of examples of operation of the test system provides evidence of the effectiveness of the test system in minimizing system noise to a level significantly lower than Johnson noise. This permits quantitative measurment of the noise contribution attributable to variations in cross-sectional area of connections for various applications and for qualitative prediction of electromigration lifetimes of metal films, particularly aluminum, having different microstructures. The test system includes an enclosure which includes several nested groups of housings including a sample oven within a device under test box which is, in turn, contained within the system enclosure.

Abstract: A test system having an improved physical layout and electrical design allows the 1/f noise of metal interconnects to be measured at levels close to that of Johnson or thermal noise. A detailed description of examples of operation of the test system provides evidence of the effectiveness of the test system in minimizing system noise to a level significantly lower than Johnson noise. This permits quantitative measurment of the noise contribution attributable to variations in cross-sectional area of connections for various applications and for qualitative prediction of electromigration lifetimes of metal films, particularly aluminum, having different microstructures. The test system includes an enclosure which includes several nested groups of housings including a sample oven within a device under test box which is, in turn, contained within the system enclosure.

Abstract: A low copper concentration multilayered, device interconnect metallurgy, comprises an aluminum-copper (<2 weight percent copper) conductor having formed on one of its surfaces a layer of an intermetallic compound formed from a Group IVA metal and aluminum from the aluminum-copper conductor. The intermetallic compound is formed so as to contain only the single phase line compound of the intermetallic compound.

Abstract: A sputtered low copper concentration multilayered, device interconnect metallurgy structure is disclosed herein. The interconnect metallization structure comprises a sputtered aluminum-copper (<2) weight percent copper conductor. In the preferred embodiment, the AlCu conductor has formed on one or both of its surfaces a layer of an intermetallic compound formed from a Group IVA metal and aluminum. The Group IVA metal is deposited by sputtering. Optionally, onto said top intermetallic layer is further deposited a non-reflective, non-corrosive, etch-stop, capping layer.

Abstract: Disclosed is a method of chem-mech polishing an electronic component substrate. The method includes the following steps;obtaining a substrate having at least two features thereon or therein which have a different etch rate with respect to a particular etchant; andcontacting the substrate with a polishing pad while contacting the substrate with a slurry containing the etchant wherein the slurry includes abrasive particles, a transition metal chelated salt and a solvent for the salt.The chem-mech polishing causes the at least two features to be substantially coplanar. Also disclosed is the chem-mech polishing slurry.