Abstract: A wiring board composite body includes a supporting substrate, and wiring boards formed on each of the upper and the lower surfaces of the supporting substrate. The supporting substrate includes a supporting body, and a metal body arranged on each of the upper and the lower surfaces of the supporting body. The wiring board comprises at least an insulation layer insulating upper and lower wirings, and a via connecting the upper and the lower wirings. The wiring board mounted on the metal body constitutes a wiring board with the metal body. Thus, the supporting body supporting the metal body is effectively used in a process of forming the wiring board on the metal body, and the wiring board composite body, which has advantageous structural and production characteristics, is provided. A semiconductor device and a method for manufacturing such wiring board composite body and the semiconductor device are also provided.

Abstract: An interconnecting substrate is provided with a base insulating film having a sunken section in a bottom surface thereof, a first interconnection provided in the sunken section, a via hole formed in the base insulating film, and a second interconnection which is connected to the first interconnection via a conductor within the via hole and is formed on a top surface of the base insulating film, wherein the interconnecting substrate includes a first interconnection pattern formed of the first interconnection which includes at least a linear pattern which extends along a second direction orthogonal to a first direction, and a warpage-controlling pattern which is provided in the sunken section in the bottom surface of the base insulating film and is formed in such a manner as to suppress a warpage of the interconnecting substrate toward a bottom side on both sides of the first direction.

Abstract: A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed.

Abstract: A wiring board for mounting a semiconductor element or electronic component having a plurality of wiring layers, an insulating layer provided between these wiring layers, and a via which is provided to the insulating layer and which electrically connects the wiring layers. In this wiring board, the cross-sectional shape of the via in the plane parallel to the wiring layers is obtained by the partial overlapping of a plurality of similar shapes (circles). Stable operation can be obtained in a semiconductor element by minimizing obstacles to increased density, effectively increasing the cross-sectional area of the via, and preventing the wiring resistance from increasing by making the cross-sectional shape of the via into a shape obtained by the partial overlapping of a plurality of similar shapes.

Abstract: An electronic component manufacturing method including: a step of mounting a bump formation material on a first wiring substrate 100 to melt the bump formation material to form a bump 200 at the wiring substrate 100; a step of pressing a jig onto the bump 200 to form a recessed portion 220 having a front end portion 202; a step of printing a solder paste 420 onto an electrode 410 of a second wiring substrate 400; a step of performing, on the solder paste 420, positional alignment of the bump 200 on the wiring substrate 100 to allow the front end portion 202 to be in contact with the bump; and a step of heating the wiring substrate 400 on which the wiring substrate 100 is mounted, wherein the recessed portion 220 is formed from the bump front end portion 202 toward an outer periphery 230 in contact with the solder paste 420.

Abstract: A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film. The second interconnection is connected to the first interconnection via the via. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, with a warped shape such that when the wiring substrate rests on a horizontal plate, at least a central part of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised.

Abstract: A wiring board has an insulating layer, a plurality of wiring layers formed in such a way as to be insulated from each other by the insulating layer, and a plurality of vias formed in the insulating layer to connect the wiring layers. Of the wiring layers, a surface wiring layer formed in one surface of the insulating layer include a first metal film exposed from the one surface and a second metal film embedded in the insulating layer and stacked on the first metal film. Edges of the first metal film project from edges of the second metal film in the direction in which the second metal film spreads. By designing the shape of the wiring layers embedded in the insulating layer in this manner, it is possible to obtain a highly reliable wiring board that can be effectively prevented from side etching in the manufacturing process and can adapt to miniaturization and highly dense packaging of wires.

Abstract: A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, and has a warped shape such that when the wiring substrate is left at rest on a horizontal plate, at least a central part of each side of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised, where each of the sides extends along a second direction perpendicular to a first direction in the plane surface of the substrate.

Abstract: A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, and has a warped shape such that when the wiring substrate is left at rest on a horizontal plate, at least a central part of each side of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised, where each of the sides extends along a second direction perpendicular to a first direction in the plane surface of the substrate.

Abstract: A resin sealed IC has a plurality of external terminals. A metal thin film made of a Sn—Bi alloy is formed in direct contact with the surface of a base member of each external terminal. A Bi content in the Sn—Bi alloy layer is within a range of 0.5 to 6.0 wt %. Further, the Sn—Bi alloy layer has a single-layer plating structure, and the film thickness is within a range of 10 to 25 MIC.

Abstract: A resin sealed IC has a plurality of external terminals. A metal thin film made of a Sn—Bi alloy is formed in direct contact with the surface of a base member of each external terminal. A Bi content in the Sn—Bi alloy layer is within a range of 0.5 to 6.0 wt %. Further, the Sn—Bi alloy layer has a single-layer plating structure, and the film thickness is within a range of 10 to 25 MIC.

Abstract: A wiring board in which lower-layer wiring composed of a wiring body and an etching barrier layer is formed in a concave portion formed on one face of a board-insulating film, upper-layer wiring is formed on the other face of the board-insulating film, and the upper-layer wiring and the wiring body of the lower-layer wiring are connected to each other through a via hole formed in the board-insulating film. The via hole is barrel-shaped, bell-shaped, or bellows-shaped.

Abstract: A wiring board for mounting a semiconductor element or electronic component having a plurality of wiring layers, an insulating layer provided between these wiring layers, and a via which is provided to the insulating layer and which electrically connects the wiring layers. In this wiring board, the cross-sectional shape of the via in the plane parallel to the wiring layers is obtained by the partial overlapping of a plurality of similar shapes (circles). Stable operation can be obtained in a semiconductor element by minimizing obstacles to increased density, effectively increasing the cross-sectional area of the via, and preventing the wiring resistance from increasing by making the cross-sectional shape of the via into a shape obtained by the partial overlapping of a plurality of similar shapes.

Abstract: An interconnecting substrate is provided with a base insulating film having a sunken section in a bottom surface thereof, a first interconnection provided in the sunken section, a via hole formed in the base insulating film, and a second interconnection which is connected to the first interconnection via a conductor within the via hole and is formed on a top surface of the base insulating film, wherein the interconnecting substrate comprises a first interconnection pattern formed of the first interconnection which comprises at least a linear pattern which extends along a second direction orthogonal to a first direction, and a warpage-controlling pattern which is provided in the sunken section in the bottom surface of the base insulating film and is formed in such a manner as to suppress a warpage of the interconnecting substrate toward a bottom side on both sides of the first direction.

Abstract: An external terminal of an electronic component is provided with a lead base material and a metal thin film coating a surface of the lead base material, and an average value of a crystal size index is not less than 7, which is defined based on dimensions of a crystal particle in a direction perpendicular to the lead base material surface and in a direction parallel thereto, taken on a cut surface of the metal thin film defined by a given plane cutting the metal thin film in a direction perpendicular to the lead base material surface. Such constitution provides an electronic component having an external terminal coated with a metal thin film of a simple structure constituted of Sn or a Sn-based and substantially Pb-free alloy, formed by plating on a surface of a lead base material.

Abstract: An external terminal of an electronic component is provided with a lead base material and a metal thin film coating a surface of the lead base material, and an average value of a crystal size index is not less than 7, which is defined based on dimensions of a crystal particle in a direction perpendicular to the lead base material surface and in a direction parallel thereto, taken on a cut surface of the metal thin film defined by a given plane cutting the metal thin film in a direction perpendicular to the lead base material surface. Such constitution provides an electronic component having an external terminal coated with a metal thin film of a simple structure constituted of Sn or a Sn-based and substantially Pb-free alloy, formed by plating on a surface of a lead base material. Yet such electronic component can effectively restrain emergence of a whisker on the outer plated layer under a circumstance of practical use.

Abstract: A resin sealed IC has a plurality of external terminals. A metal thin film made of a Sn-Bi alloy is formed in direct contact with the surface of a base member of each external terminal. A Bi content in the Sn-Bi alloy layer is within a range of 0.5 to 6.0 wt %. Further, the Sn-Bi alloy layer has a single-layer plating structure, and the film thickness is within a range of 10 to 25 MIC.

Abstract: There is disclosed a fabrication method comprising: stacking and forming an Ni bond layer 3 and oxidation preventive layer 4 on a Cu interconnection layer 2 formed on the surface of a BGA package 1 in an electroless plating process; and applying a flux 5 to coat the oxidation preventive layer 4. Moreover, the method comprises: laying a Cu-added solder ball bump 6 onto the oxidation preventive layer 4; and performing a heat treatment in a temperature range of 190° C. to 220° C. to melt/bond the bump into the Ni bond layer 3. Sn and Cu in the Cu-added solder ball bump 6 rapidly react with Ni in the Ni bond layer 3 to form a diffusion inhibitive alloy layer 7. Subsequently, an electrode pad 10 on a mother board 9 which is a interconnection substrate is molten/bonded into the Cu-added solder ball bump 6, and a semiconductor device 8 is mounted on a mother board 9.

Abstract: An electronic component is provided with a connection conductive layer containing a 0.05 weight percent to 1.5 weight percent of nickel in a Sn—Bi (tin-bismuth) alloy on a surface of a lead used as an external terminal. Nickel (Ni) crystallizes as a deposition phase in a tin-bismuth alloy structure and acts to inhibit component atoms making up the Sn—Bi alloy from migrating along a crystal grain boundary between two tin (Sn) crystal grains being adjacent to each other. Therefore, a secular change of the alloy structure of the Sn—Bi alloy used as the connection conductive layer becomes small.

Abstract: The present invention provides a plating apparatus comprising: a plating bath filled with a plating solution; at least an anode in the plating solution; at least a plating object which serves as a cathode in the plating solution, so that the at least plating object is distanced from the at least anode; and at least a dummy cathode in the plating solution, so that the at least dummy cathode is applied with voltage to suppress a substitute-deposition of metal ions in the plating solution.