Abstract: Systems, methods and data structures are provided for representing robust data transmitted within a control system. The data structure includes at least two data fields identifying sub-modules and sub-modes of the control system, and optionally includes a third field for designating a primary operating mode of the control system and/or a fourth field representing a handshaking bit or value. The operating modes, sub-modes and sub-module designators are represented by values of the bits selected such that no single bit transition results in the selection of another valid operating state of the control system. As a result, single bit errors will not produce erroneous operating results. Similar concepts can be optionally applied to ensure that errors in contiguous sets of four, eight or any other number of bits do not produce valid states represented by the data structure.

Abstract: Method and systems are described for testing an address line inter-coupling a processor and a memory. The contents of a first address in the memory are initially compared with the contents of a second address in the memory, wherein each of the first and second addresses are addressable in the memory by a different value applied on the address line. If the contents of the first and second addresses match, the contents of either one of the first and second addresses are changed, and a subsequent comparison of the contents of the first and second memory addresses is performed. If the second comparison determines that contents of the first and second memory address still match, then a fault condition associated with the address line is identified.

Abstract: Integrity of data stored in a memory space associated with a vehicle-based control system (such as a traction enhancement system) is verified through the use of sub-module checksums. A checksum for one or more subsystem modules is initially calculated based upon a checksum routine and the values of data residing in the portions of the memory space associated with the subsystem of interest. A global checksum is also initially calculated based upon data associated with the entire memory space. If the global checksum matches an expected value, the subsystem checksum(s) are stored as expected subsystem checksums. During subsequent operation, a second subsystem checksum is calculated and compared against the expected checksum value for the subsystem to verify the integrity of data residing within the memory space associated with the subsystem.

Abstract: A method of encoding data related to voltages for each of a plurality of battery cells for transmission in a hybrid vehicle includes the steps of generating a plurality of voltage groups, and generating a validity measure for each of the plurality of voltage groups. Each of the plurality of voltage groups comprises the voltages for a different combination of the plurality of battery cells.

Abstract: A method for controlling steering in a vehicle includes the steps of obtaining a vehicle steering communication, controlling an actuator coupled to a hand wheel, a road wheel, or both using a primary active steering functionality, if the vehicle steering communication reflects one or more of a plurality of types of specified errors, and controlling the actuator using the primary active steering functionality and a supplemental active steering functionality, if the vehicle steering communication does not reflect one or more of the plurality of types of specified errors.

Abstract: Method and systems are described for testing an address line inter- coupling a processor and a memory. The contents of a first address in the memory are initially compared with the contents of a second address in the memory, wherein each of the first and second addresses are addressable in the memory by a different value applied on the address line. If the contents of the first and second addresses match, the contents of either one of the first and second addresses are changed, and a subsequent comparison of the contents of the first and second memory addresses is performed. If the second comparison determines that contents of the first and second memory address still match, then a fault condition associated with the address line is identified.

Abstract: A method for operating a vehicle electronic stability control (“ESC”) system utilizing values for a variable obtained from a primary source and a redundant source includes the steps of receiving a first value for the variable from the primary source, receiving a second value for the variable from the redundant source, generating a normalized value as a function of the first value and the second value, determining whether the primary source is operating correctly, utilizing the first value for operation of the vehicle ESC system if the primary source is operating correctly, and utilizing the second value for operation of the vehicle ESC system if the primary source is not operating correctly and the second value is not greater in absolute value than the normalized value.

Abstract: A vehicle control module for controlling an actuator unit in response to an input having a first processor, a first communication link coupled to the first processor, and a second processor coupled to the first processor via the first communication link. The first processor is configured to generate a first value based on the input, transmit the first value to the actuator unit, and receive a second value from the actuator unit based on a data received by the actuator unit from the first processor. The first communication link is configured to transfer the input and the second value to the second processor. The second processor is configured to determine a third value based on the input, and verify the first value based on a comparison of the second value with the third value.

Abstract: A vehicle parametric active front steering (AFS) system remedial action is described herein. AFS system modules inter-communicate via messages containing parameters. The AFS system detects a message error, determines an invalid parameter, and takes appropriate remedial action. An error is detected if an error condition is satisfied or if occurrence of incorrect messages reaches or exceeds a certain predetermined frequency. The AFS system takes the remedial action by setting default values of valid parameters corresponding to the invalid parameter.

Abstract: A method and apparatus is provided for validating a plurality of variable data transmitted in an automobile, comprising generating a control copy and a redundant copy of the variable data, calculating a pre-transmittal cross-check measure using the redundant copy of the variable data, and generating a transmittal message using the control copy of the data and the pre-transmittal cross-check measure.

Abstract: A method of providing secure data from vehicle operational variable data that includes a plurality of data message bits includes the steps of dividing the plurality of data message bits into a first group of data message bits and a second group of data message bits, encoding the first group of data message bits using a data map to generate a plurality of encoded data message bits, and generating the data message from the plurality of encoded data message bits and the second group of data message bits.

Abstract: A method for validating a processor with a memory in a vehicle control system includes the steps of receiving a test seed, retrieving a pre-stored test key from the processor memory, calculating a check value using the test seed, and comparing the check value to the pre-stored test key.

Abstract: A system and method for secure and restricted transitions between steering control modes for a vehicle with active front steering is disclosed. Possible operating control modes include precision, electric phase locking, and proportional integral derivative (PID) modes. Each operating control mode is monitored and the operational status of the modes are checked before transitioning. For security, the system can prevent transitions from PID to precision control mode and restrict electric phase locking mode to transition only to a mechanical locking mode.

Abstract: A method and apparatus is provided for detecting random access memory (RAM) failure for data with a plurality of addresses. The method comprises generating a plurality of RAM test patterns in a predetermined order, implementing a RAM test pattern on each data address in an initial testing pass, based on the predetermined order of the RAM test patterns, rotating the RAM test patterns sequentially to prepare for a new testing pass, and implementing the RAM test patterns on different data addresses in the new testing pass. The apparatus comprises means for generating a plurality of RAM test patterns in a predetermined order, means for implementing a RAM test pattern on each data address in an initial testing pass, based on the predetermined order of the RAM test patterns, means for rotating the RAM test patterns sequentially to prepare for a new testing pass, and means for implementing the RAM test patterns on different data addresses in the new testing pass.

Abstract: A method and apparatus is provided for improving integrity in data representing a plurality of condition states of a variable, comprising the steps of determining which condition states are operationally incompatible with one another, and generating an array of transformed integer values comprising a separate integer value for each condition state. The transformed integer value for each condition state in binary form is at least two bit errors removed from any transformed integer value for an identified incompatible condition state in binary form.

Abstract: A sensor module adjustment circuit includes a device have a position between minimum and maximum positions. First and second position sensors sense the position of the device and generate first and second position values, respectively. A sensor module includes first and second signal conversion modules that generate first and second signal waveforms based on the first and second position values, that include first and second gain modules, and that vary a frequency and a duty cycle, respectively, of the first and second signal waveforms based on the first and second position values. A gain magnitude module determines first and second signal gains of the first and second gain modules, respectively. A signal preset module adjusts the first and second signal gains so that the first and second signal waveforms are equal to first and second predetermined signal waveforms, respectively, when the position of the device is fixed.

Abstract: A method and system for coordinating a vehicle stability control system with a suspension damper control sub-system includes a plurality of dampers, each of which are controlled directly by the suspension damper control sub-system. A plurality of sensors sense a plurality of vehicle parameters. A supervisory controller generates vehicle damper commands based on the plurality of vehicle parameters for each of the dampers. A damper controller in electrical communication with the supervisory controller receives the vehicle damper commands and generates sub-system damper commands based on a portion of the plurality of vehicle parameters for each of the dampers. The damper controller also determines if any of the vehicle damper commands for any one of the dampers has authority over the corresponding sub-system damper command.

Abstract: An engine control system includes an engine with an output shaft. A power take-off device interfaces with the output shaft and provides rotational power to an auxiliary device. A user input device includes a first engine speed control that commands an increase in engine speed by a first amount to increase the rotational power to the auxiliary device when a user selects the first engine speed control. A second engine speed control commands an increase in engine speed by a second amount that is greater than the first amount to increase the rotational power to the auxiliary device when the user selects the second engine speed control. The user input device includes a speed cancellation control that commands a reversal of a net increase in the speed of the engine that is commanded via the user input device when the user selects the speed cancellation control.

Abstract: A system as described herein relates generally to automotive active front steering control systems having a main processor and a redundant sub-processor. The system provides a way of controlling the electrical and mechanical locking of an actuator motor in a variable gear ratio active front steering system. The method enables the sub-processor to electrically lock the active front steer actuator motor via the main processor to reduce mechanical wear or damage to the variable gear ratio system if the main processor is unable to electrically lock the actuator motor before it mechanically locks the actuator motor. The system also provides an error detecting technique that is robust to false failures and allows the active front steering system to safely transition into a fail safe mode if an error occurs.

Abstract: A vehicle active front steering (AFS) control system is described herein. The AFS system utilizes variable gear ratio and lead steer control methodologies. The AFS system utilizes independent and supervisory control systems to control the AFS system parameters in accordance with designated security metrics, to lower the time to lock the AFS system angle actuator in the event the security metrics are not met, and to lower likelihood of fault detection errors by checking a difference between a target road wheel angle and an actual road wheel angle obtained from a first control path and, for added security, by checking a difference between the target road wheel angle and the actual road wheel angle from a second control path, as a function of the vehicle velocity. The techniques described herein may check a value of an AFS control parameter from the first control path to the value of the same AFS control parameter from the second control path.