Patents by Inventor Kevin B. Traylor

Kevin B. Traylor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9608587
    Abstract: Method embodiments are provided herein for dynamically calibrating and adjusting a direct conversion receiver system. One embodiment includes applying one or more gain control signals to one or more gain elements of a receiver system, where the applying one or more gain control signals results in a gain change to the receiver system; in response to the gain change, determining whether the receiver system exhibits a DC (direct conversion) offset; and in response to a determination that the receiver system exhibits the DC offset, applying one or more DC offset correction control signals to one or more gain elements of the receiver system, where the one or more DC offset correction signals are configured to correct the DC offset.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: March 28, 2017
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Khurram Waheed, Steven M Bosze, Keith A Tilley, Kevin B Traylor
  • Publication number: 20160380788
    Abstract: Method embodiments are provided herein for dynamically calibrating and adjusting a direct conversion receiver system. One embodiment includes applying one or more gain control signals to one or more gain elements of a receiver system, where the applying one or more gain control signals results in a gain change to the receiver system; in response to the gain change, determining whether the receiver system exhibits a DC (direct conversion) offset; and in response to a determination that the receiver system exhibits the DC offset, applying one or more DC offset correction control signals to one or more gain elements of the receiver system, where the one or more DC offset correction signals are configured to correct the DC offset.
    Type: Application
    Filed: June 25, 2015
    Publication date: December 29, 2016
    Inventors: KHURRAM WAHEED, STEVEN M. BOSZE, KEITH A. TILLEY, KEVIN B. TRAYLOR
  • Patent number: 9484936
    Abstract: An integrated circuit comprises a dual port modulator and a voltage controlled oscillator (VCO). The dual port modulator has a first input for receiving a transmitter modulation signal, a first output for providing a fractional portion of a high port modulation signal, a second output for providing a integer portion of the high port modulation signal, and a third output for providing a low port modulation signal. The VCO is coupled to the dual port modulator and has a first input for receiving the fractional portion of the high port modulation signal, a second input for receiving the integer portion of the high port modulation signal, a third input for receiving a tuning signal based on the low port modulation signal, and a first output for outputting an RF signal. The dual port modulator provides a signed single bit signal for generating the fractional portion of the high port modulation signal.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: November 1, 2016
    Assignee: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Khurram Waheed, Kevin B. Traylor
  • Patent number: 9479288
    Abstract: A technique for frame synchronization in a communication system includes performing symbol correlation on received signal samples. A determination is made as to whether a magnitude of the symbol correlation is greater than a first threshold. In response to the magnitude of the symbol correlation being greater than the first threshold, an indication is provided that the received symbol is a valid symbol (e.g., a SYNCP symbol or SYNCM symbol). In response to the magnitude of the symbol correlation being less than the first threshold, an indication is provided that the received symbol is an indeterminate symbol (e.g., an invalid symbol or a SYNCM/2 symbol).
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: October 25, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kuhurram Waheed, Steven M. Bosze, Kevin B. Traylor, Jianqiang Zeng
  • Patent number: 9444661
    Abstract: A receiver system includes a DC (direct current) offset estimation block configured to capture a plurality of sample pairs, each sample pair including a first sample of a first signal and a second sample of a second signal. The first and second signals are passed through one or more gain elements. The DC offset estimation block is also configured to apply a modified circle-fit algorithm to the plurality of sample pairs to estimate a first DC offset exhibited by the first signal and a second DC offset exhibited by the second signal, the first and second DC offsets generated by the gain elements, the modified circle-fit algorithm includes a magnitude approximation term used to iteratively estimate the first and second DC offsets. The receiver system also includes a DC offset correction block configured to calculate one or more correction control signals based on the first and second DC offsets.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: September 13, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Khurram Waheed, Kevin B. Traylor
  • Publication number: 20160248430
    Abstract: An integrated circuit comprises a dual port modulator and a voltage controlled oscillator (VCO). The dual port modulator has a first input for receiving a transmitter modulation signal, a first output for providing a fractional portion of a high port modulation signal, a second output for providing a integer portion of the high port modulation signal, and a third output for providing a low port modulation signal. The VCO is coupled to the dual port modulator and has a first input for receiving the fractional portion of the high port modulation signal, a second input for receiving the integer portion of the high port modulation signal, a third input for receiving a tuning signal based on the low port modulation signal, and a first output for outputting an RF signal. The dual port modulator provides a signed single bit signal for generating the fractional portion of the high port modulation signal.
    Type: Application
    Filed: February 25, 2015
    Publication date: August 25, 2016
    Inventors: KHURRAM WAHEED, KEVIN B. TRAYLOR
  • Publication number: 20160218893
    Abstract: A receiver system includes a DC (direct current) offset estimation block configured to capture a plurality of sample pairs, each sample pair including a first sample of a first signal and a second sample of a second signal. The first and second signals are passed through one or more gain elements. The DC offset estimation block is also configured to apply a modified circle-fit algorithm to the plurality of sample pairs to estimate a first DC offset exhibited by the first signal and a second DC offset exhibited by the second signal, the first and second DC offsets generated by the gain elements, the modified circle-fit algorithm includes a magnitude approximation term used to iteratively estimate the first and second DC offsets. The receiver system also includes a DC offset correction block configured to calculate one or more correction control signals based on the first and second DC offsets.
    Type: Application
    Filed: January 23, 2015
    Publication date: July 28, 2016
    Inventors: Khurram WAHEED, Kevin B. TRAYLOR
  • Patent number: 9282525
    Abstract: Methods and systems are disclosed for frequency-domain symbol and frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency components associated with subcarriers within the multi-carrier communication signals. Symbol synchronization is performed in the frequency domain by performing correlation(s) between frequency components of the received signal and frequency-domain synchronization symbol(s). After symbol synchronization, frame synchronization correlation is also performed in the frequency domain between frequency components of the received signal and frequency-domain synchronization symbol(s). The disclosed embodiments are particularly useful for symbol and frame synchronization in multi-carrier received signals for power line communication (PLC) systems and/or other harsh noisy communication environments.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: March 8, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor, Khurram Waheed
  • Publication number: 20150365224
    Abstract: A technique for frame synchronization in a communication system includes performing symbol correlation on received signal samples. A determination is made as to whether a magnitude of the symbol correlation is greater than a first threshold. In response to the magnitude of the symbol correlation being greater than the first threshold, an indication is provided that the received symbol is a valid symbol (e.g., a SYNCP symbol or SYNCM symbol). In response to the magnitude of the symbol correlation being less than the first threshold, an indication is provided that the received symbol is an indeterminate symbol (e.g., an invalid symbol or a SYNCM/2 symbol).
    Type: Application
    Filed: June 17, 2014
    Publication date: December 17, 2015
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: KUHURRAM WAHEED, STEVEN M. BOSZE, KEVIN B. TRAYLOR, JIANQIANG ZENG
  • Patent number: 9106499
    Abstract: Methods and systems are disclosed for frequency-domain frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency domain components associated with subcarriers within the multi-carrier communication signals. A sliding-window correlation (e.g., two-dimensional sliding window) is applied to the received symbols represented in the frequency domain to detect frame boundaries for multi-carrier signals. The sliding-window frame synchronization can be applied by itself or can be applied in combination with one or more additional frame synchronization stages. The disclosed embodiments are particularly useful for frame synchronization of multi-carrier signals in PLC (power line communication) systems.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: August 11, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor
  • Patent number: 9100261
    Abstract: Methods and systems are disclosed for frequency-domain amplitude normalization for symbol correlation in multi-carrier communication systems. Digital samples associated with input signals received from a communication medium are processed using a Fast Fourier Transform (FFT) to generate complex frequency components. Each complex frequency component is normalized with respect to its amplitude, and the frequency-domain, amplitude-normalized frequency components are multiplied with frequency components for reference symbol(s) to generate frequency-domain correlation values. These frequency-domain correlation values are analyzed to determine if a correlation exists between the amplitude-normalized frequency components and the predetermined reference frequency components. A correlation detection output is then generated that indicates whether or not a symbol synchronization was achieved.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: August 4, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor
  • Patent number: 9008223
    Abstract: A transmitter and method for processing a digitally modulated communication signal, which may reduce peak-to-average-power-ratio (PAPR) while maintaining acceptable error rates is disclosed. After subcarrier mapping, a first digital representation of the signal is upsampled into a second digital representation, which is transformed into a first time domain representation. Samples whose magnitudes exceed a magnitude limit are limited to that limit to produce a second time domain representation. The second time domain representation is transformed to a third frequency domain representation, which is downsampled into a fourth frequency domain representation. In addition to the in-band subcarriers, some out-of-band subcarriers adjacent to the frequency band are preserved while the remaining out-of-band subcarriers are eliminated to produce a fifth frequency domain representation.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: April 14, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Raja V. Tamma, Kevin B. Traylor, Jianqiang Zeng
  • Publication number: 20140376648
    Abstract: Methods and systems are disclosed for frequency-domain amplitude normalization for symbol correlation in multi-carrier communication systems. Digital samples associated with input signals received from a communication medium are processed using a Fast Fourier Transform (FFT) to generate complex frequency components. Each complex frequency component is normalized with respect to its amplitude, and the frequency-domain, amplitude-normalized frequency components are multiplied with frequency components for reference symbol(s) to generate frequency-domain correlation values. These frequency-domain correlation values are analyzed to determine if a correlation exists between the amplitude-normalized frequency components and the predetermined reference frequency components. A correlation detection output is then generated that indicates whether or not a symbol synchronization was achieved.
    Type: Application
    Filed: June 24, 2013
    Publication date: December 25, 2014
    Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor
  • Publication number: 20140376540
    Abstract: Methods and systems are disclosed for frequency-domain symbol and frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency components associated with subcarriers within the multi-carrier communication signals. Symbol synchronization is performed in the frequency domain by performing correlation(s) between frequency components of the received signal and frequency-domain synchronization symbol(s). After symbol synchronization, frame synchronization correlation is also performed in the frequency domain between frequency components of the received signal and frequency-domain synchronization symbol(s). The disclosed embodiments are particularly useful for symbol and frame synchronization in multi-carrier received signals for power line communication (PLC) systems and/or other harsh noisy communication environments.
    Type: Application
    Filed: June 24, 2013
    Publication date: December 25, 2014
    Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor, Khurram Waheed
  • Publication number: 20140376674
    Abstract: Methods and systems are disclosed for frequency-domain frame synchronization for multi-carrier communication systems. Received signals are sampled and converted into frequency domain components associated with subcarriers within the multi-carrier communication signals. A sliding-window correlation (e.g., two-dimensional sliding window) is applied to the received symbols represented in the frequency domain to detect frame boundaries for multi-carrier signals. The sliding-window frame synchronization can be applied by itself or can be applied in combination with one or more additional frame synchronization stages. The disclosed embodiments are particularly useful for frame synchronization of multi-carrier signals in PLC (power line communication) systems.
    Type: Application
    Filed: June 24, 2013
    Publication date: December 25, 2014
    Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor
  • Publication number: 20140376667
    Abstract: Methods and systems are disclosed for frequency-domain carrier blanking in multi-carrier communication systems. When excessive energy is detected in one or more subcarriers within a received symbol for multi-carrier communications, those subcarriers are blanked for subsequent demodulation in order to avoid corruption of the demodulated data. A conversion from time-domain digital samples to frequency-domain values using an FFT (Fast Fourier Transform) and a threshold detector are utilized to detect corrupted subcarriers. Further, this frequency-domain carrier blanking can be implemented dynamically on a symbol-by-symbol basis to further improve demodulation performance by reducing decoding errors. The disclosed embodiments are particularly useful for improving demodulation performance in power line communication (PLC) systems.
    Type: Application
    Filed: June 24, 2013
    Publication date: December 25, 2014
    Inventors: Jianqiang Zeng, Steven M. Bosze, Raja V. Tamma, Kevin B. Traylor
  • Patent number: 8811932
    Abstract: A method and system for wireless communications between base and mobile stations use reference signals transmitted from base stations prior transmission of data signals. The reference signals are used to determine propagation characteristics of communication channels between the base and mobile stations and optimize, in real time, parameters of receivers of the mobile stations for processing the following data signals. Applications of the invention include wireless communication systems compliant with OFDMA, 3GPP LTE, RFN-OFDMA, OFDM, TDMA, and the like communication protocols.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: August 19, 2014
    Assignee: Apple Inc.
    Inventors: Leo G. Dehner, James W. McCoy, Kevin B. Traylor
  • Patent number: 8548400
    Abstract: Systems and techniques are described for applying a polar bias modulation having a phase component and an amplitude component to a signal amplified by a power amplifier. The power amplifier (PA) has a plurality of amplifier gain stages and is configured to amplify an input to create an amplifier output signal. The input to the power amplitude is phase modulated based upon the phase component of the polar bias modulation, but need not be amplitude modulated. Amplitude modulation is provided by logic that includes a detector configured to receive an indication of the amplifier output as a feedback signal, a control module configured to generate a control signal based upon both the feedback signal and the amplitude component of the polar bias modulation, and a bias circuit configured to adjust a bias signal associated with at least one of the plurality of amplifier gain stages in response to the control signal.
    Type: Grant
    Filed: May 31, 2006
    Date of Patent: October 1, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kevin B. Traylor, Richard B. Meador, George B. Norris, David S. Peckham
  • Patent number: 8346205
    Abstract: A method and system for wireless communications between base and mobile stations use reference signals transmitted from base stations prior transmission of data signals. The reference signals are used to determine propagation characteristics of communication channels between the base and mobile stations and optimize, in real time, parameters of receivers of the mobile stations for processing the following data signals. Applications of the invention include wireless communication systems compliant with OFDMA, 3GPP LTE, RFN-OFDMA, OFDM, TDMA, and the like communication protocols.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: January 1, 2013
    Assignee: Apple Inc.
    Inventors: Leo G. Dehner, James W. McCoy, Kevin B. Traylor
  • Patent number: 8271569
    Abstract: A technique for performing a discrete Fourier transform (DFT) includes storing, in a single-port memory, multiple signal points. A first group of consecutive ones of the multiple signal points are fetched (from a first line of the single-port memory) to a first input register associated with a processor that includes multiple arithmetic units (AUs) that are each configured to perform multiply accumulate (MAC) operations. A second group of consecutive ones of the multiple signal points are then fetched (from a second line of the single-port memory) to a second input register associated with the processor. Selected pairs of the multiple signal points are then loaded (one from each of the first and second input registers for each pair) into the multiple arithmetic units during an initial butterfly stage. Radix-2 butterfly operations are then performed on the selected pairs of the multiple signal points (using the multiple AUs) to provide respective output elements.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: September 18, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jayakrishnan C. Mundarath, Leo G. Dehner, Kevin B. Traylor