Abstract: In a high-fidelity digital modulator, a mapper is provided to minimize quantization noise, jitter, and cross-talk between multiple digital-to-analog or analog-to-digital converters. The mapper receives a quantized level from a quantizer and maps the quantized level to an output sequence. The mapper includes a table defining multiple sequences corresponding to each quantized level. Each sequence includes two or more symbols, having one of multiple values. The mapper also includes a generator that selects one of the multiple sequences as the output sequence. The last symbol of a first output sequence is equal to the first symbol of the next output sequence and so on. The generator selects the output sequence by alternating between a first and a second sequence for each quantized level received. The generator selects the output sequence by alternating between sequences having a positive and a negative common mode energy for each odd valued quantized level received.

Abstract: A method of making a printed circuit board having zero resistance connections. Pairs of shunt pads are formed on the board, spaced sufficiently far apart to avoid short circuiting but sufficiently close to permit a solder bridge to occur between them during a solder wave process.

Abstract: Provided is a system and method for muting zero level pulse code modulated (PCM) samples. PCM samples are received as inputs to a digital to analog converter (DAC) including a PCM input module and a mapping module. The method includes monitoring a level of the PCM samples received as inputs to the PCM input module and sensing consecutive zero level PCM samples from among the monitored input PCM samples. The method also includes muting a PCM input to the mapper when a predetermined number of zero level PCM samples have been sensed.

Abstract: A system for spur cancellation comprises an input, an output, a memory, and a summer. A value corresponding to an energy level of a spur is stored in the memory. The summer is configured to receive an input signal from the input, to receive the value from the memory, to subtract the value from the input signal, and to convey an output signal to the output. The output signal is a difference of the value subtracted from the input signal.

Abstract: A method of responding to a thermal trip signal generated by a processor of a system having multiple processor nodes. If a processor overheats beyond a critical temperature, a temperature monitor receives the thermal trip signal, and turns off an enable signal to a voltage control module that control power to the processors. The temperature monitor also triggers a system reset. Upon reset, the temperature monitor ensures that all nodes, other than the node with the overheated processor, return to an operational state.

Abstract: Provided is a system and method for converting digital data audio data audio data that has a predetermined input sample rate, into an analog data signal. A system includes a digital to analog converter (DAC) including a digital processing portion configured to receive as an input the digital audio data and timing information, the timing information being representative of a time base of the input sample rate. The digital processing portion is similarly configured to digitally process the digital audio data and the timing information to produce serialized output data. The DAC also includes an analog processing portion configured to convert serialized data to an analog format. The digital processing portion operates in accordance with at least one clock having a corresponding clock rate wherein the corresponding clock rate is unrelated to the input sample rate.

Abstract: A system and method is provided for supplying power over a home phone line network in a manner that is interoperable with other voice and data services operating on the same network. The system includes a power source coupled to the home phone line network. The power source includes an AC signal generator that generates an AC signal at a selected frequency. The power source also includes a band pass filter for removing unwanted harmonics from the AC signal, thereby generating a filtered AC signal for powering one or more devices on the home phone line network. One or more devices attached to the home phone line network, such as a telephone adapter or telephone, receives the filtered AC signal. Each device comprises a second band pass filter and an AC/DC converter. The second band pass filter passes the filtered AC signal to the AC/DC converter and prevents the introduction of undesired harmonics onto the home phone line network from the AC/DC converter.

Abstract: The present invention is directed to a sigma-delta digital to analog converted (DAC) including a digital-sigma delta modulator, a decimation filter, and a multi-bit DAC. The digital sigma-delta modulator receives a digital input signal and produces a quantized digital signal therefrom. The decimation filter receives the quantized digital signal and produces a decimated digital signal therefrom. The multi-bit DAC receives the decimated digital signal and produces an analog output signal therefrom. The analog output signal is representative of the digital input signal.

Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.

Abstract: A system and method is provided for supplying power over a home phone line network in a manner that is interoperable with other voice and data services operating on the same network. The system includes a power source coupled to the home phone line network. The power source includes an AC signal generator that generates an AC signal at a selected frequency. The power source also includes a band pass filter for removing unwanted harmonics from the AC signal, thereby generating a filtered AC signal for powering one or more devices on the home phone line network. One or more devices attached to the home phone line network, such as a telephone adapter or telephone, receives the filtered AC signal. Each device comprises a second band pass filter and an AC/DC converter. The second band pass filter passes the filtered AC signal to the AC/DC converter and prevents the introduction of undesired harmonics onto the home phone line network from the AC/DC converter.

Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.

Abstract: A printed circuit board having pairs of shunt pads, from which the solder mask is removed and which are capable of being bridged to form zero ohm resistors. The shunt pads are spaced sufficiently far apart to avoid short circuiting, but sufficiently close to permit a solder bridge to occur between them. The shunt pads can be designed to permit mounting of a resistor component if desired, rather than being bridged.

Abstract: A computer system includes a circuit board which comprises a bus system for transmitting address, data and control signals with selectable bus configuration, a plurality of bus sockets on the circuit board for connecting an adapter card with the bus signals. The specification of the adapter card determines the configuration of the associated bus, and an indicator for the bus indicating the configuration. The indicator is integrated in the socket.

Abstract: A computer system includes a circuit board which comprises a bus system for transmitting address, data and control signals with selectable bus configuration, a plurality of bus sockets on the circuit board for connecting an adapter card with the bus signals. The specification of the adapter card determines the configuration of the associated bus, and an indicator for the bus indicating the configuration. The indicator is integrated in the socket.

Abstract: The present invention is directed to a sigma-delta digital to analog converted (DAC) including a digital-sigma delta modulator, a decimation filter, and a multi-bit DAC. The digital sigma-delta modulator receives a digital input signal and produces a quantized digital signal therefrom. The decimation filter receives the quantized digital signal and produces a decimated digital signal therefrom. The multi-bit DAC receives the decimated digital signal and produces an analog output signal therefrom. The analog output signal is representative of the digital input signal.

Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.

Abstract: An apparatus and method for flexibly and precisely varying temporal placement and duration of pulses, within a train of high speed, high power optical pulses. The invention includes optics adapted for focusing on a layer of an information storage media. An optical pulse generator is coupled with the layer through the optics for generating a train of optical pulses, wherein each pulse has a respective temporal placement within the train and has a respective pulse duration. The respective pulse duration of each pulse is controlled by an amount of an analog duration control voltage, in accordance with a WRITE STRATEGY, which is based on a physical property of the layer of the information storage media. Similarly the respective temporal placement of each pulse is controlled by an amount of an analog temporal placement control voltage, in accordance with the WRITE STRATEGY.

Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.

Abstract: A socket connector and a card-edge is provided for electrical busses. In one embodiment, a socket is provided for electrical busses that require each end of the bus to be terminated that does not require a termination card. In another embodiment, a socket connector is provided for electrical busses that flow through several aligned socket connectors. The design of the socket connector connects a bus to termination resistors located on a circuit board of the socket connector by cross-connecting the signal through the signal pins inside the socket connector.

Abstract: Methods and apparatuses for spectrally shaping mismatch errors in a multi-bit digital to analog converter (DAC). In an embodiment, the multi-bit DAC is constructed from K separate multi-element sub-DACs, where K and the number of elements in each sub-DAC are each preferably greater than two. A received digital input code is split into a set of K sub-codes corresponding to the digital input code. The set of K sub-codes can have one of at least N different sub-code orders that specify an order of each of the K sub-codes with respect to one another, where N>2. A sum of the K sub-codes equals the digital input code. One of the at least N different sub-code orders is selected using a shuffling algorithm. Then, each sub-code in the set of K sub-codes is output in accordance with the selected sub-code order.