Patents by Inventor Kevin O'Brien

Kevin O'Brien has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11594673
    Abstract: A memory device includes a first electrode including a spin-orbit material, a magnetic junction on a portion of the first electrode and a first structure including a dielectric on a portion of the first electrode. The first structure has a first sidewall and a second sidewall opposite to the first sidewall. The memory device further includes a second structure on a portion of the first electrode, where the second structure has a sidewall adjacent to the second sidewall of the first structure. The memory device further includes a first conductive interconnect above and coupled with each of the magnetic junction and the second structure and a second conductive interconnect below and coupled with the first electrode, where the second conductive interconnect is laterally distant from the magnetic junction and the second structure.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: February 28, 2023
    Assignee: Intel Corporation
    Inventors: Noriyuki Sato, Angeline Smith, Tanay Gosavi, Sasikanth Manipatruni, Kaan Oguz, Kevin O'Brien, Benjamin Buford, Tofizur Rahman, Rohan Patil, Nafees Kabir, Michael Christenson, Ian Young, Hui Jae Yoo, Christopher Wiegand
  • Publication number: 20230038223
    Abstract: There is provided a device and method of filtering outliers from physiological values. The method comprises: (a) populating a window with n physiological values taken, in sequence, from a sequence of physiological values, wherein n is a positive integer; (b) determining whether the variability in the physiological values within the window is less than a predetermined threshold; (c) responsive to the variability in the physiological values within the window being less than a predetermined threshold, determining that the window comprises no outliers, and/or responsive to the variability in the physiological values within the window not being less than a predetermined threshold, determining that the window comprises at least one outlier.
    Type: Application
    Filed: June 16, 2022
    Publication date: February 9, 2023
    Inventors: Terence Kevin O'Brien, Paul Wakefield, Eric Mills
  • Publication number: 20230000494
    Abstract: A packaging assembly is designed for an applicator that contains a buttress assembly that is used with a surgical stapler to reinforce a cut and stapled tissue site. The packaging assembly protects the buttress assembly from damage due to physical contact as well as exposure to adverse environmental factors like excess moisture, etc. In one example the packaging assembly includes a dual tray design with an inner tray that holds the applicator. The combined inner tray and applicator are hermetically sealed within a foil assembly or foil pouch. The foil pouch with the inner tray and applicator within is placed within the outer tray to protect the foil from damage.
    Type: Application
    Filed: August 10, 2022
    Publication date: January 5, 2023
    Inventors: Trevor J. Barton, Denise C. Griffiths, John V. Hunt, Kevin O'Brien, Emily A. Schellin, Nicholas B. Van Stolk, Michael J. Vendely
  • Publication number: 20220370309
    Abstract: Embodiments of the present disclosure may include a skincare composition comprising an antimicrobial component, an antiaging component and a moisturizing component comprising at least one alpha-hydroxy acid. A treatment method for improving skin may include administering to an area in need thereof a composition comprising an effective amount of an antimicrobial component, an antiaging component and a moisturizing component comprising at least one alpha-hydroxy acid.
    Type: Application
    Filed: September 17, 2021
    Publication date: November 24, 2022
    Applicant: Shielded, Beauty, LLC
    Inventors: Sonia Summers, Maria Corbiscello, Kevin O'Brien, John Kressaty
  • Patent number: 11508903
    Abstract: An insertion layer for perpendicular spin orbit torque (SOT) memory devices between the SOT electrode and the free magnetic layer, memory devices and computing platforms employing such insertion layers, and methods for forming them are discussed. The insertion layer is predominantly tungsten and improves thermal stability and perpendicular magnetic anisotropy in the free magnetic layer.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: November 22, 2022
    Assignee: Intel Corporation
    Inventors: Angeline Smith, Ian Young, Kaan Oguz, Sasikanth Manipatruni, Christopher Wiegand, Kevin O'Brien, Tofizur Rahman, Noriyuki Sato, Benjamin Buford, Tanay Gosavi
  • Patent number: 11476412
    Abstract: An apparatus is provided which comprises: a magnetic junction including: a first structure comprising a magnet with an unfixed perpendicular magnetic anisotropy (PMA) relative to an x-y plane of a device; a second structure comprising one of a dielectric or metal; a third structure comprising a magnet with fixed PMA, wherein the third structure has an anisotropy axis perpendicular to the plane of the device, and wherein the third structure is adjacent to the second structure such that the second structure is between the first and third structures; a fourth structure comprising an antiferromagnetic (AFM) material, the fourth structure adjacent to the third structure; a fifth structure comprising a magnet with PMA, the fifth structure adjacent to the fourth structure; and an interconnect adjacent to the first structure, the interconnect comprising spin orbit material.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: October 18, 2022
    Assignee: Intel Corporation
    Inventors: Tanay Gosavi, Sasikanth Manipatruni, Kaan Oguz, Noriyuki Sato, Kevin O'Brien, Benjamin Buford, Christopher Wiegand, Angeline Smith, Tofizur Rahman, Ian Young
  • Patent number: 11462678
    Abstract: A pSTTM device includes a first electrode and a second electrode, a free magnet between the first electrode and the second electrode, a fixed magnet between the first electrode and the second electrode, a tunnel barrier between the free magnet and the fixed magnet, a coupling layer between the free magnet and the first electrode, where the coupling layer comprises a metal and oxygen and a follower between the coupling layer and the first electrode, wherein the follower comprises a magnetic skyrmion. The skyrmion follower may be either magnetically and electrically coupled to the free magnet to form a coupled system of switching magnetic layers. In an embodiment, the skyrmion follower has a weaker magnetic anisotropy than an anisotropy of the free magnet.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: October 4, 2022
    Assignee: Intel Corporation
    Inventors: Kevin O'Brien, Kaan Oguz, Charles Kuo, Mark Doczy, Noriyuki Sato
  • Patent number: 11444237
    Abstract: A spin orbit torque (SOT) memory device includes a SOT electrode having a spin orbit coupling material. The SOT electrode has a first sidewall and a second sidewall opposite to the first sidewall. The SOT memory device further includes a magnetic tunnel junction device on a portion of the SOT electrode. A first MTJ sidewall intersects the first SOT sidewall and a portion of the first MTJ sidewall and the SOT sidewall has a continuous first slope. The MTJ device has a second sidewall that does not extend beyond the second SOT sidewall and at least a portion of the second MTJ sidewall has a second slope.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: September 13, 2022
    Assignee: Intel Corporation
    Inventors: Noriyuki Sato, Tanay Gosavi, Gary Allen, Sasikanth Manipatruni, Kaan Oguz, Kevin O'Brien, Christopher Wiegand, Angeline Smith, Tofizur Rahman, Ian Young, Ben Buford
  • Patent number: 11432817
    Abstract: A packaging assembly is designed for an applicator that contains a buttress assembly that is used with a surgical stapler to reinforce a cut and stapled tissue site. The packaging assembly protects the buttress assembly from damage due to physical contact as well as exposure to adverse environmental factors like excess moisture, etc. In one example the packaging assembly includes a dual tray design with an inner tray that holds the applicator. The combined inner tray and applicator are hermetically sealed within a foil assembly or foil pouch. The foil pouch with the inner tray and applicator within is placed within the outer tray to protect the foil from damage.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: September 6, 2022
    Assignee: Cilag GmbH International
    Inventors: Trevor J. Barton, Denise Griffiths, John V. Hunt, Kevin O'Brien, Emily A. Schellin, Nicholas B. Van Stolk, Michael J. Vendely
  • Patent number: 11437567
    Abstract: An apparatus comprises a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier between the free and fixed layers, the tunnel barrier directly contacting a first side of the free layer, a capping layer contacting the second side of the free magnetic layer and boron absorption layer positioned a fixed distance above the capping layer.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: September 6, 2022
    Assignee: Intel Corporation
    Inventors: Justin Brockman, Christopher Wiegand, MD Tofizur Rahman, Daniel Ouelette, Angeline Smith, Juan Alzate Vinasco, Charles Kuo, Mark Doczy, Kaan Oguz, Kevin O'Brien, Brian Doyle, Oleg Golonzka, Tahir Ghani
  • Patent number: 11430943
    Abstract: A magnetic tunneling junction (MTJ) memory device including a free and fixed (reference) magnet between first and second electrodes, and a synthetic antiferromagnet structure (SAF) structure between the fixed magnet and one of the electrodes. The SAF structure includes a magnetic skyrmion. Two magnetic skyrmions within a SAF structure may have opposing polarity. A SAF structure may further include a coupling layer between two magnetic layers, as well as interface layers separated from the coupling layer by one of the magnetic layers. The coupling layer may have a spin-orbit coupling effect on the magnetic layers that is of a sign opposite that of the interface layers, for example to promote formation of the magnetic skyrmions.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: August 30, 2022
    Assignee: Intel Corporation
    Inventors: Kevin O'Brien, Kaan Oguz, Noriyuki Sato, Charles Kuo, Mark Doczy
  • Patent number: 11417830
    Abstract: Embodiments herein relate to magnetically doping a spin orbit torque electrode (SOT) in a magnetic random access memory apparatus. In particular, the apparatus may include a free layer of a magnetic tunnel junction (MTJ) coupled to a SOT electrode that is magnetically doped to apply an effective magnetic field on the free layer, where the free layer has a magnetic polarization in a first direction and where current flowing through the magnetically doped SOT electrode is to cause the magnetic polarization of the free layer to change to a second direction that is substantially opposite to the first direction.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: August 16, 2022
    Assignee: Intel Corporation
    Inventors: Tanay Gosavi, Sasikanth Manipatruni, Chia-Ching Lin, Gary Allen, Kaan Oguz, Kevin O'Brien, Noriyuki Sato, Ian Young, Dmitri Nikonov
  • Patent number: 11404482
    Abstract: An integrated circuit structure includes a first material block comprising a first block insulator layer and a first multilayer stack on the first block insulator layer, the first multilayer stack comprising interleaved pillar electrodes and insulator layers. A second material block is stacked on the first material block and comprises a second block insulator layer, and a second multilayer stack on the second block insulator layer, the second multilayer stack comprising interleaved pillar electrodes and insulator layers. At least one pillar extends through the first material block and the second material block, wherein the at least one pillar has a top width at a top of the first and second material blocks that is greater than a bottom width at a bottom of the first and second material blocks.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: August 2, 2022
    Assignee: Intel Corporation
    Inventors: Noriyuki Sato, Kevin O'Brien, Eungnak Han, Manish Chandhok, Gurpreet Singh, Nafees Kabir, Kevin Lin, Rami Hourani, Abhishek Sharma, Hui Jae Yoo
  • Publication number: 20220230566
    Abstract: A safety lighting assembly enabled to cast light rearward toward the surface to which it is attached. The safety light assembly provides additional portions for emitting light in selected directions so as to facilitate situation awareness of the object.
    Type: Application
    Filed: January 21, 2022
    Publication date: July 21, 2022
    Inventor: Mark Kevin O'Brien
  • Patent number: 11386951
    Abstract: A MTJ device includes a free (storage) magnet and fixed (reference) magnet between first and second electrodes, and a programmable booster between the free magnet and one of the electrodes. The booster has a magnetic material layer. The booster may further have an interface layer that supports the formation of a skyrmion spin texture, or a stable ferromagnetic domain, within the magnetic material layer. A programming current between two circuit nodes may be employed to set a position of the skyrmion or magnetic domain within the magnetic material layer to be more proximal to, or more distal from, the free magnet. The position of the skyrmion or magnetic domain to the MTJ may modulate TMR ratio of the MTJ device. The TMR ratio modulation may be employed to discern more than two states of the MTJ device. Such a multi-level device may, for example, be employed to store 2 bits/cell.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Kevin O'Brien, Brian Doyle, Kaan Oguz, Noriyuki Sato, Charles Kuo, Mark Doczy
  • Patent number: 11382567
    Abstract: There is provided a device and method of filtering outliers from physiological values. The method comprises: (a) populating a window with n physiological values taken, in sequence, from a sequence of physiological values, wherein n is a positive integer; (b) determining whether the variability in the physiological values within the window is less than a predetermined threshold; (c) responsive to the variability in the physiological values within the window being less than a predetermined threshold, determining that the window comprises no outliers, and/or responsive to the variability in the physiological values within the window not being less than a predetermined threshold, determining that the window comprises at least one outlier.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: July 12, 2022
    Assignee: LIDCO GROUP PLC
    Inventors: Terence Kevin O'Brien, Paul Wakefield, Eric Mills
  • Patent number: 11374164
    Abstract: Embodiments herein relate to a system, apparatus, and/or process for producing a spin orbit torque (SOT) electrode that includes a first layer with a first side to couple with a free layer of a magnetic tunnel junction (MTJ) and a second layer coupled with a second side of the first layer opposite the first side, where a value of an electrical resistance in the first SOT layer is lower than a value of an electrical resistance in the second SOT layer and where a current applied to the SOT electrode is to cause current to preferentially flow in the first SOT layer to cause a magnetic polarization of the free layer to change directions. During production of the SOT electrode, the second layer may act as an etch stop.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: June 28, 2022
    Assignee: Intel Corporation
    Inventors: Tanay Gosavi, Sasikanth Manipatruni, Chia-Ching Lin, Kaan Oguz, Christopher Wiegand, Angeline Smith, Noriyuki Sato, Kevin O'Brien, Benjamin Buford, Ian Young, Md Tofizur Rahman
  • Publication number: 20220199838
    Abstract: A transistor includes a channel layer including a transition metal dichalcogenide (TMD) material, an encapsulation layer on a first portion of the channel layer, a gate electrode above the encapsulation layer, a gate dielectric layer between the gate electrode and the encapsulation layer. The transistor further includes a source contact on a second portion of the channel layer and a drain contact on a third portion of the channel layer, where the gate structure is between drain contact and the source contact.
    Type: Application
    Filed: December 23, 2020
    Publication date: June 23, 2022
    Applicant: Intel Corporation
    Inventors: Chelsey Dorow, Kevin O'Brien, Carl Naylor, Uygar Avci, Sudarat Lee, Ashish Verma Penumatcha, Chia-Ching LIn, Tanay Gosavi, Shriram Shivaraman, Kirby Maxey
  • Publication number: 20220199812
    Abstract: Transistor structures with monocrystalline metal chalcogenide channel materials are formed from a plurality of template regions patterned over a substrate. A crystal of metal chalcogenide may be preferentially grown from a template region and the metal chalcogenide crystals then patterned into the channel region of a transistor. The template regions may be formed by nanometer-dimensioned patterning of a metal precursor, a growth promoter, a growth inhibitor, or a defected region. A metal precursor may be a metal oxide suitable, which is chalcogenated when exposed to a chalcogen precursor at elevated temperature, for example in a chemical vapor deposition process.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 23, 2022
    Applicant: Intel Corporation
    Inventors: Carl Naylor, Chelsey Dorow, Kevin O'Brien, Sudarat Lee, Kirby Maxey, Ashish Verma Penumatcha, Tanay Gosavi, Patrick Theofanis, Chia-Ching Lin, Uygar Avci, Matthew Metz, Shriram Shivaraman
  • Patent number: D958359
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: July 19, 2022
    Assignee: Cilag GmbH International
    Inventors: Emily A. Schellin, John V. Hunt, Trevor J. Barton, Kevin O'Brien, Nicholas B. Van Stolk, Denise Griffiths, Michael J. Vendely, John P. Soehnlen