Patents by Inventor Kevin R. Lensing

Kevin R. Lensing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8149384
    Abstract: A method for monitoring a photolithography system includes defining a model of the photolithography system for modeling top and bottom critical dimension data associated with features formed by the photolithography system as a function of dose and focus. A library of model inversions is generated for different combinations of top and bottom critical dimension values. Each entry in the library specifies a dose value and a focus value associated with a particular combination of top and bottom critical dimension values. A top critical dimension measurement and a bottom critical dimension measurement of a feature formed by the photolithography system using a commanded dose parameter and a commanded focus parameter are received. The library is accessed using the top and bottom critical dimension measurements to generate values for a received dose parameter and the received focus parameter.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: April 3, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Siddharth Chauhan, Kevin R. Lensing, James Broc Stirton
  • Patent number: 8041518
    Abstract: A method includes receiving a first set of parameters associated with a subset of a plurality of die on a wafer. A die health metric is determined for at least a portion of the plurality of die based on the first set of parameters. The die health metric includes at least one process component associated with the fabrication of the die and at least one performance component associated with an electrical performance characteristic of the die. At least one of the die is tested. A protocol of the testing is determined based on the associated die health metric.
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: October 18, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Michael G. McIntyre, Kevin R. Lensing
  • Patent number: 7983871
    Abstract: A method includes determining at least a first characteristic of a device during a first test insertion and storing the first characteristic. The device is identified during a second test insertion. The first characteristic is retrieved responsive to the identification of the device. A test program for the second insertion is configured based on the first characteristic. The configured test program is executed to test the device during the second test insertion.
    Type: Grant
    Filed: September 4, 2007
    Date of Patent: July 19, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Douglas C. Kimbrough, Michael A. Retersdorf, Kevin R. Lensing
  • Patent number: 7925369
    Abstract: A method includes defining a reference model of a system having a plurality of terms for modeling data associated with the system. A reference fit error metric is generated for the reference model. A set of evaluation models each having one term different than the reference model is generated. An evaluation fit error metric for each of the evaluation models is generated. The reference model is replaced with a selected evaluation model responsive to the selected evaluation model having an evaluation fit error metric less than the reference fit error metric. The model evaluation is repeated until no evaluation model has an evaluation fit error metric less than the reference fit error metric. The reference model is trained using the data associated with the system, and the trained reference model is employed to determine at least one characteristic of the system.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: April 12, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Siddharth Chauhan, Kevin R. Lensing, James Broc Stirton
  • Patent number: 7822567
    Abstract: A method includes defining a hierarchy of test routines in a test program for testing integrated circuit devices. A first device is tested at a first screening level in the hierarchy. The first device is tested at a second detailed level in the hierarchy responsive to the first device failing the testing at the first screening level.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: October 26, 2010
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin R. Lensing, Michael G. McIntyre
  • Patent number: 7738986
    Abstract: A method includes acquiring metrology data associated with a process. Bias information associated with the process is determined. The metrology data is adjusted based on the bias information to generate bias-adjusted metrology data. The bias-adjusted metrology data is filtered to identify and reject outlier data. The process is controlled based on the metrology data remaining after the rejection of the outlier data.
    Type: Grant
    Filed: October 9, 2006
    Date of Patent: June 15, 2010
    Assignee: GlobalFoundries, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing, Richard P. Good
  • Patent number: 7716004
    Abstract: A method includes collecting trace data associated with a plurality of device testers. Tester health metrics are generated for each of the device testers. The tester health metrics are analyzed to identify a selected tester health metric that diverges from the plurality of tester health metrics. A corrective action is initiated for the tester associated with the selected tester health metric. A method includes collecting trace data associated with a plurality of device testers. The trace data for each of the device testers is compared to a reference trace data set to generate tester health metrics for each of the device testers based on the difference therebetween. The tester health metrics are analyzed to identify a selected tester health metric that diverges from the plurality of tester health metrics. A corrective action is initiated for the tester associated with the selected tester health metric.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: May 11, 2010
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Elfido Coss, Jr., Kevin R. Lensing, Eric Omar Green, Rajesh Vijayaraghavan
  • Publication number: 20090228132
    Abstract: A method includes receiving a performance distribution for a plurality of devices to be fabricated in a semiconductor process flow. A performance target for a particular device is specified based on the performance distribution. A stressed material is formed in a recess adjacent a gate electrode of a transistor in the particular device in accordance with at least one operating recipe. The recess is spaced from the gate electrode by a gate proximity distance. A target value for the gate proximity distance is determined based on the performance target. At least one parameter of the operating recipe is determined based on the target value for the gate proximity distance.
    Type: Application
    Filed: March 10, 2008
    Publication date: September 10, 2009
    Inventors: Kevin R. Lensing, Alok Vaid, Rohit Pal
  • Publication number: 20090157577
    Abstract: A method includes defining a reference model of a system having a plurality of terms for modeling data associated with the system. A reference fit error metric is generated for the reference model. A set of evaluation models each having one term different than the reference model is generated. An evaluation fit error metric for each of the evaluation models is generated. The reference model is replaced with a selected evaluation model responsive to the selected evaluation model having an evaluation fit error metric less than the reference fit error metric. The model evaluation is repeated until no evaluation model has an evaluation fit error metric less than the reference fit error metric. The reference model is trained using the data associated with the system, and the trained reference model is employed to determine at least one characteristic of the system.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 18, 2009
    Inventors: SIDDHARTH CHAUHAN, Kevin R. Lensing, James Broc Stirton
  • Publication number: 20090153818
    Abstract: A method for monitoring a photolithography system includes defining a model of the photolithography system for modeling top and bottom critical dimension data associated with features formed by the photolithography system as a function of dose and focus. A library of model inversions is generated for different combinations of top and bottom critical dimension values. Each entry in the library specifies a dose value and a focus value associated with a particular combination of top and bottom critical dimension values. A top critical dimension measurement and a bottom critical dimension measurement of a feature formed by the photolithography system using a commanded dose parameter and a commanded focus parameter are received. The library is accessed using the top and bottom critical dimension measurements to generate values for a received dose parameter and the received focus parameter.
    Type: Application
    Filed: December 17, 2007
    Publication date: June 18, 2009
    Inventors: Siddharth Chauhan, Kevin R. Lensing, James Broc Stirton
  • Publication number: 20090144692
    Abstract: A method includes specifying a plurality of optical proximity correction metrology sites on a wafer. Metrology data is collected from at least a subset of the metrology sites. Data values are predicted for the subset of the metrology sites using an optical proximity correction design model. The collected metrology data is compared to the predicted data values to generate an optical proximity correction metric. A problem condition associated with the optical proximity correction design model is identified based on the optical proximity correction metric.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 4, 2009
    Inventors: JASON P. CAIN, Kevin R. Lensing, Bhanwar Singh, Luigi Capodieci, Cyrus E. Tabery
  • Publication number: 20090144686
    Abstract: A method includes generating a layout for an integrated circuit device in accordance with a plurality of layout design rules. A plurality of metrology sites on the layout associated with at least one subset of the layout design rules is identified. A metrology tag associated with each of the metrology sites is generated. At least one metrology recipe for determining a characteristic of the integrated circuit device is generated based on the metrology tags. Metrology data is collected using the at least one metrology recipe. A selected layout design rule in the at least one subset is modified based on the metrology data.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 4, 2009
    Inventors: KEVIN R. LENSING, Jason P. Cain, Bhanwar Singh, Luigi Capodieci, Cyrus E. Tabery
  • Patent number: 7519447
    Abstract: The present invention provides a method and apparatus for integrating multiple sample plans. The method includes receiving a first wafer state data set from an in situ wafer measurement device, the first wafer state data set being indicative of at least one characteristic of at least one wafer processed by a processing tool and receiving a second wafer state data set from an ex situ wafer measurement device, the second wafer state data set being indicative of the at least one characteristic of the at least one wafer processed by the processing tool. The method also includes forming a third wafer state data set using the first and second wafer state data sets and determining the at least one characteristic of the at least one wafer based upon the third wafer state data set.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: April 14, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher A. Bode, Kevin R. Lensing
  • Patent number: 7502702
    Abstract: The present invention provides a method and apparatus for dynamic adjustment of sensor and/or metrology sensitivities. The method includes accessing measurement information provided by a first measurement device and modifying a sensitivity of a second measurement device based on the measurement information provided by the first measurement device.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: March 10, 2009
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Richard J. Markle, Christopher A. Bode, Kevin R. Lensing
  • Publication number: 20090058449
    Abstract: A method includes determining at least a first characteristic of a device during a first test insertion and storing the first characteristic. The device is identified during a second test insertion. The first characteristic is retrieved responsive to the identification of the device. A test program for the second insertion is configured based on the first characteristic. The configured test program is executed to test the device during the second test insertion.
    Type: Application
    Filed: September 4, 2007
    Publication date: March 5, 2009
    Inventors: Douglas C. Kimbrough, Michael A. Retersdorf, Kevin R. Lensing
  • Publication number: 20090012730
    Abstract: A method includes collecting trace data associated with a plurality of device testers. Tester health metrics are generated for each of the device testers. The tester health metrics are analyzed to identify a selected tester health metric that diverges from the plurality of tester health metrics. A corrective action is initiated for the tester associated with the selected tester health metric. A method includes collecting trace data associated with a plurality of device testers. The trace data for each of the device testers is compared to a reference trace data set to generate tester health metrics for each of the device testers based on the difference therebetween. The tester health metrics are analyzed to identify a selected tester health metric that diverges from the plurality of tester health metrics. A corrective action is initiated for the tester associated with the selected tester health metric.
    Type: Application
    Filed: July 2, 2007
    Publication date: January 8, 2009
    Inventors: ELFIDO COSS, JR., Kevin R. Lensing, Eric Omar Green, Rajesh Vijayaraghavan
  • Publication number: 20090006021
    Abstract: A method includes defining a hierarchy of test routines in a test program for testing integrated circuit devices. A first device is tested at a first screening level in the hierarchy. The first device is tested at a second detailed level in the hierarchy responsive to the first device failing the testing at the first screening level.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 1, 2009
    Inventors: Kevin R. Lensing, Michael G. McIntyre
  • Publication number: 20080281545
    Abstract: A method includes receiving a first set of parameters associated with a subset of a plurality of die on a wafer. A die health metric is determined for at least a portion of the plurality of die based on the first set of parameters. The die health metric includes at least one process component associated with the fabrication of the die and at least one performance component associated with an electrical performance characteristic of the die. At least one of the die is tested. A protocol of the testing is determined based on the associated die health metric.
    Type: Application
    Filed: May 8, 2007
    Publication date: November 13, 2008
    Inventors: Michael G. McIntyre, Kevin R. Lensing
  • Publication number: 20080147224
    Abstract: A method includes acquiring metrology data associated with a process. Bias information associated with the process is determined. The metrology data is adjusted based on the bias information to generate bias-adjusted metrology data. The bias-adjusted metrology data is filtered to identify and reject outlier data. The process is controlled based on the metrology data remaining after the rejection of the outlier data.
    Type: Application
    Filed: October 9, 2006
    Publication date: June 19, 2008
    Inventors: James Broc Stirton, Kevin R. Lensing, Richard P. Good
  • Patent number: 7337034
    Abstract: The present invention provides a method and apparatus for determining a root cause of a fault. The method includes detecting at least one fault associated with at least one first wafer processed according to a first processing context and processing at least one second wafer according to at least one second processing context. The second processing context is different than the first processing context. The method also includes determining a root cause associated with the fault based on the first processed wafer and the second processed wafer.
    Type: Grant
    Filed: September 7, 2005
    Date of Patent: February 26, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin R. Lensing, Ernest Dean Adams, III