Patents by Inventor Kevin R. Lensing

Kevin R. Lensing has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6582863
    Abstract: The present invention is generally directed to a method of controlling photolithography processes based upon scatterometric measurements of sub-nominal grating structures, and a system for accomplishing same. In one embodiment, the method comprises providing a library of optical characteristic traces, each of which corresponds to a sub-nominal grating structure comprised of a plurality of photoresist features having a known degree of residual photoresist material positioned between the photoresist features, forming a process layer above a semiconducting substrate, and forming a layer of photoresist above the process layer.
    Type: Grant
    Filed: June 11, 2001
    Date of Patent: June 24, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing
  • Patent number: 6562635
    Abstract: A method of using scatterometry measurements to determine and control conductive interconnect profiles is disclosed. In one embodiment, the method comprises providing a library of optical characteristic traces, each of which correspond to a grating structure comprised of a plurality of conductive interconnects having a known profile, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of conductive interconnects having an unknown profile, and illuminating the formed grating structure. The method further comprises measuring light reflected off of the grating structure to generate an optical characteristic trace for the formed grating structure and determining a profile of the gate electrode structures comprising the formed grating structure by correlating the generated optical characteristic trace to an optical characteristic trace from the library.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: May 13, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin R. Lensing, James Broc Stirton, Matthew A. Purdy
  • Patent number: 6549287
    Abstract: A method for polishing wafers includes polishing a process layer formed on a wafer, the process layer overlying a grating structure; illuminating at least a portion of the process layer and the grating structure; measuring light reflected from the illuminated portion of the process layer and the grating structure to generate a reflection profile; comparing the measured reflection profile to a target reflection profile having an acceptable degree of planarity; and terminating the polishing of the process layer based on the comparison of the measured reflection profile and the target reflection profile. A metrology tool adapted to measure a wafer having a grating structure and a process layer formed over the grating structure after initiation of a polishing process includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of the process layer overlying the grating structure.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: April 15, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin R. Lensing, James Broc Stirton
  • Patent number: 6537833
    Abstract: A method for characterizing an interconnect structure profile includes providing a wafer having a grating structure including a plurality of interconnect structures; illuminating at least a portion of the grating structure; measuring light reflected from the grating structure to generate a reflection profile; and determining a profile of the interconnect structures based on the reflection profile. A metrology tool adapted to receive a wafer having a grating structure including a plurality of interconnect structures includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of the grating structure. The detector is adapted to measure light reflected from the grating structure to generate a reflection profile. The data processing unit is adapted to determine a profile of the interconnect structures based on the reflection profile.
    Type: Grant
    Filed: June 19, 2001
    Date of Patent: March 25, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Kevin R. Lensing
  • Patent number: 6464563
    Abstract: A method for polishing wafers includes providing a wafer having a grating structure including a trench and a process layer formed in the trench; illuminating at least a portion of the process layer and the grating structure with a light source; measuring light reflected from the illuminated portion of the process layer and the grating structure to generate a reflection profile; and identifying dishing in the process layer based on the reflection profile. A metrology tool adapted to receive a wafer having a grating structure including a trench and a process layer formed in the trench, includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of the process layer overlying the grating structure. The detector is adapted to measure light reflected from the illuminated portion of the grating structure and the process layer to generate a reflection profile.
    Type: Grant
    Filed: May 18, 2001
    Date of Patent: October 15, 2002
    Assignee: Advanced MicroDevices, Inc.
    Inventor: Kevin R. Lensing
  • Patent number: 6458610
    Abstract: A method and an apparatus for performing film stack fault detection. At least one semiconductor wafer is processed. Metrology data from the processed semiconductor wafer is acquired. Data from a reference library comprising optical data relating to a film stack on the semiconductor wafer is accessed. The metrology data is compared to data from the reference library. A fault-detection analysis is performed in response to the comparison of the metrology data and the reference library data.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: October 1, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kevin R. Lensing, Marilyn I. Wright, James B. Stirton
  • Patent number: 6451700
    Abstract: A method for polishing wafers includes providing a wafer having a grating structure and a process layer formed over the grating structure; illuminating at least a portion of the process layer and the grating structure with a light source; measuring light reflected from the illuminated portion of the process layer and the grating structure to generate a reflection profile; and determining planarity of the process layer based on the reflection profile. A metrology tool adapted to receive a wafer having a grating structure and a process layer formed over the grating structure includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of the process layer overlying the grating structure. The detector is adapted to measure light reflected from the illuminated portion of the process layer and the grating structure to generate a reflection profile.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: September 17, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: James Broc Stirton, Kevin R. Lensing
  • Patent number: 6433871
    Abstract: A method of using scatterometry measurements to determine and control gate electrode profiles is disclosed. In one embodiment, the method comprises providing a library of optical characteristic traces, each of which correspond to a grating structure comprised of a plurality of gate electrode structures having a known profile, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of gate electrode structures having an unknown profile, and illuminating the formed grating structure. The method further comprises measuring light reflected off of the grating structure to generate an optical characteristic trace for the formed grating structure and determining a profile of the gate electrode structures comprising the formed grating structure by correlating the generated optical characteristic trace to an optical characteristic trace from the library.
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: August 13, 2002
    Assignee: Advanced Micron Devices, Inc.
    Inventors: Kevin R. Lensing, James Broc Stirton
  • Patent number: 6383824
    Abstract: The present invention is directed to a method of using scatterometry measurements to control deposition processes, and a system for accomplishing same. In one embodiment the method comprises forming at least one grating structure above a substrate, performing a deposition process to form a process layer above the grating structure, and illuminating the process layer and the grating structure. The method further comprises measuring light reflected off of the process layer and the grating structure after the deposition process is started to generate an optical characteristic trace for the process layer and the grating structure comparing the generated optical characteristic trace to a target optical characteristic trace that corresponds to a process layer having a desired profile, and stopping the deposition process based upon the comparison of the generated trace and the target trace.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: May 7, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Kevin R. Lensing