Abstract: A semiconductor package structure and a method for manufacturing the same are provided. According to the method, a first mold layer is formed to cover a first semiconductor chip and a first bumps. A portion of the first mold layer is removed to expose top portions of the first bumps and second bumps are disposed to be connected to each of the first bumps. A second mold layer is formed, and the second mold layer is recessed to form through mold connectors that substantially penetrate the second mold layer with the second bumps disposed on the first bumps.

Abstract: Semiconductor packages are provided. A semiconductor package may include an embedding substrate including a cavity therein and a connection window in a bottom portion of the cavity. The semiconductor package may include a semiconductor chip disposed in the cavity and coupled to chip connectors, the chip connectors of the semiconductor chip inserted into the connection window. The semiconductor package may include a dielectric layer filling the cavity and the connection window and configured to expose end portions of the chip connectors and to substantially cover the semiconductor chip. Related memory cards and related electronic systems are also provided.

Abstract: A substrate may include a body having a first surface and a second surface opposite to each other, at least one first wiring pattern disposed on the first surface of the body to include a bonding finger, an upper insulating pattern disposed on the first surface of the body to cover the overall surface of the at least one first wiring pattern except the bonding finger, and a second wiring pattern disposed on the second surface of the body. The substrate may include a lower insulating pattern disposed on the second surface of the body to cover the second wiring pattern, and a first via electrode penetrating the body from the first surface to the second surface and coupling the at least one first wiring pattern to the second wiring pattern. The body may include a first film and the upper and lower insulating patterns may include second films.

Abstract: A substrate may include a body having a first surface and a second surface opposite to each other, at least one first wiring pattern disposed on the first surface of the body to include a bonding finger, an upper insulating pattern disposed on the first surface of the body to cover the overall surface of the at least one first wiring pattern except the bonding finger, and a second wiring pattern disposed on the second surface of the body. The substrate may include a lower insulating pattern disposed on the second surface of the body to cover the second wiring pattern, and a first via electrode penetrating the body from the first surface to the second surface and coupling the at least one first wiring pattern to the second wiring pattern. The body may include a first film and the upper and lower insulating patterns may include second films.

Abstract: Semiconductor packages are provided. A semiconductor package may include an embedding substrate including a cavity therein and a connection window in a bottom portion of the cavity. The semiconductor package may include a semiconductor chip disposed in the cavity and coupled to chip connectors, the chip connectors of the semiconductor chip inserted into the connection window. The semiconductor package may include a dielectric layer filling the cavity and the connection window and configured to expose end portions of the chip connectors and to substantially cover the semiconductor chip. Related memory cards and related electronic systems are also provided.

Abstract: An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided.

Abstract: Disclosed is a system of a dynamic range three-dimensional image, including: an optical detector including a gain control terminal capable of controlling an optical amplification gain; a pixel detecting module for detecting a pixel signal for configuring an image by receiving an output of the optical detector; a high dynamic range (HDR) generating module for acquiring a dynamic range image by generating a signal indicating a saturation degree of the pixel signal and combining the pixel signal based on the pixel signal detected by the pixel detecting module; and a gain control signal generating module generating an output signal for supplying required voltage to the gain control terminal of the optical detector based on the magnitude of the signal indicating the saturation degree of the pixel signal.

Abstract: A chip stack embedded package includes a first dielectric layer having a multistep cavity therein, a first plurality of semiconductor chips disposed in a first level of the multistep cavity, a second plurality of semiconductor chips disposed in a second level of the multistep cavity, and a second dielectric layer filling the multistep cavity to cover the first and second pluralities of semiconductor chips.

Abstract: A chip stack embedded package includes a first dielectric layer having a multistep cavity therein, a first plurality of semiconductor chips disposed in a first level of the multistep cavity, a second plurality of semiconductor chips disposed in a second level of the multistep cavity, and a second dielectric layer filling the multistep cavity to cover the first and second pluralities of semiconductor chips.

Abstract: An embedded package includes a first semiconductor chip embedded in a package substrate, a second semiconductor chip disposed over a first surface of the package substrate, and a group of external connection joints disposed on the first surface of the package substrate and between a sidewall of the second semiconductor chip and an edge of the embedded package. Related memory cards and related electronic systems are also provided.

Abstract: Disclosed is a system of a dynamic range three-dimensional image, including: an optical detector including a gain control terminal capable of controlling an optical amplification gain; a pixel detecting module for detecting a pixel signal for configuring an image by receiving an output of the optical detector; a high dynamic range (HDR) generating module for acquiring a dynamic range image by generating a signal indicating a saturation degree of the pixel signal and combining the pixel signal based on the pixel signal detected by the pixel detecting module; and a gain control signal generating module generating an output signal for supplying required voltage to the gain control terminal of the optical detector based on the magnitude of the signal indicating the saturation degree of the pixel signal.