Patents by Inventor Ki Jun Yun

Ki Jun Yun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130277848
    Abstract: A method of forming a contact includes forming an inter-layer dielectric layer to cover a gate formed on a semiconductor substrate; and forming a first hole which passes through the inter-layer dielectric layer to expose the gate, a second hole which exposes an active region of the semiconductor substrate, and a third hole which exposes the semiconductor substrate at a preset depth. Further, the method includes forming a shielding layer on the semiconductor substrate including the bottom and sidewalls of the first hole, the second hole, and the third hole; and removing the shielding layer at the bottom of the first hole and the second hole to expose the gate and the active region. Furthermore, the method includes filling the first hole, the second hole, and the third hole with a conductive material.
    Type: Application
    Filed: February 4, 2013
    Publication date: October 24, 2013
    Applicant: Dongbu HiTek Co., Ltd
    Inventor: Ki Jun YUN
  • Patent number: 8349639
    Abstract: A method for manufacturing an image sensor includes forming circuitry including a metal line over a semiconductor substrate, forming a photodiode over the metal line, and forming a contact plug in the photodiode such that the contact plug is connected to the metal line. The forming of the contact plug includes performing a first etch process to etch a portion of the photodiode, and performing a second etch process to expose a portion of the metal line by using a byproduct generated in etching, to form a via hole for the contact plug in the photodiode.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: January 8, 2013
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki-Jun Yun
  • Patent number: 8258593
    Abstract: An image sensor and a method of manufacturing the same. An image sensor may include a first interlayer dielectric layer having a first metal wiring and/or a bonding silicon including impurity regions on and/or over a first interlayer dielectric layer. An image sensor may include a second interlayer dielectric layer formed on and/or over a bonding silicon, and/or a first contact plug connected to a first metal wiring. An image sensor may include a third interlayer dielectric layer on and/or over a second interlayer dielectric layer, a second contact plug connected to a first impurity region and/or a second metal wiring on and/or over a second interlayer dielectric layer. An image sensor may include and a color filter layer and/or a microlens. A dielectric layer may be between a first contact plug and a first impurity region. A dielectric layer may be on and/or over a second interlayer dielectric layer.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: September 4, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki-Jun Yun
  • Patent number: 8173480
    Abstract: An image sensor and a method of manufacturing an image sensor. A method of manufacturing an image sensor may include forming an interconnection and/or an interlayer dielectric over a semiconductor substrate including circuitry connected to an interconnection. A method of manufacturing an image sensor may include forming a photodiode having a first doping layer and/or a second doping layer over an interlayer dielectric, and forming a via hole through a photodiode, which may expose a portion of a surface of an interconnection. A method of manufacturing an image sensor may include forming a barrier pattern over a via hole which may cover an exposed surface of a second doping layer, and a contact plug on and/or over a via hole, which may connect an interconnection and a first doping layer. An upper portion of a contact plug may be etched. An insulating layer may be formed over a contact plug.
    Type: Grant
    Filed: November 5, 2009
    Date of Patent: May 8, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Ki-Jun Yun, Sang-Wook Ryu
  • Patent number: 8102017
    Abstract: An image sensor may comprise circuitry, a first lower electrode, a photodiode, an upper electrode, a second lower electrode, and an upper interconnection. The circuitry may comprise a first lower interconnection and a second lower interconnection over a dielectric of a substrate. The first lower electrode, the photodiode, and the upper electrode may be sequentially formed over the first lower interconnection. The second lower electrode may comprise a passivation layer over the second lower interconnection. The upper interconnection may be formed over the second lower electrode and electrically connected to the upper electrode.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: January 24, 2012
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki Jun Yun
  • Patent number: 8030727
    Abstract: An image sensor includes a semiconductor substrate, an interconnection and an interlayer dielectric, an image sensing device, a trench, a buffer layer, a barrier pattern, a via hole, and a metal contact. The semiconductor substrate includes a readout circuitry. The interconnection and an interlayer dielectric layer are formed on and/or over the semiconductor substrate while the interconnection is connected to the readout circuitry. The image sensing device may be formed on and/or over the interlayer dielectric and a trench may be formed in the image sensing device, the trench corresponding to the interconnection. The buffer layer may be formed on a sidewall of the trench. The barrier pattern may be formed on the buffer layer with the via hole penetrating through the image sensing device and the interlayer dielectric under the barrier pattern and exposing the interconnection. The metal contact may be formed in the via hole.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: October 4, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki-Jun Yun
  • Patent number: 7977191
    Abstract: A method of forming a flash memory device includes forming a plurality of memory gates over a semiconductor substrate, forming an oxide film over the uppermost surface and sidewalls of the memory gates and then forming a plurality of selective gates on sidewalls of each of the memory gates.
    Type: Grant
    Filed: December 27, 2009
    Date of Patent: July 12, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki-Jun Yun
  • Patent number: 7977226
    Abstract: A flash memory device and a method for fabricating the same are disclosed. The flash memory device includes an ONO layer on a substrate, polysilicon gates on the ONO layer, a gate oxide layer on the substrate, the ONO layer and the polysilicon gates, and a low temperature oxide layer and polysilicon sidewall spacers on outer side surfaces of the polysilicon gates, except in a region between nearest adjacent polysilicon gates.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: July 12, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Ki Jun Yun
  • Publication number: 20100164047
    Abstract: An image sensor includes a semiconductor substrate, an interconnection and an interlayer dielectric, an image sensing device, a trench, a buffer layer, a barrier pattern, a via hole, and a metal contact. The semiconductor substrate includes a readout circuitry. The interconnection and an interlayer dielectric layer are formed on and/or over the semiconductor substrate while the interconnection is connected to the readout circuitry. The image sensing device may be formed on and/or over the interlayer dielectric and a trench may be formed in the image sensing device, the trench corresponding to the interconnection. The buffer layer may be formed on a sidewall of the trench. The barrier pattern may be formed on the buffer layer with the via hole penetrating through the image sensing device and the interlayer dielectric under the barrier pattern and exposing the interconnection. The metal contact may be formed in the via hole.
    Type: Application
    Filed: December 21, 2009
    Publication date: July 1, 2010
    Inventor: KI-JUN YUN
  • Publication number: 20100163967
    Abstract: A flash memory device and a method for fabricating the same are disclosed. The flash memory device includes an ONO layer on a substrate, polysilicon gates on the ONO layer, a gate oxide layer on the substrate, the ONO layer and the polysilicon gates, and a low temperature oxide layer and polysilicon sidewall spacers on outer side surfaces of the polysilicon gates, except in a region between nearest adjacent polysilicon gates.
    Type: Application
    Filed: December 21, 2009
    Publication date: July 1, 2010
    Inventor: Ki Jun YUN
  • Publication number: 20100167515
    Abstract: A method of forming a flash memory device includes forming a plurality of memory gates over a semiconductor substrate, forming an oxide film over the uppermost surface and sidewalls of the memory gates and then forming a plurality of selective gates on sidewalls of each of the memory gates.
    Type: Application
    Filed: December 27, 2009
    Publication date: July 1, 2010
    Inventor: Ki-Jun Yun
  • Patent number: 7723148
    Abstract: Provided is a method for manufacturing an image sensor. The method includes the following. A color filter layer is formed on a semiconductor substrate having a photodiode and a transistor formed thereon. A planarization layer is formed on the color filter layer. An LTO (Low Temperature Oxide) layer is formed on the planarization layer. A photoresist pattern is formed to correspond to the color filter layer on the LTO layer, and a reflow process is performed. A microlens array is formed by reactive ion etching the photoresist pattern and the LTO layer. A second reflow process may be performed on the photoresist pattern and/or the LTO layer during the reactive ion etching process.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: May 25, 2010
    Assignee: Dongbu HiTek Co., Ltd.
    Inventors: Ki Jun Yun, Sang Il Hwang
  • Publication number: 20100117173
    Abstract: An image sensor and a method of manufacturing an image sensor. A method of manufacturing an image sensor may include forming an interconnection and/or an interlayer dielectric over a semiconductor substrate including circuitry connected to an interconnection. A method of manufacturing an image sensor may include forming a photodiode having a first doping layer and/or a second doping layer over an interlayer dielectric, and forming a via hole through a photodiode, which may expose a portion of a surface of an interconnection. A method of manufacturing an image sensor may include forming a barrier pattern over a via hole which may cover an exposed surface of a second doping layer, and a contact plug on and/or over a via hole, which may connect an interconnection and a first doping layer. An upper portion of a contact plug may be etched. An insulating layer may be formed over a contact plug.
    Type: Application
    Filed: November 5, 2009
    Publication date: May 13, 2010
    Inventors: Ki-Jun Yun, Sang-Wook Ryu
  • Publication number: 20100120189
    Abstract: A method for manufacturing an image sensor includes forming circuitry including a metal line over a semiconductor substrate, forming a photodiode over the metal line, and forming a contact plug in the photodiode such that the contact plug is connected to the metal line. The forming of the contact plug includes performing a first etch process to etch a portion of the photodiode, and performing a second etch process to expose a portion of the metal line by using a byproduct generated in etching, to form a via hole for the contact plug in the photodiode.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 13, 2010
    Inventor: Ki-Jun Yun
  • Publication number: 20100117180
    Abstract: An image sensor and a method of manufacturing the same. An image sensor may include a first interlayer dielectric layer having a first metal wiring and/or a bonding silicon including impurity regions on and/or over a first interlayer dielectric layer. An image sensor may include a second interlayer dielectric layer formed on and/or over a bonding silicon, and/or a first contact plug connected to a first metal wiring. An image sensor may include a third interlayer dielectric layer on and/or over a second interlayer dielectric layer, a second contact plug connected to a first impurity region and/or a second metal wiring on and/or over a second interlayer dielectric layer. An image sensor may include and a color filter layer and/or a microlens. A dielectric layer may be between a first contact plug and a first impurity region. A dielectric layer may be on and/or over a second interlayer dielectric layer.
    Type: Application
    Filed: November 9, 2009
    Publication date: May 13, 2010
    Inventor: Ki-Jun Yun
  • Publication number: 20100105207
    Abstract: A method for forming a fine pattern of a semiconductor device includes forming an insulating layer and an etch layer over a semiconductor substrate, coating a photoresist layer over the etch layer, forming a photoresist pattern by performing a photolithography process for the photoresist layer, forming spacers at sidewalls of the photoresist pattern by performing a primary etching process using the photoresist pattern as a mask, and forming an etch layer pattern and an insulating layer pattern by performing a secondary etching process using the photoresist pattern and the spacers as a mask.
    Type: Application
    Filed: October 22, 2009
    Publication date: April 29, 2010
    Inventor: Ki-Jun Yun
  • Publication number: 20100081092
    Abstract: A method includes forming an interlayer dielectric layer including a contact plug over a semiconductor substrate, forming a metal layer, a hard mask layer, and an anti-reflection layer over the interlayer dielectric layer, forming a photoresist pattern over the anti-reflection layer, etching the anti-reflection layer in a primary etching process, using the photoresist pattern as an etching mask, to form an anti-reflection pattern, forming a first polymer layer over a surface of the anti-reflection pattern and the photoresist pattern by using polymer generated in the primary etching process, etching the hard mask layer in a secondary etching process, by using the anti-reflection pattern, the photoresist pattern, and the first polymer layer as an etching mask, to form a hard mask, and etching the metal layer in a tertiary etching process, by using the photoresist pattern, the anti-reflection pattern, the first polymer layer, and the hard mask as an etching mask, to form a metal interconnection.
    Type: Application
    Filed: September 24, 2009
    Publication date: April 1, 2010
    Inventor: Ki-Jun Yun
  • Publication number: 20100068882
    Abstract: The present method for manufacturing a semiconductor device comprises the steps of forming an aluminum wiring layer on a substrate; sequentially forming a hard mask, a polysilicon layer, and a bottom anti-reflective coating over the aluminum wiring layer; etching the polysilicon layer using a photoresist pattern formed over the bottom anti-reflective coating as mask; etching the hard mask to a predetermined thickness; and etching the hard mask to expose the aluminum wiring layer. The method for manufacturing a semiconductor device according to the present invention may prevent byproducts and polymer residue from when patterning the hard mask. As a result, the presently disclosed methods may avoid the need for a conventional cleaning process prior to etching the aluminum wiring layer to form aluminum lines.
    Type: Application
    Filed: September 14, 2009
    Publication date: March 18, 2010
    Inventor: Ki Jun Yun
  • Publication number: 20100038341
    Abstract: A method of forming a metal line of an inductor used in a Radio Frequency (RF) device, effectively removes polymer generated during an etching process to form trenches. The method removes the polymer using a radical having a high reactivity with the polymer. The method includes carrying out first main etching to form the trenches, carrying out ashing to remove polymer generated in the first main etching, and carrying out second main etching to form vias on the bottoms of the trenches.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 18, 2010
    Inventor: Ki-Jun Yun
  • Publication number: 20090166790
    Abstract: An image sensor may comprise circuitry, a first lower electrode, a photodiode, an upper electrode, a second lower electrode, and an upper interconnection. The circuitry may comprise a first lower interconnection and a second lower interconnection over a dielectric of a substrate. The first lower electrode, the photodiode, and the upper electrode may be sequentially formed over the first lower interconnection. The second lower electrode may comprise a passivation layer over the second lower interconnection. The upper interconnection may be formed over the second lower electrode and electrically connected to the upper electrode.
    Type: Application
    Filed: December 22, 2008
    Publication date: July 2, 2009
    Inventor: Ki Jun YUN