Patents by Inventor Ki-Youn Jang

Ki-Youn Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7453156
    Abstract: A wire bond interconnection between a die pad and a bond finger includes a support pedestal at a bond site of the lead finger, a ball bond on the die pad, and a stitch bond on the support pedestal, in which a width of the lead finger at the bond site is less than a diameter of the support pedestal. Also, a semiconductor package including a die mounted onto and electrically connected by a plurality of wire bonds to a substrate, in which each of the wire bonds includes a wire ball bonded to a pad on the die and stitch bonded to a support pedestal on a bond site on a lead finger, and in which the width of the lead finger at the bond site is less than the diameter of the support pedestal.
    Type: Grant
    Filed: November 14, 2005
    Date of Patent: November 18, 2008
    Assignee: Chippac, Inc.
    Inventors: Hun-Teak Lee, Jong-Kook Kim, Chul-Sik Kim, Ki-Youn Jang, Rajendra D. Pendse
  • Patent number: 7407080
    Abstract: A capillary tip for a wire bonding tool has a chamfer provided with at least one annular groove. The annular groove is generally oriented in a plane perpendicular to the axis of the capillary. In a sectional view through the capillary axis, the groove profile may be generally part-oval or part circular, such as semicircular or half-oval; or generally rectangular; or generally triangular. In some embodiments the width of the groove profile at the face of the chamfer is at least about one-tenth, more usually at least about one-fifth, the length of the chamfer face; and less than about one-half, more usually less than about one-third, the length of the chamfer face. In some embodiments two or more such grooves are provided. The grooved chamfer can improve the transmission of ultrasonic energy to the wire ball during formation of the bond.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: August 5, 2008
    Assignee: Chippac, Inc.
    Inventors: Kenny Lee, Hun-Teak Lee, Jong Kook Kim, Chulsik Kim, Ki-Youn Jang
  • Publication number: 20080150093
    Abstract: A shielded stacked integrated circuit package system is provided including forming a first integrated circuit structure having a first substrate and a first integrated circuit die; mounting a shield over the first substrate and the first integrated circuit die; mounting a second integrated circuit structure having a second substrate and a second integrated circuit die over the shield; and forming a package encapsulation for covering the first integrated circuit die, the shield, and the second integrated circuit structure.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Applicant: STATS ChipPAC LTD.
    Inventors: Ki Youn Jang, YoungMin Kim, Hyung Jun Jeon
  • Publication number: 20080150119
    Abstract: An integrated circuit package system that includes: providing a support structure including an integrated circuit and an electrical contact adjacent thereto; providing a first mold having a first cavity with a projection and a recess for collecting flash; engaging the first mold on the support structure with the first cavity over at least a portion of the integrated circuit and the projection and the recess between the at least a portion of the integrated circuit and the electrical contact; and injecting encapsulation material into the first cavity.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Applicant: STATS CHIPPAC LTD.
    Inventors: Ki Youn Jang, Sungmin Song, JoHyun Bae
  • Publication number: 20080135997
    Abstract: A wire bond interconnection between a die pad and a bond finger includes a support pedestal at a bond site of the lead finger, a ball bond on the die pad, and a stitch bond on the support pedestal, in which a width of the lead finger at the bond site is less than a diameter of the support pedestal. Also, a semiconductor package including a die mounted onto and electrically connected by a plurality of wire bonds to a substrate, in which each of the wire bonds includes a wire ball bonded to a pad on the die and stitch bonded to a support pedestal on a bond site on a lead finger, and in which the width of the lead finger at the bond site is less than the diameter of the support pedestal. Also, such a package in which the package substrate includes a two-tier substrate, each tier including a plurality of lead fingers having a lead finger bond pitch about twice the die pad pitch, the lead fingers of the first tier and the second tier having a staggered arrangement.
    Type: Application
    Filed: February 15, 2008
    Publication date: June 12, 2008
    Inventors: Hun-Teak Lee, Jong-Kook Kim, Chul-Sik Kim, Ki-Youn Jang, Rajendra D. Pendse
  • Publication number: 20080136006
    Abstract: A stacked integrated circuit package-in-package system is provided including forming a substrate having a top surface and a bottom surface, mounting a first device over the top surface, stacking a second device over the first device in an offset configuration, connecting a first internal interconnect between the first device and the bottom surface, connecting a second internal interconnect between the second device and the bottom surface, and encapsulating the first device and the second device.
    Type: Application
    Filed: December 9, 2006
    Publication date: June 12, 2008
    Applicant: STATS CHIPPAC LTD.
    Inventors: Ki Youn Jang, Jong-Woo Ha, Jong Wook Ju
  • Publication number: 20070176285
    Abstract: An integrated circuit underfill package system including providing a substrate having a dispense port, attaching a first integrated circuit die on the substrate, and supplying an underfill to the dispense port when the substrate and the first integrated circuit die are inverted.
    Type: Application
    Filed: January 31, 2006
    Publication date: August 2, 2007
    Applicant: STATS CHIPPAC LTD.
    Inventors: Hyung Jun Jeon, Ki Youn Jang, Dae-Wook Yang
  • Publication number: 20070001296
    Abstract: A semiconductor package system is provided including forming a support platform, mounting a first device over the support platform, forming a bump on the support platform, and mounting a second device on the first device and the bump.
    Type: Application
    Filed: August 31, 2006
    Publication date: January 4, 2007
    Applicant: STATS CHIPPAC LTD.
    Inventors: Hun Teak Lee, Jong Kook Kim, ChulSik Kim, Ki Youn Jang, Keon Teak Kang, Hyung Jun Jeon
  • Publication number: 20060267609
    Abstract: In a semiconductor assembly having stacked elements, discrete bumps made of a polymer such as an electrically nonconductive epoxy are interposed between the upper surface of a substrate and the lower surface of the overhanging part of an elevated element (die or package). The bumps are dimensioned to provide a clearance between the upper surface of the “bottom” substrate and the under surface of the second die or “top” package. The invention is carried out by first determining what height is required for the support; then depositing one or more of the polymer bumps at one or more suitable sites on the substrate; and placing the overhanging die or package onto the feature or features upon which it is stacked. The required height is the same as the accumulated thickness of the feature or features upon which the die or package is stacked (including the sum of thicknesses of, for example, any die, packages, spacers, adhesives layers, etc.).
    Type: Application
    Filed: May 30, 2006
    Publication date: November 30, 2006
    Applicant: STATS ChipPAC Ltd.
    Inventors: Hun-Teak Lee, Jong-Kook Kim, Chul-Sik Kim, Ki-Youn Jang
  • Publication number: 20060113665
    Abstract: A wire bond interconnection between a die pad and a bond finger includes a support pedestal at a bond site of the lead finger, a ball bond on the die pad, and a stitch bond on the support pedestal, in which a width of the lead finger at the bond site is less than a diameter of the support pedestal. Also, a semiconductor package including a die mounted onto and electrically connected by a plurality of wire bonds to a substrate, in which each of the wire bonds includes a wire ball bonded to a pad on the die and stitch bonded to a support pedestal on a bond site on a lead finger, and in which the width of the lead finger at the bond site is less than the diameter of the support pedestal. Also, such a package in which the package substrate includes a two-tier substrate, each tier including a plurality of lead fingers having a lead finger bond pitch about twice the die pad pitch, the lead fingers of the first tier and the second tier having a staggered arrangement.
    Type: Application
    Filed: November 14, 2005
    Publication date: June 1, 2006
    Applicant: ChipPAC, Inc
    Inventors: Hun-Teak Lee, Jong-Kook Kim, Chul-Sik Kim, Ki-Youn Jang, Rajendra Pendse
  • Publication number: 20060102694
    Abstract: A semiconductor package system includes providing a die having a plurality of contact pads. A leadframe is formed having a plurality of lead fingers with the plurality of lead fingers having a fine pitch and each having a substantially trapezoidal cross-section. A plurality of bumps is formed on the plurality of lead fingers, the plurality of bumps are on the tops and extend down the sides of the plurality of lead fingers. A plurality of bond wires is attached to the plurality of contact pads and to the plurality of bumps. An encapsulant is formed over the plurality of lead fingers, the die, and the plurality of bond wires, the encapsulant leaving lower surfaces of the plurality of lead fingers exposed.
    Type: Application
    Filed: September 16, 2005
    Publication date: May 18, 2006
    Applicant: STATS ChipPAC Ltd.
    Inventors: Hun Teak Lee, Jong Kook Kim, ChulSik Kim, Ki Youn Jang
  • Publication number: 20050218188
    Abstract: A capillary tip for a wire bonding tool has a chamfer provided with at least one annular groove. The annular groove is generally oriented in a plane perpendicular to the axis of the capillary. In a sectional view thru the capillary axis, the groove profile may be generally part-oval or part circular, such as semicircular or half-oval; or generally rectangular; or generally triangular. In some embodiments the width of the groove profile at the face of the chamfer is at least about one-tenth, more usually at least about one-fifth, the length of the chamfer face; and less than about one-half, more usually less than about one-third, the length of the chamfer face. In some embodiments two or more such grooves are provided. The grooved chamfer can improve the transmission of ultrasonic energy to the wire ball during formation of the bond.
    Type: Application
    Filed: October 22, 2004
    Publication date: October 6, 2005
    Applicant: ChipPAC, Inc.
    Inventors: Kenny Lee, Hun-Teak Lee, Jong Kim, Chulsik Kim, Ki-Youn Jang