Patents by Inventor Kiyoshi Shibata

Kiyoshi Shibata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110036529
    Abstract: A casting die assembly which does not produce any burrs includes a stationary die and a movable die that are clamped in a condition in which a slide core is caused to move toward a center of a movable die, and a back surface of a protrusion of the slide core contacts a stopper section provided on a frame section. The stopper section is subjected to the pressure applied to the slide core during a casting operation. Since the stopper section is provided on part of the frame section, which is integrally formed on the periphery of the stationary die, the stopper section is not caused to retreat or deform by the casting pressure and as a result, the slide core is not moved and burrs are not produced.
    Type: Application
    Filed: October 23, 2008
    Publication date: February 17, 2011
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Kiyoshi Shibata, Toshiro Ichihara, Toshiro Hayashi, Keizou Tanoue, Masamitsu Yamashita
  • Publication number: 20110011553
    Abstract: Four cavities are arranged on a concentric circle “C” with respect to the center “O” of a flow divider and a gate sleeve. Each of the cavities is connected to a sleeve stamp portion through each of four die side runners and each of four stamp side runners formed in a radial direction and separated from the neighboring runners. A semicircular arc-shaped reservoir is provided between the lower half side of the flow divider and the lower half side of the gate sleeve. This reservoir is connected to the sleeve stamp portion. A semi-solidified layer formed by pouring the molten metal into a sleeve is filled into the reservoir, so that the molten metal from which the semi-solidified layer is separated can be filled directly from each of the stamp side runners via the die side runners into each of the cavities evenly and simultaneously.
    Type: Application
    Filed: February 18, 2009
    Publication date: January 20, 2011
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Kiyoshi Shibata, Hideo Hazekawa, Keizou Tanoue, Masamitsu Yamashita
  • Patent number: 7855452
    Abstract: An electrode for a semiconductor device is formed on the mounting surface (particularly, the outer periphery thereof) of a semiconductor substrate in a semiconductor module. In order to secure a large gap between the electrodes, an insulating layer is formed on the electrode. Also formed are a plurality of bumps penetrating the insulating layer and connected to the electrode, and a rewiring pattern integrally formed with the bumps. The rewiring pattern includes a bump area and a wiring area extending contiguously with the bump area. The insulating layer is formed to have a concave upper surface in an interval between the bumps, and the wiring area of the rewiring pattern is formed to fit that upper surface. The wiring area of the rewiring pattern is formed to be depressed toward the semiconductor substrate in relation to the bump area of the rewiring pattern.
    Type: Grant
    Filed: January 30, 2008
    Date of Patent: December 21, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasuyuki Yanase, Yoshio Okayama, Kiyoshi Shibata, Yasunori Inoue, Hideki Mizuhara, Ryosuke Usui, Tetsuya Yamamoto, Masurao Yoshii
  • Publication number: 20100297284
    Abstract: A metal mold device for casting that is adapted to prevent a casting sleeve from falling and that keeps even spacing between an inner circumferential wall of the casting sleeve and an outer circumferential wall of a bore pin. Ball plungers are provided at regular intervals in a circumferential direction on an outer circumferential portion of the bore pin in the vicinity of a distal end of the bore pin and on an outer circumferential portion in the vicinity of a basal end thereof, respectively, with respect to the axial direction of the bore pin. Three distal ball plungers are provided on the outer circumferential portion in the vicinity of the distal end of the bore pin and three basal ball plungers are provided on the outer circumferential portion in the vicinity of the basal end thereof. The distal ball plungers are 60° out of phase with the basal ball plungers when viewed in the axial direction.
    Type: Application
    Filed: September 11, 2008
    Publication date: November 25, 2010
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Kiyoshi Shibata, Toshirou Ichihara, Keizou Tanoue, Yuuichi Honda, Masamitsu Yamashita
  • Publication number: 20100264552
    Abstract: A circuit device includes an insulating base provided with a resin layer mixed with a fibrous filler, bumps provided in the insulating base and functioning as electrodes for connection, a semiconductor device that is flip-chip mounted, and an underfill filling a gap between the semiconductor device and the insulating base. By allowing the fibrous filler projecting through the top surface of the resin layer to be in contact with the underfill, strength of adhesion between the underfill and the insulating base is improved.
    Type: Application
    Filed: August 8, 2008
    Publication date: October 21, 2010
    Inventors: Mayumi Nakasato, Ryosuke Usui, Yasunori Inoue, Kiyoshi Shibata
  • Publication number: 20100139088
    Abstract: A circuit board and a circuit apparatus using the same which can prevent displacement and film exfoliation ascribable to thermal expansion, and suppress a drop in reliability at increasing temperatures. The circuit board of the circuit apparatus includes a metal substrate having pierced holes as a core member. Protrusions are formed on the top ends of the pierced holes, and depressions are formed in the bottom ends of the pierced holes. Wiring pattern layers are formed on both sides of this metal substrate via respective insulating layers. In order to establish electrical connection between the wiring pattern layers, a conductor layer which connects the wiring pattern layers is formed through the metal substrate via the pierced holes. The conductor layer thereby establishes electrical conduction between the wiring pattern layers. Furthermore, a semiconductor chip is directly connected to the surface side of the circuit board via solder balls.
    Type: Application
    Filed: February 9, 2010
    Publication date: June 10, 2010
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Kiyoshi SHIBATA, Ryosuke Usui, Yasunori Inoue
  • Publication number: 20100071865
    Abstract: [SUMMARY] [OBJECT] The object of the present invention is to provide a casting method capable of simultaneously attaining the shortening of cycle time and the improvement in casting quality. [SOLUTION] The pressure allowing the molten metal level to go up to the positions of from P0 to P4 is applied to the molten metal within a molten metal reservoir 1. Then, the pressure of P4 is maintained for a predetermined time. During this time, the molten metal which comes into contact with an upper die 4 is cooled earlier than the molten metal being in contact with another die. Through this cooling the molten metal shrinks. However, since the pressure of P4 is maintained, the molten metal is supplied from the lower side to a shrunk portion, so as not to cause shrinkage cavity or underfill.
    Type: Application
    Filed: April 17, 2008
    Publication date: March 25, 2010
    Applicant: HONDA MOTOR CO., LTD.
    Inventors: Kiyoshi Shibata, Toshirou Ichihara, Keizou Tanoue, Kouzou Miyamoto, Masamitsu Yamashita
  • Patent number: 7683266
    Abstract: A circuit board and a circuit apparatus using the same which can prevent displacement and film exfoliation ascribable to thermal expansion, and suppress a drop in reliability at increasing temperatures. The circuit board of the circuit apparatus includes a metal substrate having pierced holes as a core member. Protrusions are formed on the top ends of the pierced holes, and depressions are formed in the bottom ends of the pierced holes. Wiring pattern layers are formed on both sides of this metal substrate via respective insulating layers. In order to establish electrical connection between the wiring pattern layers, a conductor layer which connects the wiring pattern layers is formed through the metal substrate via the pierced holes. The conductor layer thereby establishes electrical conduction between the wiring pattern layers. Furthermore, a semiconductor chip is directly connected to the surface side of the circuit board via solder balls.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: March 23, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kiyoshi Shibata, Ryosuke Usui, Yasunori Inoue
  • Publication number: 20090250251
    Abstract: In a circuit device where a wiring layer, an insulating resin and a circuit element are stacked together in such a manner as to embed a bump structure into the insulating resin, the connection reliability between the bump structure and the circuit element is enhanced. A circuit device (10) has a structure where a wiring layer (20), an insulating resin layer (30) and a circuit element (40) are stacked in this order by a pressure bonding. The wiring layer (20) is provided with bump electrodes (22) in positions that correspond respectively to element electrodes of a circuit element (40). The insulating resin layer (30) is formed of a material that develops plastic flow when pressurized. The bump electrode (22) penetrates the insulating resin layer (30) and is electrically connected to a corresponding element electrode (42).
    Type: Application
    Filed: November 30, 2006
    Publication date: October 8, 2009
    Inventors: Kiyoshi Shibata, Ryosuke Usui, Yasunori Inoue
  • Publication number: 20080236879
    Abstract: Provided are a circuit board with enhanced moisture resist and the method of manufacturing the circuit board, and a circuit device and a method of manufacturing the circuit device. A circuit board of the present invention includes: a substrate; wirings formed on the main surface of the substrate; a cover layer covering the wirings excluding the regions to be connectors; back electrodes formed on the bottom surface of the substrate; and through-hole electrodes formed so as to penetrate the substrate, and thereby connecting the wirings and the back electrodes. On surfaces of each of the wirings in this circuit board, convex portions on the periphery of the substrate are set larger in width than convex portions in a center portion of the substrate. With this configuration, adhesion reliability between the wirings and the cover layer under a thermal cycle load can be enhanced.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 2, 2008
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuhiro Kohara, Kiyoshi Shibata, Masayuki Nagamatsu, Ryosuke Usui, Toshiya Shimizu
  • Publication number: 20080217769
    Abstract: An electrode for a semiconductor device is formed on the mounting surface (particularly, the outer periphery thereof) of a semiconductor substrate in a semiconductor module. In order to secure a large gap between the electrodes, an insulating layer is formed on the electrode. Also formed are a plurality of bumps penetrating the insulating layer and connected to the electrode, and a rewiring pattern integrally formed with the bumps. The rewiring pattern includes a bump area and a wiring area extending contiguously with the bump area. The insulating layer is formed to have a concave upper surface in an interval between the bumps, and the wiring area of the rewiring pattern is formed to fit that upper surface. The wiring area of the rewiring pattern is formed to be depressed toward the semiconductor substrate in relation to the bump area of the rewiring pattern.
    Type: Application
    Filed: January 30, 2008
    Publication date: September 11, 2008
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasuyuki Yanase, Yoshio Okayama, Kiyoshi Shibata, Yasunori Inoue, Hideki Mizuhara, Ryosuke Usui, Tetsuya Yamamoto, Masurao Yoshii
  • Patent number: 7420126
    Abstract: A circuit board and a circuit apparatus using the same are provided, which have an improved heat radiation capability near through holes piercing through its metal substrate so as to address a requirement as to heat radiation capability. The circuit apparatus has the circuit board in which a metal substrate having pierced holes is formed as a core member. Protrusions are formed at the top ends of the pierced holes, and round corners are formed at the bottom ends of the same. Insulating layers are formed on both sides of the metal substrate, and wiring pattern layers are formed on the respective insulating layers. The insulator formed on one side of the metal substrate and the insulator formed on the other side of the metal substrate are extended to inside the pierced holes. The joining surface between the extended portions is shifted off the center position of the metal substrate in the thickness direction, toward the same side as where the protrusions are formed.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: September 2, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kiyoshi Shibata, Ryosuke Usui
  • Publication number: 20080157338
    Abstract: A manufacturing technology is provided capable of improving the reliability of a semiconductor module having a via contact connected to an electrode part of a semiconductor device. A conductive bump is formed on an insulating layer such that the end of the conductive bump is in contact with an electrode of a semiconductor substrate. By pressure-molding the assembly using a press machine, the semiconductor substrate, the conductive bump, and the insulating layer are integrated. With this, the conductive bump is allowed to embed itself in the insulating layer while maintaining contact with the electrode. The insulating layer is subject to laser irradiation from above so as to form an aperture exposing the conductive bump. Subsequently, the upper surface of the insulating layer and the interior surface of the aperture are plated with copper by electroless plating and electroplating so as to form a copper plating layer, and a via contact is formed in the aperture so as to coat the inner wall of the aperture.
    Type: Application
    Filed: December 14, 2007
    Publication date: July 3, 2008
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Mayumi Nakasato, Kiyoshi Shibata, Yoshio Okayama, Ryosuke Usui, Hideki Mizuhara
  • Publication number: 20070044999
    Abstract: A circuit board and a circuit apparatus using the same are provided, which have an improved heat radiation capability near through holes piercing through its metal substrate so as to address a requirement as to heat radiation capability. The circuit apparatus has the circuit board in which a metal substrate having pierced holes is formed as a core member. Protrusions are formed at the top ends of the pierced holes, and round corners are formed at the bottom ends of the same. Insulating layers are formed on both sides of the metal substrate, and wiring pattern layers are formed on the respective insulating layers. The insulator formed on one side of the metal substrate and the insulator formed on the other side of the metal substrate are extended to inside the pierced holes. The joining surface between the extended portions is shifted off the center position of the metal substrate in the thickness direction, toward the same side as where the protrusions are formed.
    Type: Application
    Filed: August 29, 2006
    Publication date: March 1, 2007
    Inventors: Kiyoshi Shibata, Ryosuke Usui
  • Publication number: 20070023202
    Abstract: A circuit board and a circuit apparatus using the same which can prevent displacement and film exfoliation ascribable to thermal expansion, and suppress a drop in reliability at increasing temperatures. The circuit board of the circuit apparatus includes a metal substrate having pierced holes as a core member. Protrusions are formed on the top ends of the pierced holes, and depressions are formed in the bottom ends of the pierced holes. Wiring pattern layers are formed on both sides of this metal substrate via respective insulating layers. In order to establish electrical connection between the wiring pattern layers, a conductor layer which connects the wiring pattern layers is formed through the metal substrate via the pierced holes. The conductor layer thereby establishes electrical conduction between the wiring pattern layers. Furthermore, a semiconductor chip is directly connected to the surface side of the circuit board via solder balls.
    Type: Application
    Filed: July 28, 2006
    Publication date: February 1, 2007
    Inventors: Kiyoshi Shibata, Ryosuke Usui, Yasunori Inoue
  • Patent number: 7056816
    Abstract: A mask layer having an opening is formed on a semiconductor substrate. Next, oxygen ions and a first impurity are implanted into the semiconductor substrate using the mask layer as a mask. Then, the mask layer is removed. Next, the oxygen ions are heat treated to react and form an oxide film on the region where the first impurity has been implanted. Then, the oxide film is removed to form a depression in the semiconductor substrate. Next, a gate insulating film and a gate electrode are formed on the depression. Then a second impurity is implanted into the surface of the semiconductor substrate to form a source/drain. An impurity lighter than the oxygen ions and the second impurity is used as the first impurity.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: June 6, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Kiyoshi Shibata
  • Publication number: 20050070081
    Abstract: A mask layer having an opening is formed on a semiconductor substrate. Next, oxygen ions and a first impurity are implanted into the semiconductor substrate using the mask layer as a mask. Then, the mask layer is removed. Next, the oxygen ions are heat treated to react and form an oxide film on the region where the first impurity has been implanted. Then, the oxide film is removed to form a depression in the semiconductor substrate. Next, a gate insulating film and a gate electrode are formed on the depression. Then a second impurity is implanted into the surface of the semiconductor substrate to form a source/drain. An impurity lighter than the oxygen ions and the second impurity is used as the first impurity.
    Type: Application
    Filed: August 18, 2004
    Publication date: March 31, 2005
    Applicant: Semiconductor Leading Edge Technologies, Inc.
    Inventor: Kiyoshi Shibata
  • Patent number: 5798499
    Abstract: An electrically heating windshield glass has two glass plates; a polyvinylbutyral sheet interposed between the two glass plates; a pair of bus bars provided at peripheral portions of the glass plates and between them; and a number of tungsten wires connected between a pair of the bus bars. The diameter of the tungsten wires or the space between adjacent tungsten wires is continuously and/or stepwisely changed in response to a change of the distance between the bus bars.
    Type: Grant
    Filed: March 20, 1997
    Date of Patent: August 25, 1998
    Assignee: Asahi Glass Company Ltd.
    Inventors: Kiyoshi Shibata, Seiichi Miyasaka
  • Patent number: 5675347
    Abstract: A high frequency wave glass antenna for automobile in which a line shape or a strip shape antenna conductor is provided on a glass plate of a window of an automobile in an approximately circular, an approximately elliptic or an approximately polygonal form having an opening portion, a first end of two ends on both sides in the vicinity of the opening portion of the antenna conductor is connected to an electricity feeding portion and a second end thereof is connected to a grounding conductor, and which provides the electricity feeding portion and the grounding conductor that are proximate to each other, or the grounding conductor having a predetermined area.
    Type: Grant
    Filed: May 28, 1996
    Date of Patent: October 7, 1997
    Assignee: Asahi Glass Company Ltd.
    Inventors: Fumitaka Terashima, Toshihiko Saitou, Kiyoshi Shibata
  • Patent number: 5568156
    Abstract: A high frequency wave glass antenna for an automobile in which a line shape or a strip shape antenna conductor is provided on a glass plate of a window of an automobile in an approximately circular, an approximately elliptic or an approximately polygonal form having an opening portion, a first end of two ends on both sides in the vicinity of the opening portion of the antenna conductor is connected to an electricity feeding portion and a second end thereof is connected to a grounding conductor, and which provides the electricity feeding portion and the grounding conductor that are proximate to each other, or the grounding conductor having a predetermined area. An insular conductor is provided in a range wherein the insular conductor is capacitively coupled with a portion or a total of a preamplifier circuit.
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: October 22, 1996
    Assignee: Asahi Glass Company Ltd.
    Inventors: Fumitaka Terashima, Toshihiko Saitou, Kiyoshi Shibata