Patents by Inventor Kiyoshi Takekoshi

Kiyoshi Takekoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8456186
    Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.
    Type: Grant
    Filed: June 27, 2007
    Date of Patent: June 4, 2013
    Assignees: Tokyo Electron Limited, Ibiden Co., Ltd.
    Inventors: Kiyoshi Takekoshi, Hisatomi Hosaka, Junichi Hagihara, Kunihiko Hatsushika, Takamasa Usui, Hisashi Kaneko, Nobuo Hayasaka, Yoshiyuki Ido
  • Patent number: 8120372
    Abstract: The present invention is provided to quickly and efficiently inspect a plurality of CCD sensors. In the present invention, a plurality of openings is formed in a circuit board of a probe card. A plurality of vertical-type probe pins is connected to a lower surface of the circuit board. A guide board is installed at the lower surface of the circuit board, and respective probe pins are inserted into respective guide holes of the guide board. The guide board is made of a transparent glass board. During an inspection, inspection light emitted from a test head passes through the openings of the circuit board and the guide board, so that it is irradiated onto the plurality of CCD sensors on the substrate. Since the plurality of probe pins can be arranged at a narrow pitch without blocking the inspection light, adjacent CCD sensors on the substrate can be inspected simultaneously.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: February 21, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Kiyoshi Takekoshi
  • Patent number: 8101436
    Abstract: A dicing method, integrated circuit chip testing method, substrate holding apparatus, and adhesive film are disclosed. A first adhesive film 22 in which the adhesion is reduced by ultraviolet radiation is stretched inside a ring-like frame 21 larger than a wafer size, and a wafer W is adhered on the first adhesion film 22. A second adhesive film 4 in which the adhesion of the two surfaces is reduced by heating is adhered on a plate-like jig 3. After the first film is adhered on the second film, dicing is performed. Since the wafer is adhered to the jig, the relative positions of chips do not shift from each other. This makes it possible to load the wafer together with the jig into a testing apparatus and align electrode pads of the chips with a probe. This allows, e.g., collective testing of a plurality of chips.
    Type: Grant
    Filed: February 27, 2003
    Date of Patent: January 24, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Kiyoshi Takekoshi
  • Patent number: 7716824
    Abstract: An object of the present invention is to finely conduct an inspection of high integration devices by making it possible to form guide holes in a support plate of a probe card in a narrower pitch than in the conventional case of forming the guide holes in a support plate of the same area, and to broaden a range of options for an elastic member which works to urge a probe pin. The present invention has a circuit board and a support plate being placed under the circuit board and supporting the probe pin. In the guide hole formed in the support plate, the probe pin composed of an elastic portion and a pin portion is inserted, and a rip of the pin portion protrudes downward from the support plate. The guide hole has a quadrangular horizontal sectional shape.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: May 18, 2010
    Assignee: Tokyo Electron Limited
    Inventor: Kiyoshi Takekoshi
  • Publication number: 20100013505
    Abstract: The present invention is provided to quickly and efficiently inspect a plurality of CCD sensors. In the present invention, a plurality of openings is formed in a circuit board of a probe card. A plurality of vertical-type probe pins is connected to a lower surface of the circuit board. A guide board is installed at the lower surface of the circuit board, and respective probe pins are inserted into respective guide holes of the guide board. The guide board is made of a transparent glass board. During an inspection, inspection light emitted from a test head passes through the openings of the circuit board and the guide board, so that it is irradiated onto the plurality of CCD sensors on the substrate. Since the plurality of probe pins can be arranged at a narrow pitch without blocking the inspection light, adjacent CCD sensors on the substrate can be inspected simultaneously.
    Type: Application
    Filed: November 5, 2007
    Publication date: January 21, 2010
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Kiyoshi Takekoshi
  • Patent number: 7621045
    Abstract: A probe is disclosed, comprising a beam 4B, which has a front end 4b1, an intermediate portion 4b2 and a base end 4b3, the front end being a portion for contacting a test subject through a contactor, the base end being a portion for fixing the probe; and a substantially trapezoidal contactor 4A, which is fixed to the leading end 4b1 of the beam.
    Type: Grant
    Filed: February 5, 2007
    Date of Patent: November 24, 2009
    Assignee: Tokyo Electron Limited
    Inventors: Hisatomi Hosaka, Kiyoshi Takekoshi
  • Patent number: 7602203
    Abstract: An object of the present invention is to make it possible that a probe for testing electrical characteristics of an object to be tested is easily attached to a support member such as a contactor. A through hole is formed in the contactor. In the probe, a fitting/locking portion which can be fitted in this through hole is formed. The fitting/locking portion is formed to penetrate the through hole of the contactor and to be locked in the contactor in a state that a tip thereof is in contact with a connecting terminal of a printed wiring board. The fitting/locking portion itself is locked in the contactor by hooking a locking portion thereof to an end face on an upper side of the through hole.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: October 13, 2009
    Assignee: Tokyo Electron Limited
    Inventor: Kiyoshi Takekoshi
  • Publication number: 20090205372
    Abstract: A large number of fine and deep holes are fanned in a glass substrate with high positional and dimensional accuracy. With a use of an etching of a photolithography technique, a large number of fine holes are formed in a silicon substrate. Hole forming pins are stood in the holes. The silicon substrate is held by a holding member of a hole forming apparatus. The glass substrate is housed in a container having an opened upper surface. The container is heated, and the glass substrate housed in the container is melted. The silicon substrate is lowered using the holding member, and the hole forming pins are inserted into the glass substrate. Thereafter, the container is cooled, and the glass substrate is solidified while having the hole forming pins inserted therein. The glass substrate is taken out from the container, the hole forming pins are dissolved in an aqua regia to thereby form the holes in the glass substrate.
    Type: Application
    Filed: July 12, 2006
    Publication date: August 20, 2009
    Applicant: TOYKO ELECTRON LIMITED
    Inventor: Kiyoshi Takekoshi
  • Publication number: 20090144971
    Abstract: An object of the present invention is to finely conduct an inspection of high integration devices by making it possible to form guide holes in a support plate of a probe card in a narrower pitch than in the conventional case of forming the guide holes in a support plate of the same area, and to broaden a range of options for an elastic member which works to urge a probe pin. The present invention has a circuit board and a support plate being placed under the circuit board and supporting the probe pin. In the guide hole formed in the support plate, the probe pin composed of an elastic portion and a pin portion is inserted, and a rip of the pin portion protrudes downward from the support plate. The guide hole has a quadrangular horizontal sectional shape.
    Type: Application
    Filed: July 11, 2006
    Publication date: June 11, 2009
    Applicant: TOYKO ELECTRON LIMITED
    Inventor: Kiyoshi Takekoshi
  • Publication number: 20080164892
    Abstract: An object of the present invention is to make it possible that a probe for testing electrical characteristics of an object to be tested is easily attached to a support member such as a contactor. A through hole is formed in the contactor. In the probe, a fitting/locking portion which can be fitted in this through hole is formed. The fitting/locking portion is formed to penetrate the through hole of the contactor and to be locked in the contactor in a state that a tip thereof is in contact with a connecting terminal of a printed wiring board. The fitting/locking portion itself is locked in the contactor by hooking a locking portion thereof to an end face on an upper side of the through hole.
    Type: Application
    Filed: March 1, 2006
    Publication date: July 10, 2008
    Inventor: Kiyoshi Takekoshi
  • Publication number: 20080018355
    Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.
    Type: Application
    Filed: June 27, 2007
    Publication date: January 24, 2008
    Inventors: Kiyoshi TAKEKOSHI, Hisatomi Hosaka, Junichi Hagihara, Kunihiko Hatsushika, Takamasa Usui, Hisashi Kaneko, Nobuo Hayasaka, Yoshiyuki Ido
  • Patent number: 7319339
    Abstract: Disclosed is an inspection method for inspecting the electrical characteristics of a device by bringing an inspecting probe into electrical contact with an inspection electrode. An insulating film formed on the surface of the inspection electrode is broken by utilizing a fritting phenomenon so as to bring the inspection electrode into electrical contact with the inspection electrode.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: January 15, 2008
    Assignees: Tokyo Electron Limited
    Inventors: Shinji Iino, Kiyoshi Takekoshi, Tadatomo Suga, Toshihiro Itoh, Kenichi Kataoka
  • Patent number: 7304489
    Abstract: Disclosed is an inspection method for inspecting the electrical characteristics of a device by bringing an inspecting probe into electrical contact with an inspection electrode. An insulating film formed on the surface of the inspection electrode is broken by utilizing a fritting phenomenon so as to bring the inspection electrode into electrical contact with the inspection electrode.
    Type: Grant
    Filed: May 2, 2006
    Date of Patent: December 4, 2007
    Assignees: Tokyo Electron Limited
    Inventors: Shinji Iino, Kiyoshi Takekoshi, Tadatomo Suga, Toshihiro Itoh, Kenichi Kataoka
  • Publication number: 20070229101
    Abstract: Disclosed is an inspection method for inspecting the electrical characteristics of a device by bringing an inspecting probe into electrical contact with an inspection electrode. An insulating film formed on the surface of the inspection electrode is broken by utilizing a fritting phenomenon so as to bring the inspection electrode into electrical contact with the inspection electrode.
    Type: Application
    Filed: June 7, 2007
    Publication date: October 4, 2007
    Inventors: Shinji Iino, Kiyoshi Takekoshi, Tadatomo Suga, Toshihiro Itoh, Kenichi Kataoka
  • Patent number: 7256592
    Abstract: A probe is disclosed, comprising a beam, which has a front end, an intermediate portion and a base end. The leading end is a portion for contacting a test subject through a contactor, the base end being a portion for fixing the probe. The probe includes a substantially trapezoidal contactor, which is fixed to the leading end of the beam.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: August 14, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Hisatomi Hosaka, Kiyoshi Takekoshi
  • Patent number: 7242206
    Abstract: A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: July 10, 2007
    Assignees: Tokyo Electron Limited, Kabushiki Kaisha Toshiba, Ibiden Co., Ltd.
    Inventors: Kiyoshi Takekoshi, Hisatomi Hosaka, Junichi Hagihara, Kunihiko Hatsushika, Takamasa Usui, Hisashi Kaneko, Nobuo Hayasaka, Yoshiyuki Ido
  • Publication number: 20070124932
    Abstract: A probe is disclosed, comprising a beam 4B, which has a front end 4b1, an intermediate portion 4b2 and a base end 4b3, the front end being a portion for contacting a test subject through a contactor, the base end being a portion for fixing the probe; and a substantially trapezoidal contactor 4A, which is fixed to the leading end 4b1 of the beam.
    Type: Application
    Filed: February 5, 2007
    Publication date: June 7, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hisatomi HOSAKA, Kiyoshi Takekoshi
  • Publication number: 20070126444
    Abstract: A probe is disclosed, comprising a beam 4B, which has a front end 4b1, an intermediate portion 4b2 and a base end 4b3, the front end being a portion for contacting a test subject through a contactor, the base end being a portion for fixing the probe; and a substantially trapezoidal contactor 4A, which is fixed to the leading end 4b1 of the beam.
    Type: Application
    Filed: February 5, 2007
    Publication date: June 7, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Hisatomi Hosaka, Kiyoshi Takekoshi
  • Patent number: 7221176
    Abstract: In a vacuum prober, a head plate is arranged on a prober chamber. A stage, first moving mechanism, recessed chamber, and sealing member are provided in the prober chamber. The stage is arranged below a probe card. The first moving mechanism vertically moves the stage in at least the Z direction. The recessed chamber has a bottom portion and side portion. A lower camera, an upper camera, and the stage are operated to obtain data for alignment. When the upper end of the side portion of the recessed chamber comes into tight contact with the lower surface of the sealing member and a vacuum mechanism evacuates the recessed chamber, a vacuum chamber is formed. As the chamber has a small capacity, the time required for evacuation can be shortened.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: May 22, 2007
    Assignee: Tokyo Electron Limited
    Inventors: Haruhiko Yoshioka, Kiyoshi Takekoshi, Shinjiro Watanabe
  • Publication number: 20060192578
    Abstract: Disclosed is an inspection method for inspecting the electrical characteristics of a device by bringing an inspecting probe into electrical contact with an inspection electrode. An insulating film formed on the surface of the inspection electrode is broken by utilizing a fritting phenomenon so as to bring the inspection electrode into electrical contact with the inspection electrode.
    Type: Application
    Filed: May 2, 2006
    Publication date: August 31, 2006
    Applicants: TOKYO ELECTON LIMITED, TADATOMO SUGA, TOSHIHIRO ITOH
    Inventors: Shinji Iino, Kiyoshi Takekoshi, Tadatomo Suga, Toshihiro Itoh, Kenichi Kataoka