Patents by Inventor Kiyotaka Tsukada
Kiyotaka Tsukada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080173473Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 ?m) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.Type: ApplicationFiled: October 19, 2007Publication date: July 24, 2008Applicant: IBIDEN CO., LTDInventors: Naohiro HIROSE, Kouta Noda, Hiroshi Segawa, Honjin En, Kiyotaka Tsukada, Naoto Ishida, Kouji Asano, Atsushi Shouda
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Publication number: 20080115963Abstract: A flexible printed wiring board includes a first conductor layer in the element mounting part adjacent to the top surface of the wiring board; a second conductor layer in the element mounting part adjacent to the bottom surface of the wiring board; and a third conductor layer between the first conductor layer and the second conductor layer, wherein the first and third conductor layers extend through and beyond the bending part, and the second conductor layer is absent in the bending part.Type: ApplicationFiled: November 14, 2007Publication date: May 22, 2008Applicant: IBIDEN CO., LTDInventors: Kiyotaka TSUKADA, Terumasa NINOMARU, Masaki KIZAKI
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Patent number: 7339118Abstract: In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon each other. The first conductive layer (11) is a parts connecting layer and the n-th conductive layer (13) is an external connecting layer which is connected to external connecting terminals (7). The second to (n?1)-th conductive layers (12) are current transmitting layers for transmitting internal currents. The surface of the n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to make the initial insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.Type: GrantFiled: March 9, 1998Date of Patent: March 4, 2008Assignee: Ibiden Co., Ltd.Inventors: Masaru Takada, Hisashi Minoura, Kiyotaka Tsukada, Hiroyuki Kobayashi, Mitsuhiro Kondo
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Patent number: 7312401Abstract: A flexible printed wiring board includes a first conductor layer in the element mounting part adjacent to the top surface of the wiring board; a second conductor layer in the element mounting part adjacent to the bottom surface of the wiring board; and a third conductor layer between the first conductor layer and the second conductor layer, wherein the first and third conductor layers extend through and beyond the bending part, and the second conductor layer is absent in the bending part.Type: GrantFiled: September 20, 2005Date of Patent: December 25, 2007Assignee: Ibiden Co., Ltd.Inventors: Kiyotaka Tsukada, Terumasa Ninomaru, Masaki Kizaki
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Patent number: 7310238Abstract: The present invention provides a thin-film embedded capacitance having a substantial electrostatic capacity per unit area, and a method for manufacturing thereof. A thin film embedded capacitance comprising: a metallic thin-film for wiring made of a metallic material in a non-yield state; the first electrode formed on the film for wiring; a dielectric material layer formed on the first electrode and the film for wiring, at a temperature not lower than ordinary room temperature to lower than a yield temperature of the film for wiring, having a coefficient of thermal expansion lower than that the film for wiring; and the second electrode formed on the dielectric material layer, and a method for manufacturing thereof.Type: GrantFiled: August 3, 2006Date of Patent: December 18, 2007Assignee: Ibiden Co., Ltd.Inventor: Kiyotaka Tsukada
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Publication number: 20070030627Abstract: The present invention provides a thin-film embedded capacitance having a substantial electrostatic capacity per unit area, and a method for manufacturing thereof. A thin film embedded capacitance comprising: a metallic thin-film for wiring made of a metallic material in a non-yield state; the first electrode formed on the film for wiring; a dielectric material layer formed on the first electrode and the film for wiring, at a temperature not lower than ordinary room temperature to lower than a yield temperature of the film for wiring, having a coefficient of thermal expansion lower than that the film for wiring; and the second electrode formed on the dielectric material layer, and a method for manufacturing thereof.Type: ApplicationFiled: August 3, 2006Publication date: February 8, 2007Applicant: IBIDEN CO., LTDInventor: Kiyotaka Tsukada
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Publication number: 20060202344Abstract: In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon another. The first conductive layer (11) is constituted as a parts connecting layer and the n-th conductive layer (13) is constituted as an external connecting layer which is connected to external connecting terminals (7). The second to (n?1)-th conductive layers (12) are constituted as current transmitting layers for transmitting internal currents. The surface of the n-th conductive layer (13) is coated with the outermost n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to constitute the initial insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.Type: ApplicationFiled: May 25, 2006Publication date: September 14, 2006Applicant: IBIDEN CO., LTD.Inventors: Masaru Takada, Hisashi Minoura, Kiyotaka Tsukada, Hiroyuki Kobayashi, Mitsuhiro Kondo
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Publication number: 20060169484Abstract: This invention provides a printed wiring board having an intensified drop impact resistance of a joint portion between pad and solder. An electrode pad comprises pad portion loaded with solder ball and a cylindrical portion projecting to the solder ball supporting the pad portion. An outer edge of the pad portion extends sideway from a cylindrical portion so that the outer edge is capable of bending. If the outer edge bends when stress is applied to the solder ball 30, stress on the outer edge of the pad portion on which stress is concentrated can be relaxed so as to intensify the joint strength between an electrode pad and solder ball.Type: ApplicationFiled: December 16, 2005Publication date: August 3, 2006Applicant: IBIDEN CO., LTD.Inventors: Takahiro Yamashita, Hiroyuki Watanabe, Kiyotaka Tsukada, Michio Ido, Morio Nakao
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Publication number: 20060068613Abstract: A flexible printed wiring board includes a first conductor layer in the element mounting part adjacent to the top surface of the wiring board; a second conductor layer in the element mounting part adjacent to the bottom surface of the wiring board; and a third conductor layer between the first conductor layer and the second conductor layer, wherein the first and third conductor layers extend through and beyond the bending part, and the second conductor layer is absent in the bending part.Type: ApplicationFiled: September 20, 2005Publication date: March 30, 2006Inventors: Kiyotaka Tsukada, Terumasa Ninomaru, Masaki Kizaki
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Publication number: 20060049509Abstract: A printed wiring board comprises the insulating layer 11 (12); at least one resistance element 31, (312) comprising a metal as a main component has 0.5 to 5 ?m of a roughened surface in an arithmetic means height in the one surface, in ?Z direction, and 5% to 50% of the arithmetic mean height in average thickness, which is embedded close to a surface on one side of the insulating layer 11 and a conductive pattern wired surface is composed of the one surface of the resistance element and the one side of the insulating layer 11; and the conductive pattern 351 (352), arranged on the conductive pattern wired surface, is connected to the terminal of the resistance element 311 (312). With this structure, it is provided the printed wiring board comprising the resistance element having an accurate and stable resistance value in a broader resistance value range.Type: ApplicationFiled: October 20, 2005Publication date: March 9, 2006Applicant: IBIDEN, CO., LTD.Inventors: Kiyotaka Tsukada, Toshimasa Iwata, Terumasa Ninomaru, Takamichi Sugiura
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Publication number: 20060042824Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.Type: ApplicationFiled: October 27, 2005Publication date: March 2, 2006Applicant: IBIDEN CO., Ltd.Inventors: Masaru Takada, Hiroyuki Kobayashi, Kenji Chihara, Hisashi Minoura, Kiyotaka Tsukada, Mitsuhiro Kondo
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Patent number: 6986917Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.Type: GrantFiled: April 7, 2003Date of Patent: January 17, 2006Assignee: IBIDEN Co., Ltd.Inventors: Masaru Takada, Hiroyuki Kobayashi, Kenji Chihara, Hisashi Minoura, Kiyotaka Tsukada, Mitsuhiro Kondo
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Patent number: 6825421Abstract: In a printed wiring board, an odd number (n) of conductive layers (11-13) and insulating layers (21-23) are alternately laminated upon each other. The first conductive layer (11) is a parts connecting layer and the n-th conductive layer (13) is an external connecting layer which is connected to external connecting terminals (7). The second to (n−1)-th conductive layers (12) are current transmitting layers for transmitting internal currents. The surface of the n-th insulating layer (23) in a state where the external connecting terminals (7) are exposed on the surface. It is preferable to make the initial insulating layers of a glass-cloth reinforced prepreg and the external insulating layers of a resin.Type: GrantFiled: September 13, 1999Date of Patent: November 30, 2004Assignee: Ibiden Co., Ltd.Inventors: Masaru Takada, Hisashi Minoura, Kiyotaka Tsukada, Hiroyuki Kobayashi, Mitsuhiro Kondo
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Patent number: 6809415Abstract: A printed circuit board 1 providing superior adhesion between a substrate 2 and a conductor pattern 3 and preventing damage of the substrate 2. The width c of the bottom surface 310 of the conductor pattern 3 is greater than the width d of the top surface 320. Accordingly, the conductor pattern 3 has a trapezoidal cross-section. The two side surfaces 315 of a lower portion 31 of the conductor pattern 3 are coated by a solder resist. The two side surfaces 325 at the upper portion 32 of the conductor pattern 3 are exposed from the solder resist 4. A solder ball 6 engages the two side surfaces 325.Type: GrantFiled: December 19, 2000Date of Patent: October 26, 2004Assignee: Ibiden Co., Ltd.Inventors: Kiyotaka Tsukada, Mitsuhiro Kondo, Kenji Chihara, Naoto Ishida, Atsushi Shouda
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Patent number: 6715204Abstract: A printed circuit board and a method for manufacturing the same that facilitates the formation of an upper surface pattern and prevents a lower surface metal foil from being damaged when forming a blind via hole with a laser. A lower surface and an upper surface of an insulative substrate (5) are respectively coated with a lower surface metal foil (220) and an upper surface metal foil (210), the thickness of which is less than that of the lower surface metal foil (220). Next, an opening (213) is formed in the upper surface metal foil at a location corresponding to a blind via hole formation portion (35) of the insulative substrate. A blind via hole (3), the bottom of which is the lower surface metal foil, is formed by emitting a laser (8) against the blind via hole formation portion (35) through the opening (213). Then, a metal plating film (23) is applied to the wall of the blind via hole (3), and an upper surface pattern (21) and a lower surface pattern (22) are formed through etching.Type: GrantFiled: February 13, 2001Date of Patent: April 6, 2004Assignee: Ibiden Co., Ltd.Inventors: Kiyotaka Tsukada, Masaru Takada, Kenji Chihara
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Publication number: 20040025333Abstract: An opening is formed in resin 20 by a laser beam so that a via hole is formed. At this time, copper foil 22, the thickness of which is reduced (to 3 &mgr;m) by performing etching to lower the thermal conductivity is used as a conformal mask. Therefore, an opening 20a can be formed in the resin 20 if the number of irradiation of pulse-shape laser beam is reduced. Therefore, occurrence of undercut of the resin 20 which forms an interlayer insulating resin layer can be prevented. Thus, the reliability of the connection of the via holes can be improved.Type: ApplicationFiled: February 3, 2003Publication date: February 12, 2004Applicant: IBIDEN Co., Ltd.Inventors: Naohiro Hirose, Kouta Noda, Hiroshi Segawa, Honjin En, Kiyotaka Tsukada, Naoto Ishida, Kouji Asano, Atsushi Shouda
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Publication number: 20030203170Abstract: A solder resist comprising a thermosetting resin is printed on a surface of an insulating board (7) having a conductor circuit (6). The solder resist is then heat-cured to form an insulating film (1) having a low thermal expansion coefficient. A laser beam (2) is then applied to the portion of the insulating film in which an opening is to be formed, to burn off the same portion for forming an opening (10), whereby the conductor circuit (6) is exposed. This opening may be formed as a hole for conduction by forming a metal plating film on an inner surface thereof. It is preferable that an external connecting pad be formed so as to cover the opening. The film of coating of a metal is formed by using an electric plating lead, which is preferably cut off by a laser beam after the electric plating has finished.Type: ApplicationFiled: April 7, 2003Publication date: October 30, 2003Inventors: Masaru Takada, Hiroyuki Kobayashi, Kenji Chihara, Hisashi Minoura, Kiyotaka Tsukada, Mitsuhiro Kondo
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Publication number: 20030150644Abstract: In production of a printed wiring board comprising innerlayer conductor circuits 161, 131 arranged among insulating layers 101˜103 and blind via-holes 141, 142 formed from an outermost surface of the insulating layer toward the innerlayer conductor circuit, an opening hole 160 is previously formed in a central portion of the innerlayer conductor circuit 161 located at the bottom of the blind via-hole 141, and laser beams are irradiated from the outermost surface of the insulating layer to form the blind via-holes 141, 142. Thereafter, a metal plated film is formed on surfaces of the innerlayer conductor circuits 131, 161 and the blind via-holes 141, 142.Type: ApplicationFiled: February 19, 2003Publication date: August 14, 2003Applicant: Ibiden Co., Ltd.Inventors: Masaru Takada, Kiyotaka Tsukada, Hiroyuki Kobayashi, Hisashi Minoura, Yoshikazu Ukai, Mitsuhiro Kondo
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Patent number: 6591495Abstract: An opening is formed in resin by a laser beam so that a via hole is formed. Copper foil, the thickness of which is reduced to 3 &mgr;m by etching to lower the thermal conductivity, is used as a conformal mask. Therefore, an opening is formed in the resin and the number of irradiation of pulse-shape laser beam is reduced. Thus, occurence of undercut of the resin, which forms an interlayer insulating resin layer, can be prevented and the reliability of the connection of the via holes can be improved.Type: GrantFiled: March 5, 2001Date of Patent: July 15, 2003Assignee: IBIDEN Co., Ltd.Inventors: Naohiro Hirose, Kouta Noda, Hiroshi Segawa, Honjin En, Kiyotaka Tsukada, Naoto Ishida, Kouji Asano, Atsushi Shouda
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Patent number: 6590165Abstract: In the production of a printed wiring board comprising innerlayer conductor circuits 161, 131 arranged among insulating layers 101˜103 and blind via-holes 141, 142 formed from an outermost surface of the insulating layer toward the innerlayer conductor circuit, an opening hole 160 is previously formed in a central portion of the innerlayer conductor circuit 161 located at the bottom of the blind via-hole 141, and laser beams are irradiated from the outermost surface of the insulating layer to form the blind via-holes 141, 142. Thereafter, a metal plated film is formed on surfaces of the innerlayer conductor circuits 13, 161 and the blind via-holes 141, 142.Type: GrantFiled: July 19, 1999Date of Patent: July 8, 2003Assignee: Ibiden Co., Ltd.Inventors: Masaru Takada, Kiyotaka Tsukada, Hiroyuki Kobayashi, Hisashi Minoura, Yoshikazu Ukai, Mitsuhiro Kondo