Abstract: A memory chip having a memory with a plurality of non-redundant memory lines and a plurality of redundant memory lines, and a controller configured to allocate dynamically a redundant memory line to a failed memory line during runtime.

Abstract: A method and system for accessing a single port multi-way cache includes an address multiplexer that simultaneously addresses a set of data and a set of program instructions in the multi-way cache. Duplicate output way multiplexers respectively select data and program instructions read from the cache responsive to the address multiplexer.

Abstract: A method and system for accessing a single port multi-way cache with way dedication includes address multiplexers that simultaneously addresses a set of data and a set of program instructions in the multi-way cache. Duplicate output way multiplexers respectively select data and program instructions read from the cache responsive to the address multiplexer.

Abstract: A memory chip having a memory with a plurality of non-redundant memory lines and a plurality of redundant memory lines, and a controller configured to allocate dynamically a redundant memory line to a failed memory line during runtime.

Abstract: A noise barrier system composed of a base and a transparent superstructure. A support holds at least two adjacent transparent noise barrier elements and includes a point-fastening of the transparent noise barrier element. A position of upper holding points of the transparent superstructure is arranged at a height of from 70 to 90% of a total height of the transparent noise barrier element and at a distance of from 3 to 50 times a thickness of the transparent noise barrier element from a vertical edge. An upper side of the transparent noise barrier element has a flexure, an angle of the flexure being from 30° to 90° from vertical, and a width of an angled region being from 5 cm to 50 cm, and an entire length of a lower side of the sheet is secured within a groove-shaped depression.

Abstract: A method and system for accessing a single port multi-way cache includes an address multiplexer that simultaneously addresses a set of data and a set of program instructions in the multi-way cache. Duplicate output way multiplexers respectively select data and program instructions read from the cache responsive to the address multiplexer.

Abstract: The invention relates to an opaque, white film with a thickness of from 10 to 500 ?m whose principal constituent is a crystallizable thermoplastic. The film comprises at least barium sulfate and at least one optical brightener. The barium sulfate and/or the optical brightener are incorporated directly into the crystallizable thermoplastic or are fed as a masterbatch during film production. At least one surface of the film bears a functional coating with a thickness of from 5 to 100 nm, in order to confer on the film surface an additional function such as sealability, printability, metallizability, sterilizability, antistatic properties, aroma barrier properties or improved adhesion to materials which would not adhere to the film surface without the coating, for example photographic emulsions.

Abstract: A noise barrier system composed of a base and a transparent superstructure. A support holds at least two adjacent transparent noise barrier elements and includes a point-fastening of the transparent noise barrier element. A position of upper holding points of the transparent superstructure is arranged at a height of from 70 to 90% of a total height of the transparent noise barrier element and at a distance of from 3 to 50 times a thickness of the transparent noise barrier element from a vertical edge. An upper side of the transparent noise barrier element has a flexure, an angle of the flexure being from 30° to 90° from vertical, and a width of an angled region being from 5 cm to 50 cm, and an entire length of a lower side of the sheet is secured within a groove-shaped depression.

Abstract: The present invention relates to an opaque, white UV-stabilized low-flammability film with a thickness of from 10 to 500 ?m whose principal constituent is a crystallizable thermoplastic. It also comprises at least barium sulfate as pigment, at least one flame retardant, at least one UV stabilizer as light stabilizer and at least one optical brightener. The barium sulfate and/or the optical brightener and/or the flame retardant and/or the UV stabilizer here is either incorporated directly into the thermoplastic when the polymer is prepared or fed to the thermoplastic as a masterbatch during film production.

Abstract: A white film whose thickness is in the range from 1 to 500 ?m and which comprises, as principal constituent, a crystallizable thermoplastic, wherein the film comprises at least one UV stabilizer as light stabilizer and at least one white pigment, the use of the film, and also a process for its production.

Abstract: The invention relates to an opaque, white film with a thickness of from 10 to 500 ?m whose principal constituent is a crystallizable thermoplastic. The film comprises barium sulfate and an optional optical brightener. Optionally, at least one surface of the film bears a functional coating with a thickness of from 5 to 100 nm, in order to confer on the film surface an additional function such as sealability, printability, metallizability, sterilizability, antistatic properties, aroma barrier properties or improved adhesion to materials which would not adhere to the film surface without the coating, for example photographic emulsions.

Abstract: A configurable processor architecture uses a common simulation database for multiple processor configurations to reduce the cost of producing customized processor configurations. An unchanging core portion is used in each processor configuration. To support different memory modules, identification signals are provided from the memory modules or an identification module to configure the core portion.

Abstract: The present invention relates to an opaque, white film with a thickness of from 10 to 500 ?m whose principal constituent is a crystallizable thermoplastic. It also comprises at least barium sulfate and at least one optical brightener. The barium sulfate and/or the optical brightener here is either incorporated directly into the thermoplastic during preparation of the polymer or fed as a masterbatch during film production. The novel film is particularly suitable for interior decoration, for constructing exhibition stands, for exhibition requisites, for displays, for placards, for labels, for protective glazing of machines or of vehicles, in the lighting sector, in the fitting out of shops or of stores, as a promotional requisite or a laminating material, or in applications associated with food or drink.

Abstract: A microprocessor system includes an address generator, an address selector, and memory system having multiple memory towers, which can be independently addressed. The address generator simultaneously generates a first memory address and a second memory address that is 1 row greater than the first memory address. The address selector determines whether the row portion of the first memory address or the second memory address is used for each memory tower. Because each tower can be addressed independently, a single memory access can be used to access data spanning multiple rows of the memory system.

Abstract: A microprocessor system includes a multi-bank memory having a first memory bank and a second memory bank, a muxing circuit, a CPU and a DMA controller. The muxing circuit allows the CPU to access one of the memory bank while allowing the DMA controller access to the other memory bank at the same time. Thus, the microprocessor system needs to process multiple data sets, the CPU can be processing a first data set in the first memory bank while the DMA controller is writing a second data set in the second memory bank. When the CPU is finished processing the first data set and the DMA controller is finished writing the second data set, the muxing circuit is reconfigured so that the CPU can process the second data set in the second memory bank and the DMA controller can write a third data set in the first memory bank.

Abstract: An embedded processor architecture includes a processing core with configurable memory system. Memory components can be inserted, omitted and resized in different configuration of the memory system without causing irregular features that may cause wasted silicon area. Furthermore, all the various configurations of the memory system are designed to interface with the processing core so that the processing core can be reused without change.

Abstract: A cache unit multiple memory towers, which can be independently addressed. Cache lines are divided among multiple towers. Furthermore, physical lines of the memory towers are shared by multiple cache lines. Because each tower can be addressed independently and the cache lines are split among the towers, unaligned cache access can be performed. Furthermore, power can be conserved because not all the memory towers of the cache unit needs to be activated during some memory access operations.

Abstract: A simulation/debugging method for SOC designs that utilizes initial memory values loaded into a simulation model. A test program is then executed, and incremetal transaction records are generated for each incremental memory access (e.g., data write operations). Each transaction record includes a timestamp, address and data values. The transaction record information is stored/captured on a high level-based (i.e., system address-based) domain that takes into account all the tiling, interleaving, scrambling, and unaligned accessing used in the simulated SOC design, rather than on a low level-based (i.e., physical memory address-based) domain. Upon completing the simulation, the instantaneous memory contents at any selected point in time during the simulated execution are calculated by combining the initial data and intermediate transaction record information. Automatic memory dump and sanity check tests verify the integrity of the final data value and incremental transactions.

Abstract: The invention relates to a white, biaxially oriented film made from a crystallizable thermoplastic with high whiteness, the thickness of the film being in the range from 10 to 500 ?m. The film comprises at least one rutile-type titanium dioxide as pigment and an optical brightener, with or without other additives, and has at least one additional functionality. The expression “additional functionality” includes UV resistance, yellowing resistance, photooxidative stability, flame retardancy, and sealability. This film may have one or more of the functional properties. All of these films are capable of cost-effective thermoforming, have good orientability, and have very good optical and mechanical properties. The invention further relates to a process for its production.

Abstract: The invention relates to a white film with a thickness in the range of 1 to 500 ?m that contains a crystallizable thermoplast as the main component. The inventive film is further characterized in that it contains at least one UV stabilizer as the light stabilizer and at least one white pigment. The invention further relates to a method for producing said film and the use thereof.