Abstract: A memory system includes a controller and a memory part including a memory cell array including memory cells, word lines, bit lines including bit line pairs each composed of an even bit line and an odd bit line adjacent to each other, and sense amplifiers provided to the bit line pairs and configured to detect data in selected memory cells connected to a selected word line. When reading data is performed from first memory cells to which writing data is performed first in memory cell pairs each including two adjacent memory cells respectively connected to one of the even bit lines and one of the odd bit lines, the controller controls the memory part so as to change a read level voltage applied to the selected word line depending on a data write state of second memory cells in the memory cell pairs to which writing data is performed later.

Abstract: A hand-held electronic device includes a liquid crystal display device having a first substrate, a second substrate bonded to the first substrate, with liquid crystal material held between the first substrate and the second substrate, and an upper polarizing plate affixed to the second substrate. A protective member is disposed over the upper polarizing plate, and an adhesive member is disposed between the protective member and the upper polarizing plate without an air layer between the protective member and the upper polarizing plate. The protective member is configured as a protective cover of the hand-held electronic device.

Abstract: According to one embodiment, a semiconductor memory device includes a plurality of blocks in a memory cell, each of the blocks acting as an erasure unit of data, the block including a plurality of pages, each of the pages including a plurality of memory cell transistors, each of the memory cell transistors being configured to be an erasure state or a first retention state based on a threshold voltage of the memory cell transistor, and a controller searching data in the block with respect to, writing a first flag denoting effective into a prescribed page of the block with the erasure state, and writing the first flag denoting non-effective into a prescribed page of the block with the first retention state, reading out the prescribed page of the block with the first retention state, and determining that the block is writable when the first flag denotes effective.

Abstract: A display device is provided which includes a lower substrate and an upper substrate. An inner surface of the lower substrate and an inner surface of the upper surface face each other. A polarizing plate is disposed on an outer surface of the upper substrate, wherein the polarizing plate includes at least an inside protective film, a polarizing film and an outside protective film, which are layered on the upper substrate side in this order so that the inside protective film is adjacent to the upper substrate. An expansion axis of the outside protective film forms an angle of 30° or more and 90° or less with an expansion axis of the polarizing film, and an expansion axis of the inside protective film forms an angle of 0° or more and 3° or less with an expansion axis of the polarizing film.

Abstract: An image capture apparatus includes: an image sensor having a plurality of pixels that photoelectrically convert an object image formed by an imaging optical system, each of the pixels having one microlens and a photoelectric conversion portion that has been divided into a plurality of portions; a focus detection unit configured to correct an image shift amount detected with a phase difference detection method using focus detection signal arrays of two images obtained by the photoelectric conversion portions divided into a plurality of portions; and a controller that calculates information corresponding to a movement amount of a lens of the imaging optical system based on the image shift amount detected and corrected by the focus detection unit, and controls movement of the lens of the imaging optical system.

Abstract: Sticking of a Pixel is suppressed to improve the life of a display panel. In an emission display apparatus with a display panel in which a plurality of pixels each having at least one subpixel are disposed. A first display method of emitting light with only a pixel P(i,j) serving as an emission center and a second display method of allocating luminance of the pixel P(i,j) serving as an emission center to nearby pixels surrounding the pixel are combined in a controllable manner. A high-resolution mode with a high ratio of the first display method and a long-life mode with a high ratio of the second display method are switched therebetween depending on a spatial change or time change of image input data, an emission time, a degradation rate, a temperature, an emission luminance, and a display time.

Abstract: A display apparatus includes a light emitting device emitting red light, a light emitting device emitting green light, and a light emitting device emitting blue light. The display apparatus includes a circular polarizer provided on the light extraction side of the light emitting devices. Each light emitting device includes a periodic structure for extracting light from the light extraction side of the light emitting device, the light being generated in a light emitting layer and guided in the in-plane direction of a substrate. Each period of the periodic structure of the light emitting devices is identical, and the period of the periodic structure is more than 200 nm and 380 nm or less.

Abstract: A display method of an emission display apparatus including a display panel in which a plurality of pixels each having at least one subpixel are disposed, includes a first display method of performing the display of an image input data with only a subpixel using emission luminance, and a second display method of performing the display of the image input data with a nearby subpixel group. A display according to the second display method is performed with the emission luminance distributed to the subpixels of the nearby subpixel group, wherein a display is performed using an intermediate mode in which the first display method and the second display method are combined with a variable combination ratio.

Abstract: An image sensor in which each pixel includes a first sub-pixel including a first semiconductor layer, a second sub-pixel including a second semiconductor layer having a polarity different from a polarity of the first semiconductor layer, a third semiconductor layer having a polarity equal to the polarity of the first semiconductor layer, and a microlens, and which includes a plurality of pixels in which the first semiconductor is included in the second semiconductor layer, and the second semiconductor layer is included in the third semiconductor layer, wherein a center of gravity position of a light-receiving surface defining the first semiconductor layer is different from a center of gravity position of a light-receiving surface defining both the first semiconductor layer and the second semiconductor layer.

Abstract: A display device having a pair of substrates provided so as to face each other and sandwich liquid crystal, and polarizing plates which are pasted to surfaces of the above described pair of substrates on the sides opposite to the above described liquid crystal, where the above described polarizing plates are formed of at least an inside protective film, a polarizing film and an outside protective film, which are layered on the above described substrate side in this order, an expansion axis of the above described outside protective films forms an angle of 30° or more and 90° or less with an expansion axis of the above described polarizing films, and an expansion axis of the above described inside protective films forms an angle of 0° or more and 3° or less with an expansion axis of the above described polarizing films.

Abstract: The focus detection apparatus includes an image pickup part (101-107) including first and second pixels photoelectrically converting first and second images formed by light fluxes passing through different pupil area of an image-forming optical system to produce first and second image signals, a first signal processor (121) performing a first process to smooth the first and second image signals by using mutually different filters, a second signal processor (121) performing a second process to sharpen the first and second image signals by using mutually different filters. A calculating part (121) calculates a defocus amount by using the first and second image signals subjected to the first process when a contrast value is higher than a predetermined value, and calculates the defocus amount by using the first and second image signals subjected to the second process when the contrast value is lower than the predetermined value.

Abstract: Nonvolatile semiconductor memory device according to one embodiment includes: a plurality of planes; a memory cell array provided in the plurality of planes respectively; bit lines; and a control circuit. Each memory cell array is configured as an array of NAND cell units each including a memory string. The memory string includes a plurality of nonvolatile memory cells connected in series. The bit lines are connected to a first end of the NAND cell units, respectively. The control circuit controls a write operation of charging the bit lines up to a certain voltage value, and then setting data in the nonvolatile memory cells to a certain threshold voltage distribution state. The control circuit is configured to be capable of executing an operation of charging the bit lines in a write operation by varying timings of starting charging the bit lines among the plurality of planes.

Abstract: A flash memory according to a present embodiment includes a memory cell array. The memory cell array includes a plurality of memory cells. Each of the memory cells can store n-bit data (n is an integer equal to or larger than 2). A plurality of word line are connected to gate terminals of the memory cells. A plurality of bit lines are connected to the memory cells. Sense amplifiers are configured to detect data stored in the memory cells via the bit lines. A data latch circuit of m×n bits can store n-bit data stored in each of m memory cells (m is an integer equal to or larger than 2) connected to one of the word lines. A multi-level interface can simultaneously transfer data of two or more bits between the data latch circuit and outside.

Abstract: An image sensor comprises a first imaging pixel and a second imaging pixel each of which detects an object image formed by a photographing optical system and generates a recording image. Each of the first imaging pixel and the second imaging pixel comprises a plurality of photoelectric conversion units segmented in a first direction, the plurality of photoelectric conversion units have an ability of photoelectrically converting images formed by split light beams out of a light beam from the photographing optical system and outputting focus detection signals to be used to detect a phase difference. A base-line length of photoelectric conversion units to be used to detect the phase difference included in the first imaging pixel is longer than that of photoelectric conversion units to be used to detect the phase difference included in the second imaging pixel.

Abstract: An oven wall three-dimensional profile data (701) representing concave and convex amounts on all over oven walls (14R, 14L) at a right side and left side of a coking chamber (11) is generated by using image signals obtained by a wall surface observation apparatus (200). A resistance index “k” in which a resistance received by pushed coke (15) resulting from a rising gradient existing on the oven wall (14) is indexed is asked by using the oven wall three-dimensional profile data (701). It can be verified that there is a correlation between this resistance index “k” and a pushing load. Accordingly, it is possible to quantitatively evaluate a state of the oven wall (14) affecting on the pushing load.

Abstract: A nonvolatile semiconductor memory includes a first power supply voltage pad to which a first power supply voltage required for a writing, reading or erasing operation of the memory cells is applied. The nonvolatile semiconductor memory includes a second power supply voltage pad to which a second power supply voltage that is lower than the first power supply voltage and to be supplied to the I/O circuit is applied. The nonvolatile semiconductor memory includes a first voltage down-converting circuit that converts the first power supply voltage down to a first down-converted voltage that is higher than the second power supply voltage. The nonvolatile semiconductor memory includes a second voltage down-converting circuit that converts the second power supply voltage down to a second down-converted voltage that is lower than the first down-converted voltage.

Abstract: To further improve light extraction efficiency, a light-emitting apparatus includes a cavity for resonating light emitted from a emission layer between a first reflective surface and a second reflective surface. The first reflective surface is located on a first electrode side relative to the emission layer. The second reflective surface is located on a second electrode side relative to the emission layer. A periodic structure for extracting, to outside of a light-emitting device, light which is generated from the emission layer and wave-guided in an in-plane direction of the light-emitting device between the first reflective surface and the second reflective surface is formed in the first reflective surface, or in the second reflective surface, or between the first reflective surface and the second reflective surface.

Abstract: Provided is a light-emitting apparatus in which light extraction efficiency of a light-emitting device is improved and viewing angle dependency of an emission color is reduced. The light-emitting apparatus includes a cavity structure and a periodic structure. When guided-wave light is diffracted by the periodic structure in a direction that forms an angle which is larger than 90° and smaller than 180° relative to a guided-wave direction of an optical waveguide in the cavity structure, a wavelength of the diffracted light becomes longer as the diffraction angle increases.

Abstract: An image sensor comprising a plurality of image sensing pixel groups is provided. Each of the image sensing pixel groups has a plurality of first pixels each having photoelectric conversion portions arrayed in first and second directions for first and second numbers of divisions, respectively, and a plurality of second pixels each having photoelectric conversion portions arrayed in the first and second directions for third and fourth numbers of divisions, respectively. The photoelectric conversion portions comprising the first pixel and the second pixel have a function of photoelectrically converting a plurality of images formed by divided light fluxes of a light flux from an imaging optical system and outputting a focus detection signal for phase difference detection. The first and third numbers of division are coprime natural numbers, and the second and fourth numbers of divisions are coprime natural numbers.

Abstract: The capacitance of a charge-accumulating layer of an imaging pixel is made different from that of a charge-accumulating layer of a focusing pixel, thereby reducing the difference in saturation capacitance due to the difference between the light-reception efficiencies of the imaging pixel and the focusing pixel. The ratio between the capacitance of the charge-accumulating layer of the imaging pixel and that of the charge-accumulating layer of the focusing pixel is determined in consideration of a variation in ratio between the light-reception efficiencies of the imaging pixel and the focusing pixel with a change in at least one of the exit pupil distance and the aperture value.