Abstract: A semiconductor memory device includes a semiconductor substrate; a memory cell array on the semiconductor substrate, the memory cell array comprising a plurality of memory cells capable of electrically storing data; a sense amplifier configured to detect the data stored in at least one of the memory cells; a cell source driver electrically connected to source side terminals of the memory cells and configured to supply a source potential to at least one of the source side terminals of the memory cells; a first wiring configured to electrically connect between at least one of the source side terminals of the memory cells and the cell source driver; and a second wiring formed in a same wiring layer as the first wiring, the second wiring being insulated from the first wiring and being electrically connected to the sense amplifier, wherein the first wiring and the second wiring have a plurality of through holes provided at a predetermined interval.

Abstract: A NAND nonvolatile semiconductor memory includes a plurality of series-connected memory cells each includes a charge storage layer and control gate electrode, a plurality of word lines respectively connected to control gate electrodes of the memory cells, a first selection transistor connected between one end of the memory cells and a source line, a second selection transistor connected between the other end of the memory cells and a bit line, and a driver configured to control voltages applied to the word lines. The driver applies a first voltage to a first word line connected to a selected memory cell, and applies a cutoff voltage that cuts off a channel of a memory cell to second word lines of a number not less than three arranged side by side on the source line side with respect to the first word line during a write operation.

Abstract: Provided is a display apparatus, in which: among a red light emitting device, a green light emitting device, and a blue light emitting device, one or two of the organic light emitting devices include a metal translucent layer on a side closer to a second electrode with respect to a emission layer and a second reflection surface includes a surface of the metal translucent layer on a side of the emission layer; and the rest of the organic light emitting devices include a low-refractive index layer having a lower refractive index than the second electrode on the side closer to the second electrode with respect to the emission layer and the second reflection surface includes a surface of the low-refractive index layer on the side of the emission layer.

Abstract: The present invention provides a liquid crystal display device. An optical film having negative uniaxial double refractive index ellipsoids is arranged below a semi-transmitting liquid crystal display cell and, thereafter, a ?/4 phase difference plate, a ?/2 phase difference plate and a polarizer are arranged. The orientation axis direction of the optical film having negative uniaxial double refractive index ellipsoids is substantially equal to the direction which is rotated by 90° in the clockwise direction from a resultant vector of the orientation axis direction of the upper orientation film and the orientation axis direction of the lower orientation film of the liquid crystal display cell. Further, phase lagging axis of the upper and lower ?/4 phase difference plate is set substantially equal to the orientation axis direction of the optical film having negative uniaxial double refractive index ellipsoids.

Abstract: A NAND flash memory in which data is erased in blocks, has a plurality of memory cell transistors provided in each of the blocks, the memory cell transistor having a floating gate which is formed via a first gate insulating film on a well formed on a semiconductor substrate and a control gate which is formed on the floating gate via a second gate insulating film, and being capable of rewriting data by controlling an amount of charge accumulated on the floating gate; and a row decoder having a plurality of n-type transfer MOS transistors having drains respectively connected to word lines respectively connected to the control gates of the plurality of memory cell transistors, the row decoder controlling gate voltages and source voltages of the transfer MOS transistors.

Abstract: An oven wall three-dimensional profile data (701) representing concave and convex amounts on all over oven walls (14R, 14L) at a right side and left side of a coking chamber (11) is generated by using image signals obtained by a wall surface observation apparatus (200). A resistance index “k” in which a resistance received by pushed coke (15) resulting from a rising gradient existing on the oven wall (14) is indexed is asked by using the oven wall three-dimensional profile data (701). It can be verified that there is a correlation between this resistance index “k” and a pushing load. Accordingly, it is possible to quantitatively evaluate a state of the oven wall (14) affecting on the pushing load.

Abstract: The present invention provides a method of reutilization and method of shaping of waste plastic which reduces the amount of volatile ingredients and oil cake* to extents preferable as materials for coke ovens, enables the formation of plastic granular materials able to maintain suitable shapes even after charging into a coke oven, and does not require expensive facilities for treating any produced hydrogen chloride gas, that is, a method of reutilization of waste plastic characterized by melting waste plastic at over 160° C. to 250° C. in temperature in part or whole, compression shaping it to thereby obtain a plastic granular material having an apparent density of 0.7 to 1.2 kg/liter, and mixing this plastic granular material with coal for dry distillation in a coke oven.

Abstract: A nonvolatile semiconductor memory device comprises a memory cell configured to store data and a resistor element provided around the memory cell. The memory cell includes a charge storage layer provided above a substrate, a first semiconductor layer formed on a top surface of the charge storage layer via an insulating layer, and a first low resistive layer formed on a top surface of the first semiconductor layer and having resistance lower than that of the first semiconductor layer. The resistor element includes a second semiconductor layer formed on the same layer as the first semiconductor layer, and a second low resistive layer formed on the same layer as the first low resistive layer and on a top surface of the second semiconductor layer, having resistance lower than that of the second semiconductor layer. The second semiconductor layer is formed to extend in a first direction parallel to the substrate.

Abstract: A display device having a pair of substrates provided so as to face each other and sandwich liquid crystal, and polarizing plates which are pasted to surfaces of the above described pair of substrates on the sides opposite to the above described liquid crystal, where the above described polarizing plates are formed of at least an inside protective film, a polarizing film and an outside protective film, which are layered on the above described substrate side in this order, an expansion axis of the above described outside protective films forms an angle of 30° or more and 90° or less with an expansion axis of the above described polarizing films, and an expansion axis of the above described inside protective films forms an angle of 0° or more and 3° or less with an expansion axis of the above described polarizing films.

Abstract: A display apparatus includes a substrate; a plurality of pixels arranged above the substrate, each including a plurality of sub-pixels emitting light of different colors; a circularly polarizing member disposed above the pixels, the transmittance of light of a selected color through the circularly polarizing member being higher than that of light of the other colors therethrough; and a light-absorbing member disposed only above the sub-pixels, emitting light of the non-selected colors. The light-absorbing member absorbs light of the selected color.

Abstract: A semi-transparent homogeneous-alignment LCD device including a transmission part and a reflection part, a first linear dielectric protrusion disposed between a common electrode and a liquid crystal layer so as to extend over a plurality of pixels in a short side direction of pixels and be disposed nearly in center of the transmission part, and a second linear dielectric protrusion disposed in the reflection part between the common electrode and a first substrate so as to extend over a plurality of pixels in the short side direction, wherein an alignment direction of liquid crystal molecules crosses the first and second linear dielectric protrusions at right angles and is parallel to a long side direction of pixels, and a tilt angle of the liquid crystal molecules is approximately 0°, or even if there is a pre-tilt angle, the tilt angle of the liquid crystal molecules is 2° or less.

Abstract: A display apparatus includes a substrate; a plurality of pixels arranged above the substrate, each including a plurality of sub-pixels emitting light of different colors; a circularly polarizing member disposed above the pixels, the transmittance of light of a selected color through the circularly polarizing member being higher than that of light of the other colors therethrough; and a light-absorbing member disposed only above the sub-pixels, emitting light of the non-selected colors. The light-absorbing member absorbs light of the selected color.

Abstract: A semiconductor device is created in a doped silicon layer at most one-tenth of a micrometer thick formed on and having an interface with a sapphire substrate. An oppositely doped source region is formed in the silicon layer. A gate electrode is formed above part of the silicon layer. A diffusion layer doped with the same type of impurity as the source region but at a lower concentration is formed in the silicon layer, extending into a first area beneath the gate electrode, functioning as a drain region or as a lightly-doped extension of a more heavily doped drain region. The depth of this diffusion layer is less than the thickness of the silicon layer. This comparatively shallow diffusion depth reduces current leakage by inhibiting the formation of a back channel.

Abstract: A semiconductor memory device includes a memory cell array, a voltage generating circuit, a memory circuit which stores a reference pulse number of an advance-write voltage of the memory cell array and a parameter, and a control circuit which controls, when a pulse number of the advance-write voltage is less than the reference pulse number of the advance-write voltage, the voltage generating circuit in a manner to decrease at least an initial value of a write voltage and a step-up width of the write voltage in accordance with the parameter.

Abstract: A low temperature sinterable dielectric ceramic composition is obtained by bending 2.5-20 parts by weight of a glass component per 100 parts by weight of an aggregate of dielectric particles which are composed of Ti-containing dielectric material and contain an oxide including Ti and Zn in the surface portions. A low temperature sintered dielectric ceramic is produced by sintering this low temperature sinterable dielectric ceramic composition at 880 to 1000° C. With this low temperature sinterable dielectric ceramic composition, there can be obtained a multiplayer electronic component having an internal conductor composed of Ag, Cu or an alloy containing at least one of them.

Abstract: A semiconductor memory device includes a sense amplifier which senses identical multilevel data, which is stored in a memory cell, a plurality of number of times at a time of read, and a n-channel MOS transistor which has a current path one end of which is connected to the sense amplifier and the other end of which is connected to a bit line. The device further include a control unit which applies a first voltage to a gate electrode of the n-channel MOS transistor, thereby setting the n-channel MOS transistor in an ON state, and applies a second voltage which is higher than the first voltage, to the gate electrode during a period after first sense and before second sense.

Abstract: A NAND-structured flash memory including a selection transistor having a first conducting path, one end of the first conducting path being connected to a bit line or a source line, at least one dummy gate having a second conducting path and a control gate, one end of the second conducting path being connected to the other end of the first conducting path of the selection transistor, a nonvolatile memory linked unit for storing external data, which includes a plurality of electrically erasable/writable nonvolatile memory cells having third conducting paths and control gates, the third conducting paths being connected in series, one end of the series of the third conducting paths being connected to the other end of the second conducting path of the dummy gate, a dummy gate driving circuit controlling a potential of the control gate of the dummy gate, and a memory cell driving circuit selectively driving the control gates of the plurality of nonvolatile memory cells to write, read or erase bit data for storing t

Abstract: A NAND flash memory has a control circuit. The control circuit applies a writing voltage between a control gate and a well by applying a first voltage to the well and a positive second voltage higher than the first voltage to the control gate during the writing operation, and then the control circuit applies a detrapping voltage between the control gate and the well by applying a third voltage to the control gate and a positive fourth voltage higher than the third voltage to the well before the verification reading operation.

Abstract: A localized plasmon resonance sensor for detecting a change in optical constant uses a structure including metal. In a response spectrum with respect to light incident on the structure, there are at least two resonance peaks including at least one resonance peak shifted to a longer wavelength side and at least another peak shifted to a shorter wavelength side, by the change in optical constant.

Abstract: A display device includes a display panel having opposed first and second substrates with the second substrate being arranged closer to a viewer, an upper polarizer which is arranged closer to the viewer than the second substrate, and a resin film which is arranged closer to the viewer than the upper polarizer and is in contact with the upper polarizer. An outer periphery of the upper polarizer is arranged inside an outer periphery of the second substrate, and an outer periphery of the resin film is arranged outside the outer periphery of the upper polarizer as viewed from a front surface of the display panel. A cushion material is in contact with the second substrate, and the resin film is interposed between the second substrate and the resin film.