Abstract: A solid-state image sensor which comprises a pixel group in which unit pixels each including a microlens and a plurality of photo-electric converters are arrayed two-dimensionally, wherein a shielding unit that shields part of all of a plurality of photo-electric converters corresponding to a single microlens is provided in a portion of the unit pixels.

Abstract: A display device having a pair of substrates provided so as to face each other and sandwich liquid crystal, and polarizing plates which are pasted to surfaces of the above described pair of substrates on the sides opposite to the above described liquid crystal, where the above described polarizing plates are formed of at least an inside protective film, a polarizing film and an outside protective film, which are layered on the above described substrate side in this order, an expansion axis of the above described outside protective films forms an angle of 30° or more and 90° or less with an expansion axis of the above described polarizing films, and an expansion axis of the above described inside protective films forms an angle of 0° or more and 3° or less with an expansion axis of the above described polarizing films.

Abstract: The organic light-emitting device of the present invention includes a plurality of organic light-emitting elements including an organic light-emitting element showing a first emission color and at least one organic light-emitting element showing a different emission color from the first emission color, each of the organic light-emitting elements including: a first electrode having a reflective surface; a second electrode placed on a light extraction side and including a semi-transparent layer; an organic compound layer including a light-emitting layer and formed between the first electrode and the second electrode; and a micro cavity structure for resonating light emitted from the light-emitting layer between the reflective surface and the semi-transparent layer, wherein the semi-transparent layer in the organic light-emitting element showing the first emission color is different in thickness and/or material from the semi-transparent layer in the at least one organic light-emitting element showing the differe

Abstract: A hand-held electronic device includes a liquid crystal display device having a first substrate, a second substrate bonded to the first substrate, with liquid crystal material held between the first substrate and the second substrate, and an upper polarizing plate affixed to the second substrate. A protective member is disposed over the upper polarizing plate, and an adhesive member is disposed between the protective member and the upper polarizing plate without an air layer between the protective member and the upper polarizing plate. The protective member is configured as a protective cover of the hand-held electronic device.

Abstract: To improve light extraction efficiency of a light emitting device, the light emitting device includes: a first electrode; a second electrode provided on a light extraction side; an emission layer formed between the first electrode and the second electrode; a reflection surface located on the first electrode with respect to the emission layer; and a periodic structure at a node of interference generated by light emitted from the emission layer and light emitted from the emission layer to the reflection surface side and reflected on the reflection surface. The periodic structure is for diffracting light generated in the emission layer and guided in an in-plane direction of the light emitting device in a direction to the second electrode, and for extracting the light to the outside of the light emitting device.

Abstract: A nonvolatile semiconductor memory device including a memory cell configured to store data and a resistor element provided around the memory cell. The memory cell includes a charge storage layer provided above a substrate, a first semiconductor layer formed on a top surface of the charge storage layer via an insulating layer, and a first low resistive layer formed on a top surface of the first semiconductor layer and having resistance lower than that of the first semiconductor layer. The resistor element includes a second semiconductor layer formed on the same layer as the first semiconductor layer, and a second low resistive layer formed on the same layer as the first low resistive layer and on a top surface of the second semiconductor layer, having resistance lower than that of the second semiconductor layer.

Abstract: A non-volatile semiconductor storage device according to one aspect of the present invention includes a plurality of sense amplifier circuit that are configured to carry out a plurality of read cycles on a plurality of bit lines connected to those memory cells that are selected by a selected one of the word lines. During the second and subsequent read cycles, supply of a read current is ceased to those bit lines when it is determined in the preceding read cycle that a current not less than a certain determination current level flows therethrough, and the read current is supplied only to the remaining bit lines. A setup time of the bit lines in the first read cycle is set shorter than a setup time of the bit lines in the second and subsequent read cycles.

Abstract: The image pickup apparatus includes an image sensor having first and second pixels photoelectrically convert light fluxes passing through mutually different pupil areas, a correction calculating part calculating a correction parameter corresponding to a vignetting state of the light fluxes and performing a correction process using the correction parameter on first and second image signals produced from outputs from the first and second pixels, and a focus detection calculating part calculating a focus state of the image taking optical system based on a phase difference between the first and second image signals on which the correction process have been performed. The correction calculating part performs the correction process using a first correction parameter in the first focus detection area, and performs it using the first correction parameter in a second focus detection area close to the first focus detection area.

Abstract: A NAND flash memory includes a NAND string and a control circuit, wherein in a write operation, the control circuit applies a writing voltage between a control gate of a selected memory cell to be written and a semiconductor well, and after the write operation and before performing a verification read operation of verifying whether data has been written into the selected memory cell, the control circuit performs a de-trapping operation, in which a first voltage of a same potential as that of the semiconductor well or a same polarity as that of the writing voltage is applied to the control gate of the selected memory cell and in which a second voltage of a same polarity as that of the writing voltage and larger than the first voltage as an absolute value is applied to a control gate of unselected memory cells not to be written.

Abstract: A liquid crystal display includes a liquid crystal display panel having a first substrate, a second substrate disposed on an observer side with respect to the first substrate and opposed to the first substrate, a liquid crystal held between the first substrate and the second substrate, an upper polarizing plate disposed on the observer side with respect to the second substrate, and a resin film disposed on the observer side with respect to the upper polarizing plate and affixed in contact with the upper polarizing plate. The resin film is higher in surface hardness than the upper polarizing plate and has a surface hardness of at least 3H in terms of surface pencil hardness. At least one of the first and second substrates has a thickness of no greater than 0.5 mm, and a total thickness of the liquid crystal display panel is no greater than 2 mm.

Abstract: A memory system includes a controller and a memory part including a memory cell array including memory cells, word lines, bit lines including bit line pairs each composed of an even bit line and an odd bit line adjacent to each other, and sense amplifiers provided to the bit line pairs and configured to detect data in selected memory cells connected to a selected word line. When reading data is performed from first memory cells to which writing data is performed first in memory cell pairs each including two adjacent memory cells respectively connected to one of the even bit lines and one of the odd bit lines, the controller controls the memory part so as to change a read level voltage applied to the selected word line depending on a data write state of second memory cells in the memory cell pairs to which writing data is performed later.

Abstract: A liquid crystal display includes a liquid crystal display panel having a first substrate, a second substrate disposed on an observer side with respect to the first substrate and opposed to the first substrate, a liquid crystal held between the first substrate and the second substrate, an upper polarizing plate disposed on the observer side with respect to the second substrate, and a resin film disposed on the observer side with respect to the upper polarizing plate and affixed in contact with the upper polarizing plate. The resin film is higher in surface hardness than the upper polarizing plate and has a surface hardness of at least 3H in terms of surface pencil hardness. At least one of the first and second substrates has a thickness of no greater than 0.5 mm, and a total thickness of the liquid crystal display panel is no greater than 2 mm.

Abstract: According to one embodiment, a semiconductor device includes at least one semiconductor region provided in a semiconductor substrate, and a capacitor group including a plurality of capacitors provided in the semiconductor region, each capacitor including a capacitor insulating film provided on the semiconductor region, a capacitor electrode provided on the capacitor insulating film, and at least one diffusion layer provided in the semiconductor region adjacent to the capacitor electrode.

Abstract: A nonvolatile semiconductor memory device comprises a memory cell configured to store data and a resistor element provided around the memory cell. The memory cell includes a charge storage layer provided above a substrate, a first semiconductor layer formed on a top surface of the charge storage layer via an insulating layer, and a first low resistive layer formed on a top surface of the first semiconductor layer and having resistance lower than that of the first semiconductor layer. The resistor element includes a second semiconductor layer formed on the same layer as the first semiconductor layer, and a second low resistive layer formed on the same layer as the first low resistive layer and on a top surface of the second semiconductor layer, having resistance lower than that of the second semiconductor layer.

Abstract: A semiconductor memory device includes a semiconductor substrate; a memory cell array on the semiconductor substrate, the memory cell array comprising a plurality of memory cells capable of electrically storing data; a sense amplifier configured to detect the data stored in at least one of the memory cells; a cell source driver electrically connected to source side terminals of the memory cells and configured to supply a source potential to at least one of the source side terminals of the memory cells; a first wiring configured to electrically connect between at least one of the source side terminals of the memory cells and the cell source driver; and a second wiring formed in a same wiring layer as the first wiring, the second wiring being insulated from the first wiring and being electrically connected to the sense amplifier, wherein the first wiring and the second wiring have a plurality of through holes provided at a predetermined interval.

Abstract: A NAND flash memory has a control circuit. The control circuit applies a writing voltage between a control gate and a well by applying a first voltage to the well and a positive second voltage higher than the first voltage to the control gate during the writing operation, and then the control circuit applies a detrapping voltage between the control gate and the well by applying a third voltage to the control gate and a positive fourth voltage higher than the third voltage to the well before the verification reading operation.

Abstract: A semiconductor memory device includes a sense amplifier which senses identical multilevel data, which is stored in a memory cell, a plurality of number of times at a time of read, and a n-channel MOS transistor which has a current path one end of which is connected to the sense amplifier and the other end of which is connected to a bit line. The device further include a control unit which applies a first voltage to a gate electrode of the n-channel MOS transistor, thereby setting the n-channel MOS transistor in an ON state, and applies a second voltage which is higher than the first voltage, to the gate electrode during a period after first sense and before second sense.

Abstract: A liquid crystal display includes a liquid crystal display panel having a first substrate, a second substrate disposed on an observer side with respect to the first substrate and opposed to the first substrate, a liquid crystal held between the first substrate and the second substrate, an upper polarizing plate disposed on the observer side with respect to the second substrate, and a resin film disposed on the observer side with respect to the upper polarizing plate and affixed in contact with the upper polarizing plate. The resin film is higher in surface hardness than the upper polarizing plate and has a surface hardness of at least 3H in terms of surface pencil hardness. Each of the first and second substrates have a thickness of no greater than 0.5 mm, and a total thickness of the liquid crystal display panel is no greater than 2 mm.

Abstract: A semiconductor device comprising a resistance element with a high resistance and high resistance accuracy and a non-volatile semiconductor storage element is rationally realized by comprising the non-volatile semiconductor storage element comprising a first isolation formed to isolate a first semiconductor area, a first insulator, and a first electrode in a self-aligned manner, and a second electrode, and the resistance element comprising a second isolation formed to isolate a second semiconductor area, a third insulator and a conductor layer in a self-aligned manner, and third and fourth electrodes formed on each end of the conductor layer via a fourth insulator, and connected with the conductor layer. The conductor layer or the third and fourth electrodes include the same material with the first or second electrode, respectively.

Abstract: A liquid crystal display device includes: a first substrate; a second substrate which is placed nearer to a viewer than the first substrate, and which faces a viewer side of the first substrate; a liquid crystal sandwiched between the first substrate and the second substrate; an upper polarization plate which is placed nearer to the viewer than the second substrate, and which faces a viewer side of the second substrate; and a transparent resin plate which is placed nearer to the viewer than the upper polarization plate, and which is attached to a viewer side of the upper polarization plate with one of an adhesive material and a bonding material, the transparent resin plate includes a transparent oxide film on a face that faces the upper polarization plate, and the transparent resin plate is in close contact with the adhesive material or the bonding material through the transparent oxide film.