Patents by Inventor Koichi Fukuda

Koichi Fukuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070222912
    Abstract: The present invention realizes both the reduction of thickness of a liquid crystal panel and the acquisition of a sufficient strength of the liquid crystal display panel simultaneously.
    Type: Application
    Filed: March 21, 2007
    Publication date: September 27, 2007
    Inventors: Tsutomu Sato, Masayuki Yanagihara, Koichi Fukuda
  • Patent number: 7269074
    Abstract: A semiconductor storage device comprises a semiconductor layer; a plurality of memory cells formed on the semiconductor layer, data writing, erasing or reading with respect to each of the memory cells being possible based on a voltage applied to a control electrode and a voltage applied to the semiconductor layer; a first booster circuit supplying a voltage to control electrodes of selected memory cells into which data is to be written; and a second booster circuit supplying a voltage to control electrodes of inhibited memory cells into which data is not to be written, wherein when erasing data in the memory cells, a potential at the semiconductor layer is boosted in a first boosting mode in which a boosting capability of the first booster circuit is low and a boosting capability of the second booster circuit is high, and then the potential at the semiconductor layer is boosted in a second boosting mode in which the boosting capability of the second booster circuit is low and the boosting capability of the fi
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: September 11, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Fukuda
  • Publication number: 20070192528
    Abstract: A semiconductor device includes an electrical circuit formed on a substrate; a level detector outputting a first level signal which has a signal level based on power supply voltage and which determines an operation of the electrical circuit; a command decoder decoding a command that is inputted from the outside, and outputting a command signal; a control circuit to which the command signal is inputted, the control circuit outputting a state signal expressing whether the electrical circuit is in an operation state; and a first latch circuit to which the first level signal and the state signal are inputted, the first latch circuit latching the first level signal at a time based on the state signal.
    Type: Application
    Filed: April 9, 2007
    Publication date: August 16, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Koichi Fukuda
  • Patent number: 7253676
    Abstract: A semiconductor device that includes a clock generator which generates a clock signal; a booster which boosts a supply voltage by using the clock signal to output the boosted voltage; a potential detector which detects an output potential of the booster to output a frequency changing signal depending on the output potential; and a frequency changer which is interposed between the clock generator and the booster to change the frequency of the clock signal from the clock generator to the booster on the basis of the frequency changing signal.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: August 7, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Fukuda, Kenichi Imamiya
  • Publication number: 20070172652
    Abstract: A low temperature sinterable dielectric ceramic composition is obtained by bending 2.5-20 parts by weight of a glass component per 100 parts by weight of an aggregate of dielectric particles which are composed of Ti-containing dielectric material and contain an oxide including Ti and Zn in the surface portions. A low temperature sintered dielectric ceramic is produced by sintering this low temperature sinterable dielectric ceramic composition at 880 to 1000° C. With this low temperature sinterable dielectric ceramic composition, there can be obtained a multiplayer electronic component having an internal conductor composed of Ag, Cu or an alloy containing at least one of them.
    Type: Application
    Filed: March 3, 2005
    Publication date: July 26, 2007
    Inventors: Takafumi Kawano, Masataka Yamanaga, Koichi Fukuda
  • Publication number: 20070171343
    Abstract: The present invention provides a liquid crystal display device. An optical film having negative uniaxial double refractive index ellipsoids is arranged below a semi-transmitting liquid crystal display cell and, thereafter, a ?/4 phase difference plate, a ?/2 phase difference plate and a polarizer are arranged. The orientation axis direction of the optical film having negative uniaxial double refractive index ellipsoids is substantially equal to the direction which is rotated by 90° in the clockwise direction from a resultant vector of the orientation axis direction of the upper orientation film and the orientation axis direction of the lower orientation film of the liquid crystal display cell. Further, phase lagging axis of the upper and lower ?/4 phase difference plate is set substantially equal to the orientation axis direction of the optical film having negative uniaxial double refractive index ellipsoids.
    Type: Application
    Filed: March 21, 2007
    Publication date: July 26, 2007
    Inventors: Koichi Fukuda, Yoshiaki Nakamura
  • Publication number: 20070165170
    Abstract: A liquid crystal display comprises a liquid crystal display panel, the liquid crystal display panel comprising a first substrate; a second substrate disposed on an observer side with respect to the first substrate and opposed to the first substrate; a liquid crystal held between the first substrate and the second substrate; an upper polarizing plate disposed on the observer side with respect to the second substrate; and a resin film disposed on the observer side with respect to the upper polarizing plate and affixed in contact with the upper polarizing plate, the resin film being higher in surface hardness than the upper polarizing plate. Both reduction in thickness of the liquid crystal display panel and ensuring of a sufficient strength are attained.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 19, 2007
    Inventor: Koichi Fukuda
  • Patent number: 7245338
    Abstract: In a liquid crystal display device the reflection of light from a transmissive region is reduced, the contrast of images is enhanced and a display of inverted images is suppressed. The liquid crystal display device includes a first background film made of silicon nitride and a second background film made of silicon oxide over a glass substrate, and thin film transistors and light transmissive pixel portions are formed over the second background film. Each thin film transistor is constituted of a polysilicon film, a gate electrode, a drain electrode and a source electrode, while a gate insulation film, an interlayer insulation film and an organic film are formed over the pixel portion. Further, in the liquid crystal display device external light is reflected, wherein by forming the first background film thicker than the second background film, the inversion of images of a transmissive type liquid crystal panel can be suppressed.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: July 17, 2007
    Assignee: Hitachi Displays, Ltd.
    Inventors: Tetsuya Nagata, Koji Hiraga, Masao Uehara, Koichi Fukuda
  • Patent number: 7239556
    Abstract: A NAND-structured flash memory comprises a memory cell array wherein plural memory strings are arranged in matrix form, each of the memory cell strings including plural nonvolatile memory cells, the first conducting paths of the memory cells being connected in series, at least one of the memory cells having a function other than an external data storing function, plural first selection transistors having second conducting paths, and one end of the second conducting paths being connected to one end of the series of the first conducting paths, respectively, plural bit lines connected to the other end of the second conducting paths, plural second selection transistors having third conducting paths, and one end of the third conducting paths being connected to one end of the series of the first conducting paths, respectively, and a source line connected to the other end of the third conducting paths.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: July 3, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takumi Abe, Hiroshi Maejima, Koichi Fukuda, Takahiko Hara
  • Patent number: 7239193
    Abstract: This disclosure concerns a semiconductor device that includes a booster portion including first switches and first capacitors; and a voltage converter comprising boosting stages each of which includes a second capacitor whose one end is connected to a first voltage source via a second switch and whose other end is connected to a reference voltage via a third switch, the second capacitor being charged on the basis of a voltage difference between the first voltage source and the reference voltage, and comprising fourth switches each of which is provided between two of the boosting stages to control the number of the second capacitors connected in series between a second power source and the other ends of the first capacitors according to the voltages of the first and second voltage sources, the voltage converter outputting clock signals with phases opposed to each other to adjacent ones of the first capacitors.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: July 3, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Fukuda
  • Publication number: 20070138554
    Abstract: A method of manufacturing a full depletion SOI-MOS transistor including a substrate, a buried oxide layer, a thin silicon layer, an isolation layer, a gate insulation layer, a gate electrode and a polysilicon layer. The buried oxide layer is formed on a main surface of the substrate. The thin silicon layer is formed on the buried oxide layer and includes a channel region and a source/drain region. The isolation layer is formed on the buried oxide layer and surrounds the thin silicon layer. A gate insulation layer and gate electrode are formed on the channel region of the thin silicon layer. The polysilicon layer is deposited on the source/drain region of the thin silicon layer.
    Type: Application
    Filed: January 22, 2007
    Publication date: June 21, 2007
    Inventor: Koichi Fukuda
  • Publication number: 20070140018
    Abstract: A semiconductor memory device has a driver including a first resistor, and a control signal generator including a second resistor. A storage unit is employed to store adjustment data for setting a resistance of said second resistor at a designed resistance, which is specified based on the state of the control signal actually obtained when the resistance of the second resistor is set to a certain designed value. The storage unit is referred to for stored data to switch the second resistor to control the state of the control signal. In addition, the first resistor is switched to a resistance corresponding to the resistance of the second resistor.
    Type: Application
    Filed: February 20, 2007
    Publication date: June 21, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koji HOSONO, Koichi Fukuda
  • Patent number: 7232781
    Abstract: A dielectric ceramic composition which can be sintered at such a temperature of about 800 to 1000° C. as to permit incorporation of and multilayer formation with a low resistant conductor such as Ag or Cu by the simultaneous sintering with the low resistant conductor, which is sintered to form dielectric ceramics having a dielectric constant ?r of not more than 10, and a resonator having a large Q×f0 value and an absolute value in temperature coefficient ?f of resonance frequency f0 of not more than 20 ppm/° C., the value being easy to be controlled. The dielectric ceramic composition contains a glass component in an amount of 5 to 150 parts by weight based on 100 parts by weight of a main component represented by general formula: aZnAl2O4-bZn2SiO4-cTiO2-dZn2TiO4, in which the molar fractions of respective components a, b, c, and d satisfy 5.0?a?80.0 mol % 5.0?b?70.0 mol %, 5.0?c?27.5 mol %, 0?d?30.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: June 19, 2007
    Assignee: UBE Industries, Ltd.
    Inventors: Shinichi Ishitobi, Koichi Fukuda, Takafumi Kawano, Hisayoshi Iba
  • Publication number: 20070135667
    Abstract: The present invention provides a method of reutilization and method of shaping of waste plastic which reduces the amount of volatile ingredients and oil cake* to extents preferable as materials for coke ovens, enables the formation of plastic granular materials able to maintain suitable shapes even after charging into a coke oven, and does not require expensive facilities for treating any produced hydrogen chloride gas, that is, a method of reutilization of waste plastic characterized by melting waste plastic at over 160° C. to 250° C. in temperature in part or whole, compression shaping it to thereby obtain a plastic granular material having an apparent density of 0.7 to 1.2 kg/liter, and mixing this plastic granular material with coal for dry distillation in a coke oven.
    Type: Application
    Filed: October 20, 2004
    Publication date: June 14, 2007
    Inventors: Takayuki Araki, Koichi Fukuda, Kenji Kato
  • Publication number: 20070128814
    Abstract: A semiconductor device of the present invention includes a source region, a drain region, a gate having a first sidewall, a first insulating sidewall structure disposed to contact the first sidewall of the gate, and a first conductive sidewall structure that is electrically isolated from the gate through the first insulating sidewall structure and electrically coupled to a first region that is one of the source region or the drain region. According to this semiconductor device, the first conductive sidewall structure has an electric potential that is substantially the same as that of the first region. Therefore, steep band bending is not generated in a portion of the first region that is disposed in the vicinity of a gate insulation film. Because of this, the first sidewall structure makes it possible to inhibit the band-to-band tunneling current.
    Type: Application
    Filed: October 18, 2006
    Publication date: June 7, 2007
    Applicant: OKI ELECTRIC INDUSTRY CO., LTD.
    Inventor: Koichi FUKUDA
  • Publication number: 20070121029
    Abstract: It is an object of the present invention to provide a liquid crystal display device with a back-side prism type backlight in order to prevent a stain in an image displayed and attain high brightness. A liquid crystal display device comprises: a first substrate; a second substrate arranged on the viewer side compared with the first substrate; a liquid crystal held between the first substrate and the second substrate; a light guide plate arranged on the back surface of the first substrate; a polarization plate arranged between the first substrate and the light guide plate; a prism sheet arranged between the light guide plate and the polarization plate and having prisms provided on the light guide plate side; a diffusion layer arranged between the prism sheet and the polarization plate; and a light control sheet arranged between the diffusion layer and the polarization plate. The light control sheet rotates the polarization of the light emitted from the diffusion layer.
    Type: Application
    Filed: November 29, 2006
    Publication date: May 31, 2007
    Inventor: Koichi Fukuda
  • Patent number: 7224608
    Abstract: A semiconductor device includes an electrical circuit formed on a substrate; a level detector outputting a first level signal which has a signal level based on power supply voltage and which determines an operation of the electrical circuit; a command decoder decoding a command that is inputted from the outside, and outputting a command signal; a control circuit to which the command signal is inputted, the control circuit outputting a state signal expressing whether the electrical circuit is in an operation state; and a first latch circuit to which the first level signal and the state signal are inputted, the first latch circuit latching the first level signal at a time based on the state signal.
    Type: Grant
    Filed: October 11, 2005
    Date of Patent: May 29, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koichi Fukuda
  • Patent number: 7221422
    Abstract: The present invention provides a liquid crystal display device. An optical film having negative uniaxial double refractive index ellipsoids is arranged below a semi-transmitting liquid crystal display cell and, thereafter, a ?/4 phase difference plate, a ?/2 phase difference plate and a polarizer are arranged. The orientation axis direction of the optical film having negative uniaxial double refractive index ellipsoids is substantially equal to the direction which is rotated by 90° in the clockwise direction from a resultant vector of the orientation axis direction of the upper orientation film and the orientation axis direction of the lower orientation film of the liquid crystal display cell. Further, phase lagging axis of the upper and lower ?/4 phase difference plate is set substantially equal to the orientation axis direction of the optical film having negative uniaxial double refractive index ellipsoids.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: May 22, 2007
    Assignee: Hitachi Displays, Ltd.
    Inventors: Koichi Fukuda, Yoshiaki Nakamura
  • Patent number: 7199000
    Abstract: Several a transistor, which are inhibited short channel effect moderately according to each transistor's channel length, are formed on a same SOI substrate. In the present invention, forming a first transistor on SOI substrate, and forming a second transistor which has a gate electrode whose length is longer than a gate length of the first transistor in a channel direction The impurities are doped from above a surface of the SOI substrate in an oblique direction against the surface, and from source side and drain side of the first transistor and the second transistor. By this means, a pocket layer is formed under an insulator layer of a SOI substrate.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: April 3, 2007
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Koichi Fukuda
  • Publication number: 20070069641
    Abstract: There is provided a display device which quenches ambient light by using only an optical interference effect without additionally using an optical filter such as a color filter, and can provide good visibility out of doors in the daylight. The display device includes a plurality of organic EL elements each having a light extraction electrode, a reflective electrode, and a plurality of organic compound layers disposed between the electrodes, wherein the plurality of organic EL elements include at least organic EL elements which emit a red light, a green light, and a blue light, respectively; a layer comprised of a material having anomalous dispersion is disposed at a location which is on a light extraction side with respect to the reflective electrode in each of the plurality of organic EL elements; and an ambient light reflectance of the display device shows a minimal in a region of 535 nm or more and 575 nm or less.
    Type: Application
    Filed: September 22, 2006
    Publication date: March 29, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: TOSHINORI HASEGAWA, Hiroshi Matsuda, Masahiro Okuda, Masataka Yashima, Koichi Fukuda, Nobutaka Mizuno