Patents by Inventor Koichi Hashimoto

Koichi Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030216474
    Abstract: The present invention discloses methods and a kit for treating a respiratory syncytial virus infection. The method comprises providing an infection modulator, and administering a therapeutically effective amount of the infection modulator, wherein the respiratory syncytial virus infection is suppressed or precluded. The kit for suppressing a respiratory syncytial virus infection comprises an infection modulator, an applicator, and a set of instructions.
    Type: Application
    Filed: March 14, 2003
    Publication date: November 20, 2003
    Inventors: Ray Stokes Peebles, Koichi Hashimoto, Barney S. Graham
  • Patent number: 6635592
    Abstract: A tungsten sealing glass for use in a fluorescent lamp has a composition of, by mass percent, 65-76% SiO2, 10-25% B2O3, 2-6% Al2O3, 0.5-5.8% MgO+CaO+SrO+BaO+ZnO, 3-8% Li2O+Na2O+K2O, 0.01-4% Fe2O3+CeO2, 0-10% TiO2+Sb2O3+PbO, and 0-2% ZrO2, where Na2O/(Na2O+K2O)≦0.6.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: October 21, 2003
    Assignee: Nippon Electric Glass Co., Ltd.
    Inventors: Hiroyuki Kosokabe, Koichi Hashimoto
  • Publication number: 20030194528
    Abstract: A unidirectional three dimensional fiber structure is provided which does not require weaving, displays a high level of interlayer strength and does not suffer from cracking, and which can also be easily produced with any arbitrary cross-section. A unidirectional three dimensional fiber structure is produced by inserting a plurality of long fibers which have been aligned unidirectionally into an inlet at one end of a cylindrical die with a plurality of needle holes in the peripheral walls thereof, and then performing needlepunch through the needle holes while drawing the plurality of long fibers out from an outlet at the opposite end of the cylindrical die.
    Type: Application
    Filed: April 4, 2003
    Publication date: October 16, 2003
    Inventors: Hideki Sakonjo, Masayasu Ishibashi, Tetsuro Hirokawa, Takeshi Tanamura, Koichi Hashimoto
  • Patent number: 6620674
    Abstract: A semiconductor memory device comprising: a first insulating film covering the upper and side surfaces of a gate electrode; a second insulating film formed on the substrate covering the first insulating film; a pair of contact holes formed through the second insulating film and reaching the impurity diffusion regions; a conductive plug embedded in one of the contact holes; a third insulating film formed on the second insulating film covering the conductive plug, and having a first aperture on the other contact hole; a bit line formed on the third insulating film and connected to the other impurity diffusion region through the first aperture and the other contact hole; a fourth insulating film covering the upper and side surfaces of the bit line; a second aperture formed through the third insulating film in alignment with the fourth insulating film covering the side surface of the bit line; a storage electrode formed to extend over the bit line, insulated from the bit line by the third and fourth insulating fi
    Type: Grant
    Filed: August 15, 2000
    Date of Patent: September 16, 2003
    Assignee: Fujitsu Limited
    Inventors: Kazuo Itabashi, Osamu Tsuboi, Yuji Yokoyama, Kenichi Inoue, Koichi Hashimoto, Wataru Futo
  • Publication number: 20030168676
    Abstract: A semiconductor memory device comprising: a first insulating film covering the upper and side surfaces of a gate electrode; a second insulating film formed on the substrate covering the first insulating film; a pair of contact holes formed through the second insulating film and reaching the impurity diffusion regions; a conductive plug embedded in one of the contact holes; a third insulating film formed on the second insulating film covering the conductive plug, and having a first aperture on the other contact hole; a bit line formed on the third insulating film and connected to the other impurity diffusion region through the first aperture and the other contact hole; a fourth insulating film covering the upper and side surfaces of the bit line; a second aperture formed through the third insulating film in alignment with the fourth insulating film covering the side surface of the bit line; a storage electrode formed to extend over the bit line, insulated from the bit line by the third and fourth insulating fi
    Type: Application
    Filed: March 17, 2003
    Publication date: September 11, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Kazuo Itabashi, Osamu Tsuboi, Yuji Yokoyama, Kenichi Inoue, Koichi Hashimoto, Wataru Futo
  • Publication number: 20030160271
    Abstract: A semiconductor memory device comprising: a first insulating film covering the upper and side surfaces of a gate electrode; a second insulating film formed on the substrate covering the first insulating film; a pair of contact holes formed through the second insulating film and reaching the impurity diffusion regions; a conductive plug embedded in one of the contact holes; a third insulating film formed on the second insulating film covering the conductive plug, and having a first aperture on the other contact hole; a bit line formed on the third insulating film and connected to the other impurity diffusion region through the first aperture and the other contact hole; a fourth insulating film covering the upper and side surfaces of the bit line; a second aperture formed through the third insulating film in alignment with the fourth insulating film covering the side surface of the bit line; a storage electrode formed to extend over the bit line, insulated from the bit line by the third and fourth insulating fi
    Type: Application
    Filed: March 17, 2003
    Publication date: August 28, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Kazuo Itabashi, Osamu Tsuboi, Yuji Yokoyama, Kenichi Inoue, Koichi Hashimoto, Wataru Futo
  • Publication number: 20030127932
    Abstract: A portable motor powered device capable of operating on a cordless battery pack as well as a corded power pack, yet enabling to reduce the size and weight of the corded power pack to be truly compatible with the corded battery pack in size and weight. The device has a housing accommodating therein a DC motor as a power source. The cordless battery pack is detachably connected to the housing and has a battery which supplies a low DC voltage for operating the DC motor. The corded power pack is detachably connected to the housing and supplies a high DC voltage for operating the DC motor. The corded power pack includes a power cord adapted to be connected to receive an AC source voltage and a converter for converting the AC source voltage into the high DC voltage. The DC motor has a rotor provided with first and second windings which are selectively connected to receive low and high DC voltages respectively from the cordless battery pack and the corded power pack.
    Type: Application
    Filed: February 14, 2003
    Publication date: July 10, 2003
    Inventors: Yosuke Ishida, Tomio Yamada, Toru Murakita, Kazuto Toyama, Koichi Hashimoto, Hiroshi Miyazaki, Atsumasa Kubota, Masao Yamamoto
  • Publication number: 20030040106
    Abstract: A method for detecting a substance, comprising developing a developing liquid through a test region up to a reference region, and a detection device for use therein, wherein the reference region comprises a metal compound other than an alkali metal salt, and the developing liquid that reaches the reference region contains a label that can be accumulated in the reference region. The label is preferably a colored particle, and is preferably bound to an antibody or an antigen.
    Type: Application
    Filed: July 29, 2002
    Publication date: February 27, 2003
    Inventors: Koichi Hashimoto, Yoshitsugu Harada, Shigetoshi Okubo
  • Publication number: 20020191985
    Abstract: When image forming is repeated with cleanerless image forming apparatus “positive ghost” which means that the preceding image is slightly left occurs because residual toner is not recovered by developing means.
    Type: Application
    Filed: August 9, 2002
    Publication date: December 19, 2002
    Inventors: Yoshiyuki Komiya, Fumiteru Gomi, Koichi Hashimoto
  • Publication number: 20020174186
    Abstract: A user typestyle font reflecting personality of a registered user is stored in a font data memory in advance. When an electronic mail from the registered user is received, an authorizer performs authorization processing and then a typestyle of text of the electronic mail is processed by a text typestyle processor by use of the user typestyle font. The electronic mail is transmitted to a receiver of the electronic mail thereafter.
    Type: Application
    Filed: May 13, 2002
    Publication date: November 21, 2002
    Inventors: Koichi Hashimoto, Yasuhiro Yamazaki, Xuqiang Bai
  • Patent number: 6462836
    Abstract: A double-tone printer includes an image scanner which inputs an image signal representing an original. The image signal is converted into a density signal according to a density correction curve for a light color and a stencil master making signal for the light color is made by binary-coding the density signal. Further the image signal is converted into a density signal according to a density correction curve for a dark color and a stencil master making signal for the dark color is made by binary-coding the density signal components. Images of the respective stencil masters made on the basis of the stencil master making signals for the light color and the dark color are printed on a printing paper in light color ink and dark color ink so that the printed images in the respective color inks overlap each other.
    Type: Grant
    Filed: March 2, 1999
    Date of Patent: October 8, 2002
    Assignee: Riso Kagaku Corporation
    Inventors: Hisako Sato, Koichi Hashimoto
  • Patent number: 6459872
    Abstract: When image forming is repeated with cleanerless image forming apparatus, “positive ghost”, which means that a preceding image is slightly left, occurs because a residual toner is not recovered by a developer. Even if an image forming apparatus with an electrically conductive brush or auxiliary device repeats image forming or continuously forms an image with a high image ratio, resistance of the brush increases because the residual toner is deposited on the electrically conductive brush. As a result, advantages of the electrically conductive brush which erases traces of the preceding image are lost. Therefore, in accordance with this invention there are provided an image forming apparatus which does not let image traces leave, and an image forming apparatus which prevents (or reduces) the resistance of auxiliary devices and cleans auxiliary devices.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: October 1, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yoshiyuki Komiya, Fumiteru Gomi, Koichi Hashimoto
  • Publication number: 20020094625
    Abstract: A method of manufacturing a semiconductor device having an insulated gate type field effect transistor. A gate insulating film, a gate electrode layer having a predetermined area and facing the semiconductor substrate with the gate insulating film being interposed therebetween, an interlayer insulating film, and a wiring layer connected to the gate electrode layer, are formed on a semiconductor substrate in the order recited. A conductive material layer and a resist layer are formed on the wiring layer. The resist layer is patterned to form a resist mask forming a wiring pattern having an antenna ratio of about ten times or more of the predetermined area of the gate electrode layer. At least the conductive material layer is plasma-etched by using the resist mask as an etching mask, and thereafter, the resist mask is removed and the wiring layer is plasma-etched.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 18, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Koichi Hashimoto, Daisuke Matsunaga, Masaaki Aoyama
  • Patent number: 6420095
    Abstract: A method of manufacturing a semiconductor device including the steps of: forming a transparent oxide film on a light reflecting surface; forming an anti-reflective a-c film on the surface of the transparent film; and coating a photoresist film on the surface of the anti-reflective film and patterning the photoresist film, wherein the thicknesses of the anti-reflective film and the transparent film are selected so as to set a standing wave intensity Isw=I&dgr;/Iave to 0.2 or smaller, where Iave is an average value of light intensity in the photoresist film, and I&dgr; is an amplitude of a light intensity change. A fine pattern can be formed on a highly reflective substrate with a small size variation and at a high precision.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: July 16, 2002
    Assignee: Fujitsu Limited
    Inventors: Eiichi Kawamura, Teruyoshi Yao, Nobuhisa Naori, Koichi Hashimoto, Masaharu Kobayashi, Tadasi Oshima
  • Publication number: 20020082716
    Abstract: An image processing apparatus includes at least two signal processor modules interconnected each other in series. Each of the signal processor modules has an input port through which data is input, a memory which stores data, a signal processor portion which carries out processing on input data according to program and an output port through which data is output. At least one of the signal processor modules outputs, through its output port, input data unprocessed and processed data obtained by carrying out processing on the input data according to the program.
    Type: Application
    Filed: March 30, 2001
    Publication date: June 27, 2002
    Inventors: Koichi Hashimoto, Kazuhiro Kamoshida
  • Publication number: 20020078837
    Abstract: A hybrid stencil printing apparatus comprises: a stencil-making/printing unit configured to perforate a stencil sheet corresponding to a desired image, to wind the stencil sheet around an outer peripheral surface of a print drum, and to transfer a printing medium to the print drum with pressure and the printing medium is printed; an other-method image-formation unit configured to print the printing medium transferred on the same transfer passage as the stencil-making/printing unit according to a different printing method from the stencil-making/printing unit; and an image-formation unit selection-unit configured to input an original digital image, to determine a attributes of each image portion of the inputted original digital image, and to allocate each image portion selectively to the stencil-making/printing unit or the other-method image-formation unit based on the determination result.
    Type: Application
    Filed: October 24, 2001
    Publication date: June 27, 2002
    Inventor: Koichi Hashimoto
  • Patent number: 6376388
    Abstract: A method of manufacturing a semiconductor device having an insulated gate type field effect transistor. A gate insulating film, a gate electrode layer having a predetermined area and facing the semiconductor substrate with the gate insulating film being interposed therebetween, an interlayer insulating film, and a wiring layer connected to the gate electrode layer, are formed on a semiconductor substrate in the order recited. A conductive material layer and a resist layer are formed on the wiring layer. The resist layer is patterned to form a resist mask forming a wiring pattern having an antenna ratio of about ten times or more of the predetermined area of the gate electrode layer. At least the conductive material layer is plasma-etched by using the resist mask as an etching mask, and thereafter, the resist mask is removed and the wiring layer is plasma-etched.
    Type: Grant
    Filed: January 22, 1997
    Date of Patent: April 23, 2002
    Assignee: Fujitsu Limited
    Inventors: Koichi Hashimoto, Daisuke Matsunaga, Masaaki Aoyama
  • Publication number: 20020041398
    Abstract: A media delivery system, a media delivery method, a record media delivery program and a computer readable record medium are disclosed wherein respective media post units (12) read out record information recorded in transmission media (22), a relevant addressee is inputted in transmission media (22), and record information and delivery end information of transmission media (22) are transmitted through a communication network (18). In contrast, in a delivery media recording section (14), record information and relevant addressee information of transmission media (22) is received via a communication network (20), record information is recorded on received media (24) and relevant addressee information is added to received media (24) to be delivered to the relevant addressee.
    Type: Application
    Filed: October 5, 2001
    Publication date: April 11, 2002
    Inventors: Hiroyuki Ikeda, Koichi Hashimoto, Hiroshi Hanzawa
  • Publication number: 20020039116
    Abstract: A printing machine as described has a plurality of image formation units each of which serves to perform an printing operation on a printing sheet. Particularly, the printing machine is capable of reporting an error in the printing operation in order to minimize the time period during which the printing machine does not work, and of effectively supporting the printing job of the user.
    Type: Application
    Filed: September 27, 2001
    Publication date: April 4, 2002
    Inventor: Koichi Hashimoto
  • Publication number: 20020000577
    Abstract: A plurality of memory cell transistors are formed on a principal surface of a semiconductor substrate in a plurality of active regions defined by an isolation region. Each memory cell transistor uses one word line as its gate electrode and has a pair of source and drain regions defined by the gate electrode and the isolation region. One of a pair of source and drain regions is connected to one of a plurality of bit lines, and the other region is connected to one of a plurality of capacitors. Three sides of the other region are defined by the isolation region. The other region includes a first impurity doped region extending to under another word line adjacent to the one word line and a second impurity doped region partially overlapping the first impurity doped region and the gate electrode.
    Type: Application
    Filed: August 24, 2001
    Publication date: January 3, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Taiji Ema, Koichi Hashimoto