Patents by Inventor Koichi Kubo

Koichi Kubo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7917078
    Abstract: A waste collecting device includes a first box including a top surface having a first opening, a bottom surface opposed to the top surface, and side surfaces connecting the top surface and the bottom surface and having a second opening, wherein the top surface, the bottom surface, and the side surfaces define a space allowing waste to be accommodated therein; a second box including a top surface, a bottom surface opposed to the top surface, and side surfaces connecting the top surface and the bottom surface and having a third opening, the third opening being in communication with the second opening; and a sending unit disposed in the first box and configured to send the waste in a direction away from the second box.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: March 29, 2011
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Shusaku Tsusaka, Yoshiyuki Okazaki, Koichi Kubo, Takeshi Yamanaka
  • Publication number: 20110031467
    Abstract: An information recording and reproducing apparatus according to an embodiment has a memory cell including a recording layer operative to change in a reversible manner between a first state having a certain resistance value upon application of a voltage pulse and a second state having a resistance value higher than that of the first state. The recording layer includes a first compound layer represented by a composition formula of AxMyX4 (0.1?x?1.2, 2<y?2.9). The A is at least one element selected from a group of Mn (manganese), Fe (iron), Co (cobalt), Ni (nickel), and Cu (copper). The M is at least one element selected from a group of Al (aluminum), Ga (gallium), Ti (titanium), Ge (germanium), and Sn (tin). The X is O (oxygen).
    Type: Application
    Filed: August 3, 2010
    Publication date: February 10, 2011
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi KUBO, Mitsuru Sato, Chikayoshi Kamata, Noriko Bota
  • Publication number: 20100263722
    Abstract: The invention provides a solar cell of increased manufacturing productivity. An aspect of the invention provides a solar cell that comprises a semiconductor substrate having a light-receiving surface and a back surface disposed at the opposite side from the light-receiving surface; a n-type semiconductor region and a p-type semiconductor region both formed on the back surface; and a protection layer formed on the light-receiving surface, the protection layer includes a first surface formed on the semiconductor substrate side and a second surface formed on the opposite side from the first surface, and the second surface has a higher acid-resistance than the first surface.
    Type: Application
    Filed: March 23, 2010
    Publication date: October 21, 2010
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Koichi Kubo, Takahiro Mishima
  • Publication number: 20100259970
    Abstract: A resistance change memory device including a substrate, first and second wiring lines formed above the substrate to be insulated from each other, and memory cells disposed between the first and second wiring lines, wherein the memory cell includes: a variable resistance element for storing as information a resistance value; and a Schottky diode connected in series to the variable resistance element. The variable resistance element has: a recording layer formed of a composite compound containing at least one transition element and a cavity site for housing a cation ion; and electrodes formed on the opposite sides of the recording layer, one of which serves as a cation source in a write or erase mode for supplying a cation to the recording layer to be housed in the cavity site therein.
    Type: Application
    Filed: June 22, 2010
    Publication date: October 14, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Haruki TODA, Koichi Kubo
  • Publication number: 20100238702
    Abstract: A memory array includes a memory cell, the memory cell being disposed between a first line and a second line and being configured by a variable resistor and a rectifier connected in series. The variable resistor is a mixture of silicon oxide (SiO2) and a transition metal oxide, a proportion of the transition metal oxide being set to 55˜80%.
    Type: Application
    Filed: September 15, 2009
    Publication date: September 23, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takeshi YAMAGUCHI, Mariko HAYASHI, Hirofumi INOUE, Takeshi ARAKI, Koichi KUBO
  • Publication number: 20100226164
    Abstract: A nonvolatile semiconductor memory device comprises a memory cell array of electrically erasable programmable nonvolatile memory cells arranged in matrix, each memory cell using a variable resistor. A pulse generator generates plural types of write pulses for varying the resistance of the variable resistor based on write data. A selection circuit applies write pulses generated by the pulse generator to the memory cell. A sense amplifier executes verify read to the memory cell. A status decision circuit decides the verify result based on the output from the sense amplifier. A control circuit executes additional write to the memory cell based on the verify result from the status decision circuit.
    Type: Application
    Filed: October 17, 2008
    Publication date: September 9, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroyuki Nagashima, Koichi Kubo, Yasuyuki Fukuda
  • Patent number: 7778062
    Abstract: A resistance change memory device including: a semiconductor substrate; at least one cell array formed above the semiconductor substrate, each memory cell having a stack structure of a variable resistance element and an access element, the access element having such an off-state resistance value in a certain voltage range that is ten times or more as high as that in a select state; and a read/write circuit formed on the semiconductor substrate as underlying the cell array for data reading and writing, wherein the variable resistance element comprises a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d” orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: August 17, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruki Toda, Koichi Kubo
  • Publication number: 20100202187
    Abstract: A data read/write device according to an example of the present invention includes a recording layer, and means for applying a voltage to the recording layer, generating a resistance change in the recording layer, and recording data. The recording layer is composed of a composite compound having at least two types of cation elements, at least one type of the cation element is a transition element having a “d” orbit in which electrons have been incompletely filled, and the shortest distance between the adjacent cation elements is 0.32 nm or less.
    Type: Application
    Filed: April 19, 2010
    Publication date: August 12, 2010
    Inventors: Koichi Kubo, Takahiro Hirai, Shinya Aoki, Robin Carter, Chikayoshi Kamata
  • Patent number: 7767993
    Abstract: A resistance change memory device including a substrate, first and second wiring lines formed above the substrate to be insulated from each other, and memory cells disposed between the first and second wiring lines, wherein the memory cell includes: a variable resistance element for storing as information a resistance value; and a Schottky diode connected in series to the variable resistance element. The variable resistance element has: a recording layer formed of a composite compound containing at least one transition element and a cavity site for housing a cation ion; and electrodes formed on the opposite sides of the recording layer, one of which serves as a cation source in a write or erase mode for supplying a cation to the recording layer to be housed in the cavity site therein.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: August 3, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruki Toda, Koichi Kubo
  • Patent number: 7758024
    Abstract: A dissolving water making unit and a bubble generating unit are provided. The dissolving water making unit includes a gas dissolving device for dissolving gas in water. The bubble generating unit includes a bubble generating nozzle and a bubble generating cartridge. The dissolving water making unit sucks water from a water source, and sucks gas to make dissolving water from a mixed solution in which the water and the gas are mixed together. The dissolving water is obtained by dissolving the gas in the water. The bubble generating unit generates microbubbles from the dissolving water supplied from the dissolving water making unit.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: July 20, 2010
    Assignee: Shoei Butsuryu Co., Ltd.
    Inventors: Tsunejiro Takahashi, Toshitaka Okumura, Koichi Kubo
  • Patent number: 7755934
    Abstract: A resistance change memory device including: a substrate; cell arrays stacked thereabove, each including a matrix layout of memory cells; a write circuit configured to write a pair cell constituted by two neighboring memory cells; and a read circuit configured to read complementary resistance value states of the pair cell as one bit of data, wherein the memory cell includes a variable resistance element for storing as information a resistance value, which has a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d”-orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: July 13, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruki Toda, Koichi Kubo
  • Patent number: 7733684
    Abstract: A data read/write device according to an example of the present invention includes a recording layer, and means for applying a voltage to the recording layer, generating a resistance change in the recording layer, and recording data. The recording layer is composed of a composite compound having at least two types of cation elements, at least one type of the cation element is a transition element having a “d” orbit in which electrons have been incompletely filled, and the shortest distance between the adjacent cation elements is 0.32 nm or less.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: June 8, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Kubo, Takahiro Hirai, Shinya Aoki, Robin Carter, Chikayoshi Kamata
  • Patent number: 7729158
    Abstract: A resistance change memory device including: a semiconductor substrate; cell arrays stacked above the substrate, each having memory cells, bit lines and word lines; a read/write circuit formed on the semiconductor substrate; first and second vertical wirings disposed to connect the bit lines to the read/write circuit; and third vertical wirings disposed the word lines to the read/write circuit. The memory cell includes a variable resistance element for storing as information a resistance value, which has a recording layer composed of a composite compound containing at least two types of cation elements, at least one type of the cation element being a transition element having “d” orbit, in which electrons are incompletely filled, the shortest distance between adjacent cation elements being 0.32 nm or less.
    Type: Grant
    Filed: June 11, 2007
    Date of Patent: June 1, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruki Toda, Koichi Kubo
  • Patent number: 7719875
    Abstract: A resistance change memory device including: a substrate; cell arrays stacked thereabove, each including a matrix layout of memory cells; a write circuit configured to write a pair cell constituted by two neighboring memory cells; and a read circuit configured to read complementary resistance value states of the pair cell as one bit of data, wherein the memory cell includes a variable resistance element for storing as information a resistance value, and wherein the variable resistance element has a recording layer formed of a first composite compound expressed by AxMyOz (where “A” and “M” are cation elements different from each other; “O” oxygen; and 0.5?x?1.5, 0.5?y?2.5 and 1.5?z?4.5) and a second composite compound containing at least one transition element and a cavity site for housing a cation ion.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: May 18, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruki Toda, Koichi Kubo
  • Patent number: 7706167
    Abstract: A resistance change memory device including: a substrate; cell arrays stacked thereabove, each including a matrix layout of memory cells; a write circuit configured to write a pair cell constituted by two neighboring memory cells; and a read circuit configured to read complementary resistance value states of the pair cell as one bit of data, wherein the memory cell includes a variable resistance element for storing as information a resistance value. The variable resistance element has: a recording layer formed of a composite compound containing at least one transition element and a cavity site for housing a cation ion; and electrodes formed on the opposite sides of the recording layer, one of the electrodes serving as a cation source in a write or erase mode for supplying a cation to the recording layer to be housed in the cavity site therein.
    Type: Grant
    Filed: June 12, 2007
    Date of Patent: April 27, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruki Toda, Koichi Kubo
  • Patent number: 7693446
    Abstract: There is provided a cleaning apparatus capable of preventing counter-bending of a stripper blade in a more reliable manner. The cleaning apparatus removes toner from a circulation mechanism having a circulating surface that circulates in a two-dimensional manner around one pivotal shaft or two or more pivotal shafts parallel to each other in a housing, the toner attaching to the circulating surface. The cleaning apparatus includes a stripper blade, a securing section, and a counter-bending prevention member. The counter-bending prevention member is formed separately from the securing section and disposed on a downstream side of the stripper blade in the circulation direction of the circulating surface. The counter-bending prevention member prevents bending of the one end portion of the stripper blade on the downstream side in the circulation direction of the circulating surface.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: April 6, 2010
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Hiroshi Nakano, Koichi Kubo
  • Patent number: 7692951
    Abstract: A resistance change memory device including: a semiconductor substrate; at least one cell array formed above the semiconductor substrate, each memory cell having a stack structure of a variable resistance element and an access element, the access element having such an off-state resistance value in a certain voltage range that is ten times or more as high as that in a select state; and a read/write circuit formed on the semiconductor substrate as underlying the cell array, wherein the variable resistance element comprises a recording layer formed of a first composite compound expressed by AxMyOz (where “A” and “M” are cation elements different from each other; “O” oxygen; and 0.5?x?1.5, 0.5?y?2.5 and 1.5?z?4.5) and a second composite compound containing at least one transition element and a cavity site for housing a cation ion.
    Type: Grant
    Filed: June 17, 2008
    Date of Patent: April 6, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Haruki Toda, Koichi Kubo
  • Patent number: 7677202
    Abstract: A pet cleaning apparatus comprises a cleaning tub, a saturated solution generator and an air-bubble generating nozzle. The saturated solution generator is connected to the cleaning tub and configured to generate a saturated solution by saturating a pressurized fluid with air. The air-bubble generating nozzle is connected to the cleaning tub and the saturated solution generator and configured to generate a fine air-bubble in the saturated solution.
    Type: Grant
    Filed: September 14, 2005
    Date of Patent: March 16, 2010
    Assignee: Shoei Butsuryu Co., Ltd.
    Inventors: Tsunejiro Takahashi, Toshitaka Okumura, Koichi Kubo
  • Patent number: D624960
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: October 5, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryoji Inoue, Naoki Tashiro, Hiroki Nakanishi, Yasuo Kotaki, Tetsuya Ohashi, Koichi Kubo
  • Patent number: D626173
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: October 26, 2010
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ryoji Inoue, Naoki Tashiro, Hiroki Nakanishi, Yasuo Kotaki, Tetsuya Ohashi, Koichi Kubo