Patents by Inventor Koichi Morozumi

Koichi Morozumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230205068
    Abstract: A light-emitting device that includes a substrate, and at least one column portion, wherein the column portion includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type different from the first conductivity type, and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer, the first semiconductor layer is provided between the substrate and the light-emitting layer, the light-emitting layer includes a first well layer, and a barrier layer, the barrier layer includes a first layer provided between the first semiconductor layer and the first well layer, and the first layer has a cubic crystal structure.
    Type: Application
    Filed: December 22, 2022
    Publication date: June 29, 2023
    Applicants: SOPHIA SCHOOL CORPORATION, SEIKO EPSON CORPORATION
    Inventors: Koichiro AKASAKA, Koichi MOROZUMI, Shunsuke ISHIZAWA, Katsumi KISHINO
  • Patent number: 11535034
    Abstract: A piezoelectric element including a piezoelectric layer having a perovskite structure including lead, zirconium, and titanium, and an electrode provided on the piezoelectric layer is provided. In the piezoelectric layer, in a range of 50 nm or smaller from an interface between the piezoelectric layer and the electrode in a thickness direction, a ratio c/a of a lattice spacing a in a direction perpendicular to the thickness direction and a lattice spacing c in the thickness direction satisfies 0.986?c/a?1.014.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: December 27, 2022
    Inventors: Koichi Morozumi, Hiromu Miyazawa, Hiroshi Kato, Hiroshi Ito
  • Patent number: 11374162
    Abstract: A piezoelectric element includes a first electrode; a piezoelectric layer, placed on or above the first electrode, containing potassium, sodium, niobium, titanium, and oxygen; and a second electrode placed on or above the piezoelectric layer.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: June 28, 2022
    Inventors: Koji Sumi, Tomokazu Kobayashi, Tomohiro Sakai, Kazuya Kitada, Koichi Morozumi, Tsutomu Asakawa
  • Patent number: 11309483
    Abstract: Provided is a piezoelectric element including a first electrode provided above a substrate, a piezoelectric layer including a plurality of crystal grains containing potassium, sodium, and niobium and provided above the first electrode, and a second electrode provided above the piezoelectric layer. An atom concentration NK1 (atm %) of potassium contained in grain boundaries of the crystal grains and an atom concentration NK2 (atm %) of potassium contained in the crystal grains satisfy a relationship of 1.0<NK1/NK2?2.4.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: April 19, 2022
    Inventors: Harunobu Koike, Koichi Morozumi
  • Patent number: 10756250
    Abstract: A piezoelectric element includes a first electrode; a second electrode; and a piezoelectric layer arranged between the first electrode and the second electrode, in which the piezoelectric layer is a thin film that includes a perovskite-type composite oxide which includes potassium, sodium, and niobium and which is preferentially oriented in the (100) plane, and a crystal structure of the perovskite-type composite oxide includes a basic lattice structure having an oxygen octahedron and a super lattice structure in which the oxygen octahedron is tilted.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: August 25, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Tetsuya Isshiki, Koichi Morozumi
  • Patent number: 10686117
    Abstract: A piezoelectric element includes a first electrode disposed over a substrate, an orientation control layer disposed over the first electrode and containing titanium, a piezoelectric layer disposed over the orientation control layer and having a perovskite crystal structure, and a second electrode disposed over the piezoelectric layer. The orientation control layer has a thickness in the range of 5.0 nm to 22.0 nm.
    Type: Grant
    Filed: March 14, 2019
    Date of Patent: June 16, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Koichi Morozumi, Hiromu Miyazawa, Toshihiro Shimizu, Ichiro Asaoka
  • Patent number: 10608165
    Abstract: Provided is a piezoelectric element including a first electrode provided above a substrate, a piezoelectric layer provided above the first electrode, containing potassium, sodium, and niobium, and having a perovskite structure, and a second electrode provided above the piezoelectric layer. In a case where the piezoelectric layer is divided into two portions at a center thereof in a thickness direction, the piezoelectric layer includes a first portion on the first electrode side and a second portion on the second electrode side. The piezoelectric layer includes line defects. A density of the line defects in the second portion is higher than a density of the line defects in the first portion.
    Type: Grant
    Filed: December 18, 2018
    Date of Patent: March 31, 2020
    Assignee: Seiko Epson Corportion
    Inventors: Tomohiro Sakai, Koichi Morozumi, Kazuya Kitada, Harunobu Koike, Koji Sumi
  • Patent number: 10580958
    Abstract: A piezoelectric element includes: a first electrode containing crystal grains; a piezoelectric layer which contains potassium, sodium, and niobium and which is provided above the first electrode; and a second electrode provided above the piezoelectric layer, and the average grain diameter of the crystal grains is less than 550 nm.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: March 3, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Koji Sumi, Harunobu Koike, Toshiaki Takahashi, Koichi Morozumi
  • Patent number: 10573463
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: February 25, 2020
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Koichi Morozumi, Masato Shimada, Akira Kuriki
  • Publication number: 20190288179
    Abstract: A piezoelectric element includes a first electrode disposed over a substrate, an orientation control layer disposed over the first electrode and containing titanium, a piezoelectric layer disposed over the orientation control layer and having a perovskite crystal structure, and a second electrode disposed over the piezoelectric layer. The orientation control layer has a thickness in the range of 5.0 nm to 22.0 nm.
    Type: Application
    Filed: March 14, 2019
    Publication date: September 19, 2019
    Inventors: Koichi MOROZUMI, Hiromu MIYAZAWA, Toshihiro SHIMIZU, Ichiro ASAOKA
  • Publication number: 20190267537
    Abstract: Provided is a piezoelectric element including a first electrode provided above a substrate, a piezoelectric layer including a plurality of crystal grains containing potassium, sodium, and niobium and provided above the first electrode, and a second electrode provided above the piezoelectric layer. An atom concentration NK1 (atm %) of potassium contained in grain boundaries of the crystal grains and an atom concentration NK2 (atm %) of potassium contained in the crystal grains satisfy a relationship of 1.0<NK1/NK2?2.4.
    Type: Application
    Filed: February 26, 2019
    Publication date: August 29, 2019
    Inventors: Harunobu KOIKE, Koichi MOROZUMI
  • Publication number: 20190198750
    Abstract: Provided is a piezoelectric element including a first electrode provided above a substrate, a piezoelectric layer provided above the first electrode, containing potassium, sodium, and niobium, and having a perovskite structure, and a second electrode provided above the piezoelectric layer. In a case where the piezoelectric layer is divided into two portions at a center thereof in a thickness direction, the piezoelectric layer includes a first portion on the first electrode side and a second portion on the second electrode side. The piezoelectric layer includes line defects. A density of the line defects in the second portion is higher than a density of the line defects in the first portion.
    Type: Application
    Filed: December 18, 2018
    Publication date: June 27, 2019
    Inventors: Tomohiro SAKAI, Koichi MOROZUMI, Kazuya KITADA, Harunobu KOIKE, Koji SUMI
  • Publication number: 20190181328
    Abstract: A piezoelectric element includes: a first electrode containing crystal grains; a piezoelectric layer which contains potassium, sodium, and niobium and which is provided above the first electrode; and a second electrode provided above the piezoelectric layer, and the average grain diameter of the crystal grains is less than 550 nm.
    Type: Application
    Filed: December 12, 2018
    Publication date: June 13, 2019
    Inventors: Koji SUMI, Harunobu KOIKE, Toshiaki TAKAHASHI, Koichi MOROZUMI
  • Publication number: 20190084306
    Abstract: A piezoelectric element including a piezoelectric layer having a perovskite structure including lead, zirconium, and titanium, and an electrode provided on the piezoelectric layer is provided. In the piezoelectric layer, in a range of 50 nm or smaller from an interface between the piezoelectric layer and the electrode in a thickness direction, a ratio c/a of a lattice spacing a in a direction perpendicular to the thickness direction and a lattice spacing c in the thickness direction satisfies 0.986?c/a?1.014.
    Type: Application
    Filed: September 19, 2018
    Publication date: March 21, 2019
    Inventors: Koichi MOROZUMI, Hiromu MIYAZAWA, Hiroshi KATO, Hiroshi ITO
  • Publication number: 20190051461
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Application
    Filed: October 16, 2018
    Publication date: February 14, 2019
    Inventors: Ichiro ASAOKA, Koichi MOROZUMI, Masato SHIMADA, Akira KURIKI
  • Publication number: 20190019941
    Abstract: A piezoelectric element includes a first electrode; a piezoelectric layer, placed on or above the first electrode, containing potassium, sodium, niobium, titanium, and oxygen; and a second electrode placed on or above the piezoelectric layer.
    Type: Application
    Filed: July 10, 2018
    Publication date: January 17, 2019
    Inventors: Koji SUMI, Tomokazu KOBAYASHI, Tomohiro SAKAI, Kazuya KITADA, Koichi MOROZUMI, Tsutomu ASAKAWA
  • Patent number: 10134527
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: November 20, 2018
    Assignee: Seiko Epson Corporation
    Inventors: Ichiro Asaoka, Koichi Morozumi, Masato Shimada, Akira Kuriki
  • Publication number: 20180138392
    Abstract: A piezoelectric element includes a first electrode; a second electrode; and a piezoelectric layer arranged between the first electrode and the second electrode, in which the piezoelectric layer is a thin film that includes a perovskite-type composite oxide which includes potassium, sodium, and niobium and which is preferentially oriented in the (100) plane, and a crystal structure of the perovskite-type composite oxide includes a basic lattice structure having an oxygen octahedron and a super lattice structure in which the oxygen octahedron is tilted.
    Type: Application
    Filed: November 2, 2017
    Publication date: May 17, 2018
    Inventors: Tetsuya ISSHIKI, Koichi MOROZUMI
  • Publication number: 20180091067
    Abstract: A piezoelectric element includes: a piezoelectric body; and a first electrode which is disposed on the piezoelectric body, and in which in a plan view viewed from a direction where the first electrode and the piezoelectric body are aligned, a region which is a surface of the piezoelectric body on which the first electrode is disposed, located at a vicinity of the first electrode, and within 10 ?m from an outer edge of the first electrode has a crystal surface.
    Type: Application
    Filed: September 28, 2017
    Publication date: March 29, 2018
    Inventors: Tomokazu KOBAYASHI, Takeshi KOKUBUN, Koichi MOROZUMI
  • Publication number: 20180065364
    Abstract: An electronic device includes a capacitor that is configured with a first electrode layer, an insulating layer, and a second electrode layer being formed in the order listed herein. At least one end of the capacitor is defined by an end of the second electrode layer. The insulating layer is provided so as to extend to a non-element region that is on the outside of one end of the capacitor. The insulating layer under the non-element region is formed thinner than the insulating layer under the capacitor. A difference between the thickness of the insulating layer under the non-element region and the thickness of the insulating layer under the capacitor is equal to or less than 50 nm.
    Type: Application
    Filed: November 8, 2017
    Publication date: March 8, 2018
    Inventors: Ichiro ASAOKA, Koichi MOROZUMI, Masato SHIMADA, Akira KURIKI