Patents by Inventor Koichi Tachibana
Koichi Tachibana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20140110667Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes AlX1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).Type: ApplicationFiled: December 30, 2013Publication date: April 24, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Koichi TACHIBANA, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8704268Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer. The emitting layer is provided between the n-type layer and the p-type layer, and includes a plurality of barrier layers and a plurality of well layers, being alternately stacked. The p-side barrier layer being closest to the p-type layer among the plurality of barrier layer includes a first layer and a second layer, containing group III elements. An In composition ratio in the group III elements of the second layer is higher than an In composition ratio in the group III elements of the first layer. An average In composition ratio of the p-side layer is higher than an average In composition ratio of an n-side barrier layer that is closest to the n-type layer among the plurality of barrier layers.Type: GrantFiled: February 24, 2012Date of Patent: April 22, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Shigeya Kimura, Koichi Tachibana, Shinya Nunoue
-
Patent number: 8698192Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.Type: GrantFiled: August 4, 2011Date of Patent: April 15, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8680508Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a p-type layer, and a light emitting unit provided between the n-type layer and the p-type layer and including barrier layers and well layers. At least one of the barrier layers includes first and second portion layers. The first portion layer is disposed on a side of the n-type layer. The second portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the first portion layer. At least one of the well layers includes third and fourth portion layers. The third portion layer is disposed on a side of the n-type layer. The fourth portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the third portion layer.Type: GrantFiled: August 31, 2011Date of Patent: March 25, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Hikosaka, Koichi Tachibana, Hajime Nago, Shinya Nunoue
-
Publication number: 20140077159Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a p-type layer, and a light emitting unit provided between the n-type layer and the p-type layer and including barrier layers and well layers. At least one of the barrier layers includes first and second portion layers. The first portion layer is disposed on a side of the n-type layer. The second portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the first portion layer. At least one of the well layers includes third and fourth portion layers. The third portion layer is disposed on a side of the n-type layer. The fourth portion layer is disposed on a side of the p-type layer, and contains n-type impurity with a concentration higher than that in the third portion layer.Type: ApplicationFiled: November 27, 2013Publication date: March 20, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki HIKOSAKA, Koichi Tachibana, Hajime Nago, Shinya Nunoue
-
Patent number: 8674338Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting portion. The light emitting portion is provided between the semiconductor layers and includes barrier layers and well layers alternately stacked. An n-side end well layer which is closest to the n-type semiconductor layer contains InwnGa1-wnN and has a layer thickness twn. An n-side end barrier layer which is closest to the n-type semiconductor layer contains InbnGa1-bnN and has a layer thickness tbn. A p-side end well layer which is closest to the p-type semiconductor layer contains InwpGa1-wpN and has a layer thickness twp. A p-side end barrier layer which is closest to the p-type semiconductor contains InbpGa1-bpN and has a layer thickness tbp. A value of (wp×twp+bp×tbp)/(twp+tbp) is higher than (wn×twn+bn×tbn)/(twn+tbn) and is not higher than 5 times (wn×twn+bn×tbn)/(twn+tbn).Type: GrantFiled: August 30, 2010Date of Patent: March 18, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Toshiki Hikosaka, Shigeya Kimura, Hajime Nago, Shinya Nunoue
-
Patent number: 8658450Abstract: According to one embodiment, a crystal growth method is disclosed for growing a crystal of a nitride semiconductor on a major surface of a substrate. The major surface is provided with asperities. The method can include depositing a buffer layer on the major surface at a rate of not more than 0.1 micrometers per hour. The buffer layer includes GaxAl1-xN (0.1?x<0.5) and has a thickness of not smaller than 20 nanometers and not larger than 50 nanometers. In addition, the method can include growing the crystal including a nitride semiconductor on the buffer layer at a temperature higher than a temperature of the substrate in the depositing the buffer layer.Type: GrantFiled: September 3, 2010Date of Patent: February 25, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Koichi Tachibana, Toshiki Hikosaka, Shinya Nunoue
-
Patent number: 8648381Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes Alx1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).Type: GrantFiled: July 3, 2013Date of Patent: February 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8647905Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.Type: GrantFiled: July 25, 2013Date of Patent: February 11, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
-
Publication number: 20140034978Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. The second semiconductor layer is provided on a [0001]-direction side of the first semiconductor layer. The light emitting layer includes a first well layer, a second well layer and a first barrier layer. An In composition ratio of the barrier layer is lower than that of the first well layer and the second well layer. The barrier layer includes a first portion and a second portion. The second portion has a first region and a second region. The first region has a first In composition ratio higher than that of the first portion. The second region is provided between the first region and the first well layer. The second region has a second In composition ratio lower than the first In composition ratio.Type: ApplicationFiled: March 14, 2013Publication date: February 6, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Shigeya KIMURA, Hajime NAGO, Koichi TACHIBANA, Shinya NUNOUE
-
Patent number: 8643044Abstract: According to one embodiment, a semiconductor light emitting device includes: a stacked structure body, first and second electrodes, and a pad layer. The body includes first semiconductor layer of a first conductivity type, a light emitting layer, and a second semiconductor layer of second conductivity type. The first semiconductor layer has first and second portions. The light emitting layer is provided on the second portion. The second semiconductor layer is provided on the light emitting layer. The first electrode is provided on the first portion. The second electrode is provided on the second semiconductor layer and is transmittable to light emitted from the light emitting layer. The pad layer is connected to the second electrode. A transmittance of the pad layer is lower than that of the second electrode. A sheet resistance of the second electrode increases continuously along a direction from the pad layer toward the first electrode.Type: GrantFiled: August 31, 2011Date of Patent: February 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Shigeya Kimura, Toshiki Hikosaka, Taisuke Sato, Toshiyuki Oka, Shinya Nunoue
-
Patent number: 8623683Abstract: According to one embodiment, in a nitride semiconductor light emitting device, a first clad layer includes an n-type nitride semiconductor. An active layer is formed on the first clad layer, and includes an In-containing nitride semiconductor. A GaN layer is formed on the active layer. A first AlGaN layer is formed on the GaN layer, and has a first Al composition ratio. A p-type second AlGaN layer is formed on the first AlGaN layer, has a second Al composition ratio higher than the first Al composition ratio, and contains a larger amount of Mg than the GaN layer and the first AlGaN layer. A second clad layer is formed on the second AlGaN layer, and includes a p-type nitride semiconductor.Type: GrantFiled: January 10, 2013Date of Patent: January 7, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Koichi Tachibana, Toshiyuki Oka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8604496Abstract: According to one embodiment, an optical semiconductor device includes an n-type semiconductor layer, a p-type semiconductor layer, and a functional part. The functional part is provided between the n-type semiconductor layer and the p-type semiconductor layers. The functional part includes a plurality of active layers stacked in a direction from the n-type semiconductor layer toward the p-type semiconductor layer. At least two of the active layers include a multilayer stacked body, an n-side barrier layer, a well layer and a p-side barrier layer. The multilayer stacked body includes a plurality of thick film layers and a plurality of thin film layers alternately stacked in the direction. The n-side barrier layer is provided between the multilayer stacked body and the p-type layer. The well layer is provided between the n-side barrier layer and the p-type layer. The p-side barrier layer is provided between the well layer and the p-type layer.Type: GrantFiled: August 22, 2011Date of Patent: December 10, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tomonari Shioda, Hisashi Yoshida, Koichi Tachibana, Naoharu Sugiyama, Shinya Nunoue
-
Publication number: 20130309796Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.Type: ApplicationFiled: July 25, 2013Publication date: November 21, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
-
Publication number: 20130292644Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes AlX1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).Type: ApplicationFiled: July 3, 2013Publication date: November 7, 2013Inventors: Koichi TACHIBANA, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8564006Abstract: According to one embodiment, a nitride semiconductor device includes a substrate and a semiconductor functional layer. The substrate is a single crystal. The semiconductor functional layer is provided on a major surface of the substrate and includes a nitride semiconductor. The substrate includes a plurality of structural bodies disposed in the major surface. Each of the plurality of structural bodies is a protrusion provided on the major surface or a recess provided on the major surface. An absolute value of an angle between a nearest direction of an arrangement of the plurality of structural bodies and a nearest direction of a crystal lattice of the substrate in a plane parallel to the major surface is not less than 1 degree and not more than 10 degrees.Type: GrantFiled: February 27, 2012Date of Patent: October 22, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Hisashi Yoshida, Hiroshi Ono, Hajime Nago, Yoshiyuki Harada, Toshiki Hikosaka, Maki Sugai, Toshiyuki Oka, Shinya Nunoue
-
Patent number: 8525195Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, a light emitting portion, a multilayered structural body, and an n-side intermediate layer. The light emitting portion is provided between the semiconductor layers. The light emitting portion includes barrier layers containing GaN, and a well layer provided between the barrier layers. The well layer contains Inx1Ga1-x1N. The body is provided between the n-type semiconductor layer and the light emitting portion. The body includes: first layers containing GaN, and a second layer provided between the first layers. The second layer contains Inx2Ga1-x2N. Second In composition ratio x2 is not less than 0.6 times of first In composition ratio x1 and is lower than the first In composition x1. The intermediate layer is provided between the body and the light emitting portion and includes a third layer containing Aly1Ga1-y1N (0<y1?0.01).Type: GrantFiled: September 1, 2010Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Hajime Nago, Koichi Tachibana, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8525197Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part provided therebetween. The light emitting part includes a plurality of light emitting layers. Each of the light emitting layers includes a well layer region and a non-well layer region which is juxtaposed with the well layer region in a plane perpendicular to a first direction from the n-type semiconductor layer towards the p-type semiconductor layer. Each of the well layer regions has a common An In composition ratio. Each of the well layer regions includes a portion having a width in a direction perpendicular to the first direction of 50 nanometers or more.Type: GrantFiled: February 25, 2011Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiyuki Harada, Toshiki Hikosaka, Tomonari Shioda, Koichi Tachibana, Hajime Nago, Shinya Nunoue
-
Patent number: 8525203Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting portion, a first layer, a second layer, and an intermediate layer. The semiconductor layers include nitride semiconductor. The light emitting portion is provided between the n-type semiconductor layer and the p-type semiconductor layer and includes a quantum well layer. The first layer is provided between the light emitting portion and the p-type semiconductor layer and includes AlX1Ga1-x1N having first Al composition ratio x1. The second layer is provided between the first layer and the p-type semiconductor layer and includes Alx2Ga1-x2N having second Al composition ratio x2 higher than the first Al composition ratio x1. The intermediate layer is provided between the first layer and the light emitting portion and has a thickness not smaller than 3 nanometers and not larger than 8 nanometers and includes Inz1Ga1-z1N (0?z1<1).Type: GrantFiled: September 2, 2010Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
-
Patent number: 8466477Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.Type: GrantFiled: February 16, 2012Date of Patent: June 18, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Chie Hongo, Hajime Nago, Shinya Nunoue