Patents by Inventor Koichi Tachibana

Koichi Tachibana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8461606
    Abstract: According to one embodiment, a semiconductor light-emitting device includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light-emitting portion and a stacked body. The light-emitting portion is provided between the n-type and p-type semiconductor layers and includes a barrier layer and a well layer. The well layer is stacked with the barrier layer. The stacked body is provided between the light-emitting portion and the n-type semiconductor layer and includes a first layer and a second layer. The second layer is stacked with the first layer. Average In composition ratio of the stacked body is higher than 0.4 times average In composition ratio of the light-emitting portion. The layer thickness tb of the barrier layer is 10 nanometers or less.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shigeya Kimura, Hajime Nago, Toshiyuki Oka, Koichi Tachibana, Toshiki Hikosaka, Shinya Nunoue
  • Patent number: 8455917
    Abstract: According to one embodiment, in a nitride semiconductor light emitting device, a first clad layer includes an n-type nitride semiconductor. An active layer is formed on the first clad layer, and includes an In-containing nitride semiconductor. A GaN layer is formed on the active layer. A first AlGaN layer is formed on the GaN layer, and has a first Al composition ratio. A p-type second AlGaN layer is formed on the first AlGaN layer, has a second Al composition ratio higher than the first Al composition ratio, and contains a larger amount of Mg than the GaN layer and the first AlGaN layer. A second clad layer is formed on the second AlGaN layer, and includes a p-type nitride semiconductor.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: June 4, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Koichi Tachibana, Toshiyuki Oka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 8455911
    Abstract: According to one embodiment, a semiconductor light-emitting device using an ITON layer for a transparent conductor and realizing low drive voltage, high luminance efficiency, and uniformed light emission intensity distribution is provided. The semiconductor light-emitting device includes: a substrate; an n-type semiconductor layer formed on the substrate; an active layer formed on the n-type semiconductor layer; a p-type semiconductor layer formed on the active layer and whose uppermost part is a p-type GaN layer; an ITON (Indium Tin Oxynitride) layer formed on the p-type GaN layer; an ITO (Indium Tin Oxide) layer formed on the ITON layer; a first metal electrode formed on a part on the ITO layer; and a second metal electrode formed in contact with the n-type semiconductor layer.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: June 4, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshihide Ito, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8441023
    Abstract: According to one embodiment, in a light emitting device, a substrate is transparent to a wavelength of emitted light. A first dielectric layer is formed in a first region on the substrate, and has a refractive index smaller than a refractive index of the substrate. A second dielectric layer is formed in a second region on the substrate surrounding the first region, and has a refractive index larger than the refractive index of the substrate. A first semiconductor layer is formed on the first dielectric layer, the second dielectric layer and the substrate. A second semiconductor layer is formed on the first semiconductor layer, and includes an active layer having a PN junction.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: May 14, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Masanobu Ando, Hajime Nago, Koichi Tachibana, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 8436395
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure unit, a transparent, p-side and n-side electrodes. The unit includes n-type semiconductor layer, a light emitting portion provided on a part of the n-type semiconductor layer and p-type semiconductor layer provided on the light emitting portion. The transparent electrode is provided on the p-type semiconductor layer. The p-side electrode is provided on the transparent electrode. The n-side electrode is provided on the n-type semiconductor layer. The transparent electrode has a hole provided between the n-side and p-side electrodes. A width of the hole along an axis perpendicular to an axis from the p-side electrode toward the n-side electrode is longer than widths of the n-side and p-side electrodes. A distance between the hole and the n-side electrode is not longer than a distance between the hole and the p-side electrode.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: May 7, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takahiro Sato, Shigeya Kimura, Taisuke Sato, Toshihide Ito, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20130087761
    Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers containing a nitride semiconductor and a light emitting layer. The emitting layer includes a barrier layer containing III group elements, and a well layer stacked with the barrier layer and containing III group elements. The barrier layer is divided into a first portion on an n-type semiconductor layer side and a second portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the second portion is lower than that of the first portion. The well layer is divided into a third portion on an n-type semiconductor layer side and a fourth portion on a p-type semiconductor layer side, an In composition ratio in the III group elements of the fourth portion is higher than that of the third portion.
    Type: Application
    Filed: February 27, 2012
    Publication date: April 11, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Yoshiyuki Harada, Hajime Nago, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20130087760
    Abstract: According to one embodiment, a semiconductor light emitting device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and a light emitting layer provided between the first semiconductor layer and the second semiconductor layer and configured to emit a light having a peak wavelength of 440 nanometers or more. Tensile strain is applied to the first semiconductor layer. An edge dislocation density of the first semiconductor layer is 5×109/cm2 or less. A lattice mismatch factor between the first semiconductor layer and the light emitting layer is 0.11 percent or less.
    Type: Application
    Filed: February 27, 2012
    Publication date: April 11, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hisashi Yoshida, Koichi Tachibana, Tomonari Shioda, Toshiki Hikosaka, Jongil Hwang, Hung Hung, Naoharu Sugiyama, Shinya Nunoue
  • Publication number: 20130087805
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer. The emitting layer is provided between the n-type layer and the p-type layer, and includes a plurality of barrier layers and a plurality of well layers, being alternately stacked. The p-side barrier layer being closest to the p-type layer among the plurality of barrier layer includes a first layer and a second layer, containing group III elements. An In composition ratio in the group III elements of the second layer is higher than an In composition ratio in the group III elements of the first layer. An average In composition ratio of the p-side layer is higher than an average In composition ratio of an n-side barrier layer that is closest to the n-type layer among the plurality of barrier layers.
    Type: Application
    Filed: February 24, 2012
    Publication date: April 11, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Koichi TACHIBANA, Shinya NUNOUE
  • Patent number: 8395263
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.
    Type: Grant
    Filed: February 17, 2011
    Date of Patent: March 12, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20130001584
    Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structure unit, a transparent, p-side and n-side electrodes. The unit includes n-type semiconductor layer, a light emitting portion provided on a part of the n-type semiconductor layer and p-type semiconductor layer provided on the light emitting portion. The transparent electrode is provided on the p-type semiconductor layer. The p-side electrode is provided on the transparent electrode. The n-side electrode is provided on the n-type semiconductor layer. The transparent electrode has a hole provided between the n-side and p-side electrodes. A width of the hole along an axis perpendicular to an axis from the p-side electrode toward the n-side electrode is longer than widths of the n-side and p-side electrodes. A distance between the hole and the n-side electrode is not longer than a distance between the hole and the p-side electrode.
    Type: Application
    Filed: February 27, 2012
    Publication date: January 3, 2013
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takahiro SATO, Shigeya Kimura, Taisuke Sato, Toshihide Ito, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20120299015
    Abstract: According to one embodiment, a nitride semiconductor device includes a substrate and a semiconductor functional layer. The substrate is a single crystal. The semiconductor functional layer is provided on a major surface of the substrate and includes a nitride semiconductor. The substrate includes a plurality of structural bodies disposed in the major surface. Each of the plurality of structural bodies is a protrusion provided on the major surface or a recess provided on the major surface. An absolute value of an angle between a nearest direction of an arrangement of the plurality of structural bodies and a nearest direction of a crystal lattice of the substrate in a plane parallel to the major surface is not less than 1 degree and not more than 10 degrees.
    Type: Application
    Filed: February 27, 2012
    Publication date: November 29, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Hisashi Yoshida, Hiroshi Ono, Hajime Nago, Yoshiyuki Harada, Toshiki Hikosaka, Maki Sugai, Toshiyuki Oka, Shinya Nunoue
  • Publication number: 20120292650
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type layer, a light emitting layer, a p-type layer, and a transparent electrode. The n-type layer includes a nitride semiconductor and has a thickness not more than 500 nm. The light emitting layer is provided on the n-type layer. The p-type layer is provided on the light emitting layer and includes a nitride semiconductor. The transparent electrode contacts the n-type layer. The n-type layer is disposed between the transparent electrode and the light emitting layer.
    Type: Application
    Filed: August 29, 2011
    Publication date: November 22, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Naoharu SUGIYAMA, Tomonari Shioda, Shigeya Kimura, Koichi Tachibana, Shinya Nunoue
  • Publication number: 20120286284
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a foundation layer, a first semiconductor layer, a light emitting part, and a second semiconductor layer. The foundation layer includes a nitride semiconductor. The foundation layer has a dislocation density not more than 5×108 cm?2. The first semiconductor layer of a first conductivity type is provided on the foundation layer and includes a nitride semiconductor. The light emitting part is provided on the first semiconductor layer. The light emitting part includes: a plurality of barrier layers; and a well layer provided between the barrier layers. The well layer has a bandgap energy smaller than a bandgap energy of the barrier layers and has a thickness larger than a thickness of the barrier layers. The second semiconductor layer of a second conductivity type different from the first conductivity type, is provided on the light emitting part and includes a nitride semiconductor.
    Type: Application
    Filed: August 10, 2011
    Publication date: November 15, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi TACHIBANA, Shigeya Kimura, Hajime Nago, Shinya Nunoue
  • Publication number: 20120286237
    Abstract: According to one embodiment, a semiconductor light emitting device includes: an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part. The light emitting part is provided between the n-type semiconductor layer and the p-type semiconductor layer. The light emitting part includes: a plurality of well layers including Inx1Ga1-x1N (0<x1<1); and a barrier layer provided between the well layers and including GaN. The well layers including a p-side well layer being nearest to the p-type semiconductor layer among the well layers. The p-side well layer is thicker than all the well layers except the p-side well layer among the well layers. An In composition ratio in the p-side well layer is lower than an In composition ratio in all the well layers except the p-side well layer. A thickness of the barrier layer is not more than twice a thickness of the p-side well layer.
    Type: Application
    Filed: August 31, 2011
    Publication date: November 15, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hajime Nago, Koichi Tachibana, Shigeya Kimura, Takahiro Sato, Taisuke Sato, Toshihide Ito, Shinya Nunoue
  • Publication number: 20120217524
    Abstract: According to one embodiment, a semiconductor light emitting device includes a p-type semiconductor layer, an n-type semiconductor layer, a light emitting layer, a p-side electrode and an n-side electrode. The p-type semiconductor layer includes a nitride semiconductor and has a first major surface. The n-type semiconductor layer includes a nitride semiconductor and has a second major surface. The light emitting layer is provided between the n-type semiconductor layer and the p-type semiconductor layer. The p-side electrode contacts a part of the p-type semiconductor layer on the first major surface. The n-side electrode contacts a part of the n-type semiconductor layer on the second major surface. The n-side electrode is provided outside and around the p-side electrode in a plan view along a direction from the p-type semiconductor layer to the n-type semiconductor layer.
    Type: Application
    Filed: August 10, 2011
    Publication date: August 30, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Taisuke Sato, Shigeya Kimura, Kotaro Zaima, Koichi Tachibana, Shinya Nunoue
  • Patent number: 8242532
    Abstract: According to one embodiment, a semiconductor light-emitting device having high light extraction efficiency is provided. The semiconductor light-emitting device includes a light transmissive substrate; a nitride semiconductor layer of a first conduction type formed on or above a top face side of the light transmissive substrate; an active layer made of nitride semiconductor formed on a top face of the nitride semiconductor layer of the first conduction type; a nitride semiconductor layer of a second conduction type formed on a top face of the active layer; a dielectric layer formed on a bottom face of the light transmissive substrate and having a refractive index lower than that of the light transmissive substrate; and a metal layer formed on a bottom face of the dielectric layer. And an interface between the light transmissive substrate and the dielectric layer is a uneven face, and an interface between the dielectric layer and the metal layer is a flat face.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: August 14, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue, Kazufumi Shiozawa, Takayoshi Fujii
  • Publication number: 20120153253
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type first semiconductor layer, a p-type second semiconductor layer and a light emitting layer. The light emitting layer is provided between the first and second semiconductor layers, and includes a plurality of barrier layers including a nitride semiconductor and a well layer provided between the barrier layers and including a nitride semiconductor containing In. The barrier layers and the well layer are stacked in a first direction from the second semiconductor layer toward the first semiconductor layer. The well layer has a p-side interface part and an n-side interface part. Each of the p-side and the n-side interface part include an interface with one of the barrier layers. A variation in a concentration of In in a surface perpendicular to the first direction of the p-side interface part is not more than that of the n-side interface part.
    Type: Application
    Filed: August 26, 2011
    Publication date: June 21, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Shigeya KIMURA, Koichi Tachibana, Hajime Nago, Shinya Nunoue
  • Publication number: 20120138889
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.
    Type: Application
    Filed: August 4, 2011
    Publication date: June 7, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi TACHIBANA, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Publication number: 20120138895
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Application
    Filed: February 16, 2012
    Publication date: June 7, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Chie Hongo, Hajime Nago, Shinya Nunoue
  • Publication number: 20120138896
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Application
    Filed: February 16, 2012
    Publication date: June 7, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Koichi TACHIBANA, Chie HONGO, Hajime NAGO, Shinya NUNOUE