Patents by Inventor Koji Arai

Koji Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110022982
    Abstract: A display processing device includes a display element, a grouping mechanism configured to group such that each of a plurality of selectable items belongs to one or more groups based on information which each item has, an assigning mechanism configured to generate and assign display objects corresponding to related items to the respective groups generated by the grouping of the plurality of selectable items by the grouping mechanism, and a display processing mechanism configured to display the display objects assigned to the groups by the assigning mechanism on a display screen of the display element.
    Type: Application
    Filed: July 23, 2010
    Publication date: January 27, 2011
    Applicant: Sony Corporation
    Inventors: Ryo Takaoka, Akiko Terayama, Qihong Wang, Satoshi Akagawa, Koji Arai, Shunichi Kasahara
  • Publication number: 20100310180
    Abstract: A pattern data examination method and system capable of accurately and speedily examining a circuit pattern without failing to extract pattern contour data are provided. While pattern comparison is ordinarily made by using a secondary electron image, a contour of a pattern element is extracted by using a backscattered electron image said to be suitable for observation and examination of a three dimensional configuration of a pattern element, and pattern inspection is executed by using the extracted contour of the pattern element. More specifically, pattern inspection is executed by comparing a contour of a pattern element with design data such as CAD data to measure a difference between the contour and the data, and by computing, for example, the size of the circuit pattern element from the contour of a pattern.
    Type: Application
    Filed: August 17, 2010
    Publication date: December 9, 2010
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Yasutaka TOYODA, Yasunari Souda, Yuji Takagi, Koji Arai
  • Publication number: 20100265439
    Abstract: There is provided a color filter which can be manufactured by a simplified process and which will not short-circuit an electrode of a TFT substrate. The color filter includes a substrate, and a red layer, a green layer and a blue layer, formed on the substrate. When forming the green layer and the blue layer, these layers are not only formed on the substrate, but also laminated on the red layer to form a spacer comprised of the green layer and the blue layer, laminated on the red layer. The color filter further includes a transparent electrode layer which covers the substrate, the red layer, the green layer, the blue layer and the spacer, and an insulating black matrix layer formed on predetermined areas of the transparent electrode layer.
    Type: Application
    Filed: December 3, 2008
    Publication date: October 21, 2010
    Applicant: Dai Nippon Printing Co., Ltd
    Inventors: Tatsuro Ishitobi, Hideaki Yamagata, Koji Arai, Masatoshi Oba, Masahiro Takahashi, Masayuki Uchida
  • Patent number: 7786437
    Abstract: A pattern data examination method and system capable of accurately and speedily examining a circuit pattern without failing to extract pattern contour data are provided. While pattern comparison is ordinarily made by using a secondary electron image, a contour of a pattern element is extracted by using a backscattered electron image said to be suitable for observation and examination of a three dimensional configuration of a pattern element, and pattern inspection is executed by using the extracted contour of the pattern element. More specifically, pattern inspection is executed by comparing a contour of a pattern element with design data such as CAD data to measure a difference between the contour and the data, and by computing, for example, the size of the circuit pattern element from the contour of a pattern.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: August 31, 2010
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yasutaka Toyoda, Yasunari Souda, Yuji Takagi, Koji Arai
  • Publication number: 20100211739
    Abstract: The first storage subsystem, when new data is written in a first memory device beyond a certain timing, writes pre-updated data prior to update by said new data into a pre-updated data memory region and, in addition, updates snapshot management information that expresses a snapshot of a data group within the first memory device to information that expresses the snapshot at the certain timing and, at a later timing than the certain timing, judges, on the basis of the snapshot management information, in which of either the pre-updated data memory region or the first memory device the data constituting the data group at a certain timing exists, acquires data from the one in which the data exists and writes it into the second memory device of the second storage subsystem, and generates the certain timing repeatedly.
    Type: Application
    Filed: April 27, 2010
    Publication date: August 19, 2010
    Inventors: Koji Arai, Koji Nagata
  • Publication number: 20100178049
    Abstract: In the focal plane shutter for cameras, a shutter base plate, an shank for attaching the first blade drive component and the second blade drive component respectively so as to enable to be rotated, an shank for attaching a set component so as to enable to be rotated, and an shank for attaching the first blade and the second blade so as to enable to be rotated respectively are made of synthetic resins. Each of the shanks is fabricated after a shutter base plate was fabricated beforehand, and grooves for sump having cross section of V letter shape are formed at the same interval of angle extending toward the axial direction of the shank at the circumferential side surfaces of the shanks.
    Type: Application
    Filed: January 13, 2010
    Publication date: July 15, 2010
    Inventors: Koji Arai, Shigemi Takahashi, Nobuyoshi Inoue
  • Patent number: 7734870
    Abstract: The first storage subsystem, when new data is written in a first memory device beyond a certain timing, writes pre-updated data prior to update by said new data into a pre-updated data memory region and, in addition, updates snapshot management information that expresses a snapshot of a data group within the first memory device to information that expresses the snapshot at the certain timing and, at a later timing than the certain timing, judges, on the basis of the snapshot management information, in which of either the pre-updated data memory region or the first memory device the data constituting the data group at a certain timing exists, acquires data from the one in which the data exists and writes it into the second memory device of the second storage subsystem, and generates the certain timing repeatedly.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: June 8, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Koji Arai, Koji Nagata
  • Publication number: 20100122027
    Abstract: A storage controller of the present invention enables a larger number of storage devices to be mounted while keeping the installation size small. A plurality of sub-storage units are disposed inside a high density-type storage unit. The respective sub-storage units comprise a plurality of hard disk drives, controller, memory, power supply device, and display part. The respective sub-storage units operate independently of one another. A controller creates a management table based on management data acquired from the respective sub-storage units. The user is notified when there is an error in the table contents. A display part lights up in accordance with an indication from a storage unit specification part, notifying the user of the location of the sub-storage unit.
    Type: Application
    Filed: February 18, 2009
    Publication date: May 13, 2010
    Inventors: Kenji Onabe, Koji Arai, Tetsuya Shirogane
  • Patent number: 7708477
    Abstract: In the focal plane shutter for cameras, a shutter base plate, an shank for attaching the first blade drive component and the second blade drive component respectively so as to enable to be rotated, an shank for attaching a set component so as to enable to be rotated, and an shank for attaching the first blade and the second blade so as to enable to be rotated respectively are made of synthetic resins. Each of the shanks is fabricated after a shutter base plate was fabricated beforehand, and grooves for sump having cross section of V letter shape are formed at the same interval of angle extending toward the axial direction of the shank at the circumferential side surfaces of the shanks.
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: May 4, 2010
    Assignee: Nidec Copal Corporation
    Inventors: Koji Arai, Shigemi Takahashi, Nobuyoshi Inoue
  • Patent number: 7707456
    Abstract: Proposed is a storage apparatus capable of alleviating the burden of maintenance work when a failure occurs in a part configuring the storage apparatus. This storage apparatus includes multiple disk drives and spare disk drives, and multiple controllers. When a failure occurs, this storage apparatus determines the operability status of the storage apparatus based on failure information. When operation can be continued, the storage apparatus continues to operate without performing any maintenance such as part replacement, and if operation cannot be continued, data is migrated to another storage apparatus.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: April 27, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Tanaka, Keiichi Tezuka, Atsushi Ishikawa, Azuma Kano, Koji Arai, Yusuke Nonaka
  • Publication number: 20090039261
    Abstract: A pattern data examination method and system capable of accurately and speedily examining a circuit pattern without failing to extract pattern contour data are provided. While pattern comparison is ordinarily made by using a secondary electron image, a contour of a pattern element is extracted by using a backscattered electron image said to be suitable for observation and examination of a three dimensional configuration of a pattern element, and pattern inspection is executed by using the extracted contour of the pattern element. More specifically, pattern inspection is executed by comparing a contour of a pattern element with design data such as CAD data to measure a difference between the contour and the data, and by computing, for example, the size of the circuit pattern element from the contour of a pattern.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 12, 2009
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Yasutaka Toyoda, Yasunari Souda, Yuji Takagi, Koji Arai
  • Patent number: 7474550
    Abstract: A semiconductor memory includes a plurality of first regions arranged along a first direction, each of which corresponds to a memory array including a plurality of word lines, bit lines and memory cells. A plurality of second regions are provided each of which is arranged alternately with respect to each of the first regions, and each including sense amplifiers connected to said bit lines to form an open line type semiconductor memory. A third region is also provided that is a region not sandwiched by the second regions, wherein the third region includes a plurality of dummy bit lines.
    Type: Grant
    Filed: April 27, 2007
    Date of Patent: January 6, 2009
    Assignee: Elpida Memory, Inc.
    Inventors: Hiroki Fujisawa, Riichiro Takemura, Koji Arai
  • Publication number: 20080218188
    Abstract: In a jig for inspection for inspecting a printed substrate in which a wiring part is formed on at least one surface, the jig comprises a base part which has a surface area larger than a surface area of at least the printed substrate targeted for inspection and is arranged as opposed to one surface of the printed substrate, and plural probe pins aligned and arranged at a predetermined distance mutually, any top end of the probe pin abutting on the wiring part of the printed substrate.
    Type: Application
    Filed: March 7, 2008
    Publication date: September 11, 2008
    Applicant: Shinko Electric Industries Co., Ltd.
    Inventors: Koji ARAI, Hideyuki Wakabayashi, Atsushi Maruyama, Tomofumi Kikuchi
  • Patent number: 7418685
    Abstract: Bit lines and a pair of two tungsten wires having the same widths are formed at a portion where a through-hole is to be formed such that the bit lines and the tungsten wires are arranged at regular intervals. A through-hole for connection to another wiring layer is formed between the tungsten wires. A connection wiring made of tungsten is formed over the through-hole so as to have a predetermined margin around the through-hole. In a photolithography process, a slit having a small width enough to be insensitive to a photo-resist is formed so as to span the through-hole.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: August 26, 2008
    Assignees: Elpida Memory, Inc., Hitachi Ulsi Systems, Co., Ltd., Hitachi Ltd.
    Inventors: Yuko Watanabe, Koji Arai, Seiji Narui
  • Publication number: 20080133857
    Abstract: The first storage subsystem, when new data is written in a first memory device beyond a certain timing, writes pre-updated data prior to update by said new data into a pre-updated data memory region and, in addition, updates snapshot management information that expresses a snapshot of a data group within the first memory device to information that expresses the snapshot at the certain timing and, at a later timing than the certain timing, judges, on the basis of the snapshot management information, in which of either the pre-updated data memory region or the first memory device the data constituting the data group at a certain timing exists, acquires data from the one in which the data exists and writes it into the second memory device of the second storage subsystem, and generates the certain timing repeatedly.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 5, 2008
    Inventors: Koji Arai, Koji Nagata
  • Publication number: 20080091972
    Abstract: Proposed is a storage apparatus capable of alleviating the burden of maintenance work when a failure occurs in a part configuring the storage apparatus. This storage apparatus includes multiple disk drives and spare disk drives, and multiple controllers. When a failure occurs, this storage apparatus determines the operability status of the storage apparatus based on failure information. When operation can be continued, the storage apparatus continues to operate without performing any maintenance such as part replacement, and if operation cannot be continued, data is migrated to another storage apparatus.
    Type: Application
    Filed: February 6, 2007
    Publication date: April 17, 2008
    Inventors: Koichi Tanaka, Keiichi Tezuka, Atsushi Ishikawa, Azuma Kano, Koji Arai, Yusuke Nonaka
  • Patent number: 7360038
    Abstract: A storage control system comprises a first controller connected through a first access route to a first storage; a second controller connected through a second access route to a second storage device; a third controller connected through a third access route to the first storage device; and a fourth controller connected through a fourth access route to the second storage device. For example, if the access destination in accordance with the access instruction received from the host device is the second storage device, the first controller outputs an access request to the second controller. The second controller accesses the second storage device through the second access route in accordance with this access request.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: April 15, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Kenji Onabe, Koji Arai, Atsushi Ishikawa
  • Patent number: 7343449
    Abstract: The first storage subsystem, when new data is written in a first memory device beyond a certain timing, writes pre-updated data prior to update by said new data into a pre-updated data memory region and, in addition, updates snapshot management information that expresses a snapshot of a data group within the first memory device to information that expresses the snapshot at the certain timing and, at a later timing than the certain timing, judges, on the basis of the snapshot management information, in which of either the pre-updated data memory region or the first memory device the data constituting the data group at a certain timing exists, acquires data from the one in which the data exists and writes it into the second memory device of the second storage subsystem, and generates the certain timing repeatedly.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: March 11, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Koji Arai, Koji Nagata
  • Patent number: 7328326
    Abstract: A storage device can flexibly apply a dynamic load distribution and a performance expansion to an unexpected peak performance demand changing in a time sequence such as a web server and a contents delivery at the minimum cost. In the storage device, a load condition of a logical volume is measured by a performance measuring mechanism based on a data and command processing amounts transferred by a data transfer mechanism, and contents of the logical volume set in the physical volume are copied to a logical volume set in the auxiliary logical volume by a copy mechanism based on a measurement result of the performance measuring mechanism, and the logical volume set in the auxiliary physical volume copied by the copy mechanism and the logical volume set in the physical volume serving as a copy source are provided as one virtual logical volume in a host, thereby distributing a load from the host.
    Type: Grant
    Filed: October 26, 2004
    Date of Patent: February 5, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Ishikawa, Koji Arai
  • Patent number: 7323225
    Abstract: An EL device comprising a first electrode, an EL layer formed on the first electrode, and a second electrode formed on the EL layer, wherein at least one layer of a material whose wettability changes when light is applied thereto is formed. The invention provides EL devices that can be simply produced, and processes for producing the same.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: January 29, 2008
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Daigo Aoki, Masato Okabe, Hironori Kobayashi, Manabu Yamamoto, Tatsuya Miyoshi, Koji Arai, Hiroshi Kishimoto