Patents by Inventor Koji Arai

Koji Arai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040051918
    Abstract: In an image reading apparatus for reading an original image using a light source containing a plurality of color components, a control pulse for dimming the light source is generated by pulse-width modulation symmetrically with respect to a reference timing (for example, the central position in one storage time or the storage start timing) in one predetermined storage time of a line sensor.
    Type: Application
    Filed: September 15, 2003
    Publication date: March 18, 2004
    Inventors: Hiroshi Sato, Hiroyoshi Maruyama, Ken Tanabe, Masashi Minami, Shigeo Yamagata, Mitsuru Kurita, Koji Arai, Tsutomu Utagawa, Koichi Ishimoto
  • Publication number: 20040046498
    Abstract: An EL device comprising a first electrode, an EL layer formed on the first electrode, and a second electrode formed on the EL layer, wherein at least one layer of a material whose wettability changes when light is applied thereto is formed. The invention provides EL devices that can be simply produced, and processes for producing the same.
    Type: Application
    Filed: August 29, 2003
    Publication date: March 11, 2004
    Applicant: Dai Nippon Printing Co., Ltd.
    Inventors: Daigo Aoki, Masato Okabe, Hironori Kobayashi, Manabu Yamamoto, Tatsuya Miyoshi, Koji Arai, Hiroshi Kishimoto
  • Publication number: 20040017716
    Abstract: A semiconductor memory includes a plurality of memory arrays and a plurality of sense amplifiers arranged alternately with respect to each of the memory arrays. The sense amplifiers are coupled to bit lines of the memory arrays to form an open bit line type semiconductor memory. In conjunction with this structure, two memory arrays at end portions of the semiconductor memory device are both selected together, whereas a memory array in an inner portion of the semiconductor memory device is selected independently.
    Type: Application
    Filed: July 28, 2003
    Publication date: January 29, 2004
    Inventors: Hiroki Fujisawa, Riichiro Takemura, Koji Arai
  • Publication number: 20040012910
    Abstract: A present invention provides a multi-layer capacitor that can be highly downsized and increased in capacity. A present invention provides a method for manufacturing the multi-layer capacitor including a process of forming a dielectric in the same vacuum chamber, a process of treating a surface of the dielectric, a process of forming a pattern in a metal electrode, a process of forming the metal electrode, and a process of treating a surface of the metal electrode. In this method, etching the dielectric layer flattens a recessed part generated by an electric insulation part.
    Type: Application
    Filed: May 14, 2003
    Publication date: January 22, 2004
    Inventors: Koji Arai, Yuichiro Yamada
  • Patent number: 6661545
    Abstract: In an image reading apparatus for reading an original image using a light source containing a plurality of color components, a control pulse for dimming the light source is generated by pulse-width modulation symmetrically with respect to a reference timing (for example, the central position in one storage time or the storage start timing) in one predetermined storage time of a line sensor.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: December 9, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Sato, Hiroyoshi Maruyama, Ken Tanabe, Masashi Minami, Shigeo Yamagata, Mitsuru Kurita, Koji Arai, Tsutomu Utagawa, Koichi Ishimoto
  • Patent number: 6658541
    Abstract: A database update method for a computer system having a host computer and a storage sub-system where a database is maintained is disclosed. The storage sub-system includes first and second storage units containing duplicated data. The host computer accesses the first storage unit for data reading and the second storage unit for data writing. If incomplete processing to read is in process when an access request for data writing occurs, the host computer commands the stop of volume duplication of the first and second storage units and issues a write request. In response to this command, data is stored into only the second storage unit. Upon the completion of both read and write processing, the host computer commands the restart of volume duplication of the first and second control units to reflect the data stored into the second storage unit in the first storage unit.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: December 2, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Manabu Kitamura, Koji Arai
  • Patent number: 6650047
    Abstract: An EL device comprising a first electrode, an EL layer formed on the first electrode, and a second electrode formed on the EL layer, wherein at least one layer of a material whose wettability changes when light is applied thereto is formed. The invention provides EL devices that can be simply produced, and processes for producing the same.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: November 18, 2003
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Daigo Aoki, Masato Okabe, Hironori Kobayashi, Manabu Yamamoto, Tatsuya Miyoshi, Koji Arai, Hiroshi Kishimoto
  • Publication number: 20030203655
    Abstract: A material containing, as a main component, an organic silicon compound represented by the following general formula:
    Type: Application
    Filed: March 28, 2003
    Publication date: October 30, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Gaku Sugahara, Nobuo Aoi, Koji Arai, Kazuyuki Sawada
  • Patent number: 6639822
    Abstract: There are provided a plurality of memory mats, including a plurality of bit lines, a plurality of word lines, and a plurality of memory cells coupled to the plurality of bit lines, and the plurality of word lines are provided in a direction of the bit line. A sense amplifier array including a plurality of latch circuits is provided in areas between the memory mats arranged in the bit line direction, respectively, and a pair of input/output nodes of which are connected to a pair of bit lines separately placed in the memory mats on both sides of the area, respectively. In this case, for a general memory mat other than both end portions in the bit line direction, word lines in any one of the memory mats are activated, while, for end memory mats provided on both end portions in the bit line direction, word lines of both memory mats are activated together.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: October 28, 2003
    Assignees: Hitachi, Ltd., Hitachi, ULSI Systems Co., Ltd
    Inventors: Hiroki Fujisawa, Riichiro Takemura, Koji Arai
  • Publication number: 20030197904
    Abstract: To control a light emitted from a fluorescent lamp having phosphors with different afterglow properties for different colors, a center of a lighting control signal for controlling the lighting of the fluorescent lamp is controlled to constantly align with the center of a Hsync period so that despite the variation of the lighting time of the fluorescent lamp, a barycenter of the quantity of light from the fluorescent lamp in the Hsync period almost aligns with the center of the Hsync period to reduce the offset of the barycenter.
    Type: Application
    Filed: August 19, 1999
    Publication date: October 23, 2003
    Inventors: MITSURU KURITA, HIROSHI SATO, KOJI ARAI, KOICHI ISHIMOTO, TARO IKEDA, TAKASHI SUGIURA
  • Publication number: 20030174369
    Abstract: In an image reading apparatus for reading an original image using a light source containing a plurality of color components, a control pulse for dimming the light source is generated by pulse-width modulation symmetrically with respect to a reference timing (for example, the central position in one storage time or the storage start timing) in one predetermined storage time of a line sensor.
    Type: Application
    Filed: May 26, 1999
    Publication date: September 18, 2003
    Inventors: HIROSHI SATO, HIROYOSHI MARUYAMA, KEN TANABE, MASASHI MINAMI, SHIGEO YAMAGATA, MITSURU KURITA, KOJI ARAI, TSUTOMU UTAGAWA, KOICHI ISHIMOTO
  • Publication number: 20030127969
    Abstract: An EL device comprising a first electrode, an EL layer formed on the first electrode, and a second electrode formed on the EL layer, wherein at least one layer of a material whose wettability changes when light is applied thereto is formed. The invention provides EL devices that can be simply produced, and processes for producing the same.
    Type: Application
    Filed: January 7, 2003
    Publication date: July 10, 2003
    Applicant: Dai Nippon Printing Co., Ltd.
    Inventors: Daigo Aoki, Masato Okabe, Hironori Kobayashi, Manabu Yamamoto, Tatsuya Miyoshi, Koji Arai, Hiroshi Kishimoto
  • Publication number: 20030112695
    Abstract: There are provided a plurality of memory mats, including a plurality of bit lines, a plurality of word lines, and a plurality of memory cells coupled to the plurality of bit lines, and the plurality of word lines are provided in a direction of the bit line. A sense amplifier array including a plurality of latch circuits is provided in areas between the memory mats arranged in the bit line direction, respectively, and a pair of input/output nodes of which are connected to a pair of bit lines separately placed in the memory mats on both sides of the area, respectively. In this case, for a general memory mat other than both end portions in the bit line direction, word lines in any one of the memory mats are activated, while, for end memory mats provided on both end portions in the bit line direction, word lines of both memory mats are activated together.
    Type: Application
    Filed: February 11, 2003
    Publication date: June 19, 2003
    Inventors: Hiroki Fujisawa, Riichiro Takemura, Koji Arai
  • Patent number: 6573650
    Abstract: An EL device comprising a first electrode, an EL layer formed on the first electrode, and a second electrode formed on the EL layer, wherein at least one layer of a material whose wettability changes when light is applied thereto is formed. The invention provides EL devices that can be simply produced, and processes for producing the same.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: June 3, 2003
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Daigo Aoki, Masato Okabe, Hironori Kobayashi, Manabu Yamamoto, Tatsuya Miyoshi, Koji Arai, Hiroshi Kishimoto
  • Patent number: 6558756
    Abstract: A material containing, as a main component, an organic silicon compound represented by the following general formula: R1xSi(OR2)4-x (where R1 is a phenyl group or a vinyl group; R2 is an alkyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. As the organic silicon compound where R1 is a phenyl group, there can be listed phenyltrimethoxysilane or diphenyldimethoxysilane. As the organic silicon compound where R1 is a vinyl group, there can be listed vinyltrimethoxysilane or divinyldimethoxysilane.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: May 6, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Gaku Sugahara, Nobuo Aoi, Koji Arai, Kazuyuki Sawada
  • Patent number: 6545897
    Abstract: There are provided a plurality of memory mats, including a plurality of bit lines, a plurality of word lines, and a plurality of memory cells coupled to the plurality of bit lines, and the plurality of word lines are provided in a direction of the bit line. A sense amplifier array including a plurality of latch circuits is provided in areas between the memory mats arranged in the bit line direction, respectively, and a pair of input/output nodes of which are connected to a pair of bit lines separately placed in the memory mats on both sides of the area, respectively. In this case, for a general memory mat other than both end portions in the bit line direction, word lines in any one of the memory mats are activated, while, for end memory mats provided on both end portions in the bit line direction, word lines of both memory mats are activated together.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: April 8, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI System Co., Ltd.
    Inventors: Hiroki Fujisawa, Riichiro Takemura, Koji Arai
  • Patent number: 6519229
    Abstract: A transmission path interface apparatus compatible with a CSMA mode capable of responding to a fault occurring in a transmission path flexibly and at a high speed, including a transmission unit for holding serial transmission information and transmitting a frame modulated by both of the transmission information and a preamble to a CSMA mode transmission path; a reception unit for taking out a loopback frame transmitted by an opposing node in accordance with that frame, restoring the transmission information contained in this, and holding the same; a collision decision unit for determining a correlation between transmission information held by the transmission unit and the reception unit and notifying a result of this to an information source of transmission information; and a collision decision acceleration unit for comparing an elapsed time from a timing when the information source gave the transmission information to the transmission unit to a timing when the transmission information contained in the loopba
    Type: Grant
    Filed: October 20, 1998
    Date of Patent: February 11, 2003
    Assignee: Fujitsu Limited
    Inventors: Koji Arai, Gen Nakagawa
  • Publication number: 20020199071
    Abstract: In a storage area network (SAN), when a host accesses a storage system, the host is certified to restrict any unauthorized access. The storage system includes an access setting section and a certifying section to restrict accesses from respective hosts. When a host accesses data on a disk, the host issues an inquiry to a file server program of a host to receive information of a physical location of a file containing the data on the disk. The host accesses the disk according to the information. Simultaneously, the file server program allows, by a disk management program, the access to the area specified by the access request from the host.
    Type: Application
    Filed: August 8, 2001
    Publication date: December 26, 2002
    Inventors: Manabu Kitamura, Koji Arai
  • Patent number: 6476793
    Abstract: A more-natural-looking video is reproduced and a video data having a desired color tone is formed by preserving the tone of a video as an original in color conversion at a desired ratio. To this end, a criterion color register stores color information (hue, chroma and density) for determining whether input pixel data is eligible for conversion, a target color register stores color information indicative of a target color, and a preservation degree register stores a preservation degree that determines the degree of preservation in color conversion. A color determination section determines whether the input pixel data is eligible for conversion, and the determination result is output to a color converter section. The color converter section performs color conversion to eligible pixel data according to the information stored in the criterion color register, target color register and preservation degree register, with the result of the color conversion being output.
    Type: Grant
    Filed: May 15, 1996
    Date of Patent: November 5, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Eiichi Motoyama, Shigeo Yamagata, Fumio Mikami, Koji Arai, Kenji Hara
  • Patent number: 6421515
    Abstract: A reader controller is connected to a printer controller which controls a engine controller provided in a printer. The printer includes a controlling unit for controlling a document reader which reads documents, a receiving unit for receiving a command for the engine controller from the printer controller, and a counting unit for counting a number of documents processed by the reader controller in accordance with a control of the controlling unit, and counting a number of sheets processed by the printer controller in accordance with the command received by the receiving unit. The printer further includes a causing unit for causing a display of the reader to display the number counted by the counting unit.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: July 16, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Arai, Masanori Sakai, Yasuhiro Kozuka