Patents by Inventor Koji Kotani

Koji Kotani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7296048
    Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data, and this computing unit computes input digit data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1–3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: November 13, 2007
    Assignees: Kabushiki Kaisha Ultraclean Technology Research Institute, I & F, Inc.
    Inventors: Tadahiro Ohmi, Makoto Imai, Toshiyuki Nozawa, Masanori Fujibayashi, Koji Kotani, Tadashi Shibata, Takahisa Nitta
  • Publication number: 20070163502
    Abstract: In a substrate processing apparatus for processing a substrate for manufacturing a semiconductor device, a mist passage (5) is formed to pass through a part of a processing vessel (2) as an object to be cooled. There are disposed a mist generator (64) that generates a mist, and a gas supply source (62) that supplies a carrier gas for carrying the generated mist. A temperature of the part to be cooled is detected by a temperature sensor (49). When the detected temperature exceeds a predetermined temperature, a water mist, for example, is allowed to flow into the mist passage so as to cool the processing vessel by a heat of evaporation of the mist. Thus, the temperature of the processing vessel can be promptly lowered, and thus a plasma process can be performed under an atmosphere of a stable temperature.
    Type: Application
    Filed: December 24, 2004
    Publication date: July 19, 2007
    Inventors: Toshihisa Nozawa, Osamu Morita, Tamaki Yuasa, Koji Kotani
  • Publication number: 20070137575
    Abstract: The present invention has an object of improving the cooling efficiency of the process gas supply part of a plasma processor and thereby suppressing an increase in the temperature of the process gas supply part.
    Type: Application
    Filed: November 2, 2004
    Publication date: June 21, 2007
    Applicants: TOKYO ELECTRON LIMITED, Tadahiro OHMI
    Inventors: Tadahiro Ohmi, Toshihisa Nozawa, Osamu Morita, Tamaki Yuasa, Koji Kotani
  • Publication number: 20070096175
    Abstract: A CMOS device includes a p-channel MOS transistor and an n-channel MOS transistor having a structure formed on a (100) surface of a silicon substrate and having a different crystal surface, a high-quality gate insulation film formed on such a structure by a microwave plasma process, and a gate electrode formed thereon, wherein the size and the shape of the foregoing structure is set such that the carrier mobility is balanced between the p-channel MOS transistor and the n-channel MOS transistor.
    Type: Application
    Filed: November 30, 2006
    Publication date: May 3, 2007
    Inventors: Tadahiro Ohmi, Koji Kotani, Shigetoshi Sugawa
  • Patent number: 7210895
    Abstract: A turbo-compressor being driven by an electric motor has an inlet guide vane and a blow-off valve. The surge limit line of the compressor is amended depending upon seasonal changes of temperature and pressure of a working gas to be sucked into the compressor. Upon the basis of the surge limit line amended, the minimum opening of the inlet guide vale is altered, thereby reducing the driving power or force of the compressor.
    Type: Grant
    Filed: August 12, 2002
    Date of Patent: May 1, 2007
    Assignee: Hitachi Industries Co., Ltd.
    Inventors: Koji Kotani, Kazuo Takeda, Haruo Miura
  • Patent number: 7202534
    Abstract: A CMOS device includes a p-channel MOS transistor and an n-channel MOS transistor having a structure formed on a (100) surface of a silicon substrate and having a different crystal surface, a high-quality gate insulation film formed on such a structure by a microwave plasma process, and a gate electrode formed thereon, wherein the size and the shape of the foregoing structure is set such that the carrier mobility is balanced between the p-channel MOS transistor and the n-channel MOS transistor.
    Type: Grant
    Filed: December 10, 2002
    Date of Patent: April 10, 2007
    Assignees: Tokyo Electron Limited
    Inventors: Tadahiro Ohmi, Koji Kotani, Shigetoshi Sugawa
  • Patent number: 7193434
    Abstract: There is provided a high-performance semiconductor integrated circuit whose circuit area is small and whose wiring length is short. The semiconductor integrated circuit is constructed in a multi-layer structure and is provided with a switch block for switching connections among a plurality of signal lines by means of a plurality of transistors formed respectively in a plurality of semiconductor layers and a plurality of logic blocks formed in each of the plurality of semiconductor layers and connected to each of the plurality of signal lines. The first switch block is a programmable switch block capable of changing the connection topology among the plurality of signal lines.
    Type: Grant
    Filed: July 15, 2005
    Date of Patent: March 20, 2007
    Assignee: Advantest Corporation
    Inventors: Tadahiro Ohmi, Koji Kotani, Kazuyuki Maruo, Takahiro Yamaguchi
  • Publication number: 20060176045
    Abstract: A plasma reactor is provided which does not require a high power supply voltage and can form a plasma with a necessary and sufficient average current density over the whole region between a pair of electrodes to efficiently modify a gas flowing between the electrodes. The plasma reactor comprises first and second electrodes positioned to face each other, a dielectric material placed between the two electrodes and an electrical power supply for applying an alternating or pulsed current to the two electrodes and generating a plasma in the gas passing through the gap between the two electrodes to thereby modify the gas. By setting the average current density Ird of the plasma generated in the gap so that it satisfies the formula 10?4 A/cm2?Ird?10?1 A/cm2, a concentrated discharge and a barrier discharge are simultaneously generated, thus forming a plasma having a sufficient average current density Ird for the efficient modification of the gas over the whole region of the gap.
    Type: Application
    Filed: March 17, 2006
    Publication date: August 10, 2006
    Inventors: Kenji Dosaka, Kazuo Ando, Hideyuki Fujishiro, Minoru Torii, Koji Kotani, Takeshi Yanobe
  • Publication number: 20060088212
    Abstract: The data analysis device 100 includes: difference calculation means (S2) for, with respect to an image, carrying out a calculation of calculating a difference between intensity values at an arbitrary point in the image and a point located in the vicinity of the arbitrary point in a first direction as a first intensity difference of the arbitrary point and of calculating a difference between intensity values at the arbitrary point and a point located in the vicinity of the arbitrary point in a second direction different from the first direction as a second intensity difference of the arbitrary point, the difference calculation means carrying out the calculation with respect to each of a plurality of points in the image; and frequency distribution generation means (S3 to S5) for quantizing a vector comprising the first intensity difference and the second intensity difference obtained by the difference calculation means for each of the plurality of points in the image into a single region of a plurality of regio
    Type: Application
    Filed: March 2, 2004
    Publication date: April 27, 2006
    Inventors: Tadahiro Ohmi, Koji Kotani, Feifei Lee
  • Publication number: 20060017071
    Abstract: There is provided a high-performance semiconductor integrated circuit whose circuit area is small and whose wiring length is short. The semiconductor integrated circuit is constructed in a multi-layer structure and is provided with a switch block for switching connections among a plurality of signal lines by means of a plurality of transistors formed respectively in a plurality of semiconductor layers and a plurality of logic blocks formed in each of the plurality of semiconductor layers and connected to each of the plurality of signal lines. The first switch block is a programmable switch block capable of changing the connection topology among the plurality of signal lines.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 26, 2006
    Inventors: Tadahiro Ohmi, Koji Kotani, Kazuyuki Maruo, Takahiro Yamaguchi
  • Publication number: 20060017101
    Abstract: There is provided a small-type semiconductor integrated circuit whose circuit area is small and whose wiring length is short. The semiconductor integrated circuit is constructed in a multi-layer structure and is provided with a first semiconductor layer, a first semiconductor layer transistor formed in the first semiconductor layer, a wiring layer which is deposited on the first semiconductor layer and in which metal wires are formed, a second semiconductor layer deposited on the wiring layer and a second semiconductor layer transistor formed in the second semiconductor layer. It is noted that insulation of a gate insulating film of the first semiconductor layer transistor is almost equal with that of a gate insulating film of the second semiconductor layer transistor and the gate insulating film of the second semiconductor layer transistor is formed by means of radical oxidation or radical nitridation.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 26, 2006
    Inventors: Tadahiro Ohmi, Koji Kotani, Kazuyuki Maruo, Takahiro Yamaguchi
  • Publication number: 20050265819
    Abstract: A turbo-compressor being driven by an electric motor has an inlet guide vane and a blow-off valve. The surge limit line of the compressor is amended depending upon seasonal changes of temperature and pressure of a working gas to be sucked into the compressor. Upon the basis of the surge limit line amended, the minimum opening of the inlet guide vale is altered, thereby reducing the driving power or force of the compressor.
    Type: Application
    Filed: August 12, 2002
    Publication date: December 1, 2005
    Inventors: Koji Kotani, Kazuo Takeda, Haruo Miura
  • Publication number: 20050105816
    Abstract: In order to carry out data compression processing using vector quantization at a high speed by hardware, upon retrieving a template pattern most similar to an input pattern from a plurality of template patterns, those template patterns to be subjected to calculation of the degree of similarity are selected by the use of feature quantities of the input pattern and the template patterns. Upon calculating the degree of similarity between each of the selected template patterns and the input pattern, the calculation is carried out in a bit serial fashion. Thus, in pattern matching processing in the vector quantization, the number of the templates to be subjected to matching is reduced and the number of cycles required for calculation upon matching is reduced, thereby enabling the data compression processing using the vector quantization to be carried out at a high speed.
    Type: Application
    Filed: February 17, 2003
    Publication date: May 19, 2005
    Inventors: Tadahiro Ohmi, Kenji Mochizuki, Koji Kotani
  • Publication number: 20050080835
    Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data, and this computing unit computes input digit data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1-3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.
    Type: Application
    Filed: August 15, 2003
    Publication date: April 14, 2005
    Inventors: Tadahiro Ohmi, Makoto Imai, Toshiyuki Nozawa, Masanori Fujibayashi, Koji Kotani, Tadashi Shibata, Takahisa Nitta
  • Publication number: 20050051431
    Abstract: A metallic separator in which falling off of the conductive inclusions projecting from a matrix surface is prevented, whereby the contact resistance is decreased, resulting in increasing the characteristics for generation of electrical energy. A metallic separator for a fuel cell comprises conductive inclusions in a metal structure, and the conductive inclusions project from a surface of a matrix to a height of 1 to 3 micrometers.
    Type: Application
    Filed: November 1, 2002
    Publication date: March 10, 2005
    Inventors: Teruyuki Ohtani, Makoto Tsuji, Masao Utsunomiya, Koji Kotani
  • Publication number: 20040245579
    Abstract: A CMOS device includes a p-channel MOS transistor and an n-channel MOS transistor having a structure formed on a (100) surface of a silicon substrate and having a different crystal surface, a high-quality gate insulation film formed on such a structure by a microwave plasma process, and a gate electrode formed thereon, wherein the size and the shape of the foregoing structure is set such that the carrier mobility is balanced between the p-channel MOS transistor and the n-channel MOS transistor.
    Type: Application
    Filed: August 12, 2003
    Publication date: December 9, 2004
    Inventors: Tadahiro Ohmi, Koji Kotani, Shigetoshi Sugawa
  • Publication number: 20040221931
    Abstract: This invention is directed to a method for manufacturing an aluminum cast-forged product by forging a preform made of a material for forging obtained by casting a material for forging of an aluminum alloy, and an aluminum cast-forged product produced thereby. Forming is performed by heating the preform made of a material for forging at a temperature of from approximately 450° C. to a melting point of the alloy. In this method, a recycled material may be used as a starting material, and some omission of the steps may be possible. There is provided a method for manufacturing an aluminum cast-forged product having excellent mechanical properties, such as, a higher tensile strength, higher proof stress, higher elongation, and the like with a lower production cost.
    Type: Application
    Filed: September 9, 2002
    Publication date: November 11, 2004
    Applicants: Asahi Tec Corporation, Hoei Industries Co., Ltd.
    Inventors: Koji Kotani, Masatoshi Watanabe, Daisuke Machino
  • Patent number: 6793456
    Abstract: A turbo-compressor comprises a compressor main body for compressing an operation fluid, an inlet guide vane apparatus being provided on a suction side of the compressor main body and having guide vanes, and a blow-off valve being provided in a discharge said compressor main body. An opening of the blow-off valve is variable. A pressure detector is provided on the discharge side of the compressor. At least any one of a time-period and a number of times of operations of the inlet guide vane apparatus is memorized in a memory, when it is operated at an inlet guide vane opening, being equal or less than a setting limit. A controller controls the blow-off valve and the guide vanes based on the values which are memorized in the memory.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: September 21, 2004
    Assignees: Hitachi, Ltd., Hitachi Industries Co., Ltd.
    Inventors: Koji Kotani, Kazuo Takeda
  • Patent number: 6774335
    Abstract: This invention provides a plasma reactor for modifying gas by plasma, including a first planar electrode and a second planar electrode, the two electrodes facing opposite each other approximately in parallel; a dielectric body inserted between the first and the second electrodes; and a complex barrier discharge-generating way for providing a predetermined electric potential difference between the first and the second electrodes; wherein the first and the second electrodes are provided so as to apply complex plasma discharge to the gas to be treated fed between the electrodes, to thereby modify the gas. According to the invention, gas modification efficiency can be remarkably improved.
    Type: Grant
    Filed: May 7, 2001
    Date of Patent: August 10, 2004
    Assignees: Hokushin Corporation, Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Takeshi Yanobe, Hideyuki Fujishiro, Kenji Dosaka, Minoru Torii, Kazuo Ando, Koji Kotani
  • Patent number: 6728745
    Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1-3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.
    Type: Grant
    Filed: September 6, 2000
    Date of Patent: April 27, 2004
    Assignees: Kabushiki Kaisha Ultraclean Technology Research Institute, I & F, Inc.
    Inventors: Tadahiro Ohmi, Makoto Imai, Toshiyuki Nozawa, Masanori Fujibayashi, Koji Kotani, Tadashi Shibata, Takahisa Nitta