Patents by Inventor Koji Kotani
Koji Kotani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20030219335Abstract: A turbo-compressor comprises a compressor main body for compressing an operation fluid, an inlet guide vane apparatus being provided on a suction side of the compressor main body and having guide vanes, and a blow-off valve being provided in a discharge said compressor main body. An opening of the blow-off valve is variable. A pressure detector is provided on the discharge side of the compressor. At least any one of a time-period and a number of times of operations of the inlet guide vane apparatus is memorized in a memory, when it is operated at an inlet guide vane opening, being equal or less than a setting limit. A controller controls the blow-off valve and the guide vanes based on the values which are memorized in the memory.Type: ApplicationFiled: September 20, 2002Publication date: November 27, 2003Inventors: Koji Kotani, Kazuo Takeda
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Publication number: 20030162077Abstract: A metallic separator according to a first embodiment is formed by obtaining a blank by rolling a metallic material having conductive inclusions, and removing a surface of the blank by 2% or more of the thickness of the blank. A metallic separator according to a second embodiment is formed by pressing a metallic plate so as to have a cross section including ridges and grooves alternatively, and removing parts of the ridged portions so as to make flattened surfaces. A metallic separator having conductive inclusions in its metal texture according to a third embodiment is formed by blasting a liquid containing two or more kinds of abrasives having different particle diameters to a blank after it has been rolled. A metallic separator having conductive inclusion in its metal texture according to a fourth embodiment is formed by blasting a passivation treatment liquid mixed with abrasives to the separator.Type: ApplicationFiled: December 4, 2002Publication date: August 28, 2003Inventors: Teruyuki Ohtani, Makoto Tsuji, Masao Utsunomiya, Koji Kotani
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Publication number: 20030124406Abstract: A fuel cell separator in which high electrical conductivity of an electricity generating portion and high corrosion resistance of an non-electricity generating portion are combined. The fuel cell separator, comprising the electricity generating portion and the non-electricity generating portion, wherein a material of at least a surface of one of the portions is different from that of a surface of other portions.Type: ApplicationFiled: December 23, 2002Publication date: July 3, 2003Applicant: HONDA GIKEN KOGYO KABUSHIKI KAISHAInventors: Teruyuki Ohtani, Makoto Tsuji, Masao Utsunomiya, Koji Kotani
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Publication number: 20020034590Abstract: A plasma reactor is provided which does not require a high power supply voltage and can form a plasma with a necessary and sufficient average current density over the whole region between a pair of electrodes to efficiently modify a gas flowing between the electrodes. The plasma reactor comprises first and second electrodes positioned to face each other, a dielectric material placed between the two electrodes and an electrical power supply for applying an alternating or pulsed current to the two electrodes and generating a plasma in the gas passing through the gap between the two electrodes to thereby modify the gas. By setting the average current density Ird of the plasma generated in the gap so that it satisfies the formula 10−4 A/cm2≦Ird≦10−1 A/cm2, a concentrated discharge and a barrier discharge are simultaneously generated, thus forming a plasma having a sufficient average current density Ird for the efficient modification of the gas over the whole region of the gap.Type: ApplicationFiled: May 11, 2001Publication date: March 21, 2002Inventors: Kenji Dosaka, Kazuo Ando, Hideyuki Fujishiro, Minoru Torii, Koji Kotani, Takeshi Yanobe
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Publication number: 20020005395Abstract: This invention provides a plasma reactor for modifying gas by plasma, including a first planar electrode and a second planar electrode, the two electrodes facing opposite each other approximately in parallel; a dielectric body inserted between the first and the second electrodes; and a complex barrier discharge-generating means for providing a predetermined electric potential difference between the first and the second electrodes; wherein the first and the second electrodes are provided so as to apply complex plasma discharge to the gas to be treated fed between the electrodes, to thereby modify the gas. According to the invention, gas modification efficiency can be remarkably improved.Type: ApplicationFiled: May 7, 2001Publication date: January 17, 2002Applicant: HOKUSHIN CORPORATION AND HONDA GIKEN KOGYO KABUSHIKI KAISHAInventors: Takeshi Yanobe, Hideyuki Fujishiro, Kenji Dosaka, Minoru Torii, Kazuo Ando, Koji Kotani
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Patent number: 6150851Abstract: Charge transfer amplifier circuit which is capable of canceling fluctuations in the element characteristics thereof and which conducts highly accurate voltage amplification without the use of a stationary current, and provides a voltage comparator which may be applied to a highly accurate A/D converter which has low power consumption. The charge transfer amplifier circuit is provided with a MOS transistor, a first capacity and a second capacity which are effectively connected to, respectively, the source electrode and the drain electrode of the MOS transistor, a mechanism for setting the region between the terminals of the first capacity and the region between the terminals of the second capacity, respectively, to appropriate predetermined potential differences, and for releasing these, and a mechanism for appropriately externally altering the potential difference between the gate and the source of the MOS transistor. The first capacity is set so as to be larger than the second capacity.Type: GrantFiled: June 5, 1998Date of Patent: November 21, 2000Assignees: Tadahiro Ohmi, Kabushiki Kaisha Ultraclean Technology Research InstituteInventors: Tadahiro Ohmi, Takahisa Nitta, Koji Kotani
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Patent number: 6137053Abstract: An electric double-layer capacitor housing has a bottomed outer case for accommodating an electric double-layer capacitor therein, a lid closing an open end of the bottomed outer case, the lid having a through hole defined therein, an electrode terminal mounted in the through hole in the lid for electrically connecting the electric double-layer capacitor in the bottomed outer case to an external circuit, and an insulative sealing member interposed between the lid and the electrode terminal and sealing the through hole. The electrode terminal includes a terminal body, a projecting rod extending from the terminal body, an outer sleeve spaced radially outwardly from the projecting rod, a tapered portion spreading radially outwardly and downwardly, and a flange extending radially outwardly from the tapered portion.Type: GrantFiled: January 21, 1999Date of Patent: October 24, 2000Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Kazuo Andou, Koji Kotani, Takeshi Taguchi, Hiroto Kobayashi, Toshiyuki Matsuoka
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Patent number: 6137673Abstract: An electric double-layer capacitor includes a plurality of electrode elements each having a current collector, a polarized electrode disposed on a surface thereof, and a strip-like current collecting lead extending from an end of the current collector. The electrode elements are stacked as alternately belonging to respective polarities, and the current collecting leads of the electrode elements are stacked into lead assemblies of the respective polarities. A separator is interposed between the stacked electrode elements, and the lead assemblies are connected respectively to electrode terminals. The lead assemblies of respective polarities serve as respective connectors connected to the electrode terminals. Each of the connectors has a flat joint region as at least a portion thereof. The current collecting leads of each of the lead assemblies are integrally joined to each other by the flat joint region by ultrasonic welding before the connector is connected to the electrode terminal.Type: GrantFiled: January 21, 1999Date of Patent: October 24, 2000Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Kazuo Andou, Koji Kotani, Takeshi Taguchi, Toshiyuki Matsuoka, Tohru Ohta, Mitsuru Ikeo, Yoshio Yamamoto
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Patent number: 5959484Abstract: A feedback circuit is provided which is capable of realizing handshake functions, flip flop functions, and other functions using a smaller number of elements and chip surface. The threshold circuit is provided with an electrode which is electrically floating and a plurality of input electrodes which are connected with the floating electrode via capacity elements, and the circuit has a mechanism for essentially determining the potential of the floating electrode by means of the potentials applied to the input electrodes, and the output of the circuit is determined by the potential of the floating gate; the output of the threshold circuit is connected to at least one of the plurality of input electrodes, either directly, or via at least one circuit of some type.Type: GrantFiled: February 27, 1997Date of Patent: September 28, 1999Assignees: Tadashi Shibata, Tadahiro OhmiInventors: Tadahiro Ohmi, Tadashi Shibata, Hiroaki Terada, Koji Kotani
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Patent number: 5937399Abstract: A semiconductor integrated circuit includes one or more neuron MOS transistors on a substrate. The MOS transistor comprises a semiconductor region of one conductivity type, source and drain regions of opposite conductivity type disposed in this region, floating gate disposed on an insulating film between the source and drain regions, and a plurality of input coupling electrodes making capacitive coupling with the floating gate through the insulating film, wherein the floating gate is connected to at least one switching device.Type: GrantFiled: June 11, 1996Date of Patent: August 10, 1999Assignees: Tadahiro Ohmi, Tadashi ShibataInventors: Tadahiro Ohmi, Tadashi Shibata, Koji Kotani
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Patent number: 5917742Abstract: A semiconductor arithmetic circuit which realizes multiple-item addition processing at high speed and with a small surface areas The semiconductor arithmetic circuit adds a plurality of data expressed in binary format which is provided with terminals for the simultaneous input of the plurality of data, a mechanism for conducting a batch addition operation with respect to all the bits of the plurality of data, and for generating an analog or multi-valued signal having a linear relationship with the results of this addition and a mechanism for converting the analog or multi-valued signal to a digital signal. The plurality of data comprise bit data signals, and 4 or more of these are subjected to batch addition. A plurality of bit groups including a plurality of connected bits are also subjected to batch addition.Type: GrantFiled: February 27, 1997Date of Patent: June 29, 1999Assignee: Tadashi ShibataInventors: Tadahiro Ohmi, Makoto Imai, Koji Kotani, Tadashi Shibata
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Patent number: 5682109Abstract: The present invention relates to a semiconductor integrated circuit. In greater detail, the present invention relates to a semiconductor integrated circuit which conducts calculations using a voltage adding function by means of capacity and threshold operations.Type: GrantFiled: February 13, 1996Date of Patent: October 28, 1997Assignees: Tadahiro Ohmi, Tadashi ShibataInventors: Tadahiro Ohmi, Tadashi Shibata, Koji Kotani
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Patent number: 5661421Abstract: A semiconductor integrated circuit for effecting data matching at high speed is provided in a simple circuit. The semiconductor integrated circuit includes a first input terminal and a second input terminal to which first and second voltage signals representing first and second values are inputted, respectively, and an output terminal. A predetermined output signal is produced at the output terminal when the difference between the first and second values is smaller than a predetermined difference value. The semiconductor integrated circuit of this invention comprises first and second inverters, each inverter comprising neuron MOS transistors having a plurality of input gates. The first and second signals or, first and second processed signals obtained by applying predetermined processing to the first and second signals, are inputted to at least one of the input gates of the inverters.Type: GrantFiled: September 29, 1995Date of Patent: August 26, 1997Assignees: Tadashi Shibata, Tadahiro OhmiInventors: Tadahiro Ohmi, Tadashi Shibata, Koji Kotani
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Patent number: 5578833Abstract: An analyzer capable of detecting a light element, such as Na, capable of evaluating a sample having an uneven surface, such as a pattern-carrying wafer without destroying and damaging the same. The analyzer is of simple construction, is simple in operation, is safe for the human body, and is capable of identifying the composition of a minute amount of impurities and fine particles deposited on the surface of a sample. The analyzer has a sample retaining stage, an ultraviolet ray-emitting light source, a collector for collecting the ultraviolet rays generated by the light source and for applying the resultant rays to the surface of a sample, and a detector for detecting the light emitted from the surface of the sample to which the ultraviolet rays have been applied.Type: GrantFiled: April 25, 1994Date of Patent: November 26, 1996Assignee: Tadahiro OhmiInventors: Tadahiro Ohmi, Koji Kotani