Patents by Inventor Koji Tsutsumi
Koji Tsutsumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250030405Abstract: A variable attenuator includes n attenuation resistor circuits and m adjustment resistor circuits connected in parallel to a signal line, the n attenuation resistor circuits are on-off controlled by corresponding attenuation amount control signals, each of the n attenuation resistor circuits being with a different attenuation amount, the adjustment resistor circuits correspond to k attenuation resistor circuits, and are on-off controlled by a signal of a logical product of k attenuation amount control signals for performing on-off control corresponding to each of the selected k attenuation resistor circuits, and when being on-controlled by a signal of a logical product of the k attenuation amount control signals, attenuation amount of the adjustment resistor circuits are made equal to a sum of attenuation amounts when the k attenuation resistor circuits controlled by the corresponding k attenuation amount control signals are independently on-controlled.Type: ApplicationFiled: October 3, 2024Publication date: January 23, 2025Applicant: Mitsubishi Electric CorporationInventors: Shinji Takezoe, Koji TSUTSUMI
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Publication number: 20240235529Abstract: A filter circuit includes: a filter unit which is connected to a signal line and which has transistors and capacitors which constitute paths for N phases, and in which the transistors to which clock signals of N phases are applied electrically connect the capacitors to the signal line; and a dummy unit which has transistors and impedance parts which constitute dummy paths corresponding, respectively, to the paths for the N phases, and in which the transistors to which inverted signals of N phases are applied electrically connect the impedance parts to the signal line.Type: ApplicationFiled: March 25, 2024Publication date: July 11, 2024Applicant: Mitsubishi Electric CorporationInventors: Takaya MARUYAMA, Sho IKEDA, Koji TSUTSUMI
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Patent number: 11949394Abstract: A first phase shift circuit amplifies, when a first signal, a second signal having a phase difference of 90 degrees from the first signal, a third signal having a phase difference of 180 degrees from the first signal, and a fourth signal having a phase difference of 270 degrees from the first signal are output from a 90-degree distributor that distributes an input signal, each of any three signals from among the first signal to the fourth signal. A second phase shift circuit amplifies each of any two signals of any three signals and one signal that is not amplified by the first phase shift circuit from among the first signal to the fourth signal. One or more phase shift circuits of the first phase shift circuit and the second phase shift circuit each include a compensation circuit that compensates for a phase error of the synthesized signal.Type: GrantFiled: June 22, 2022Date of Patent: April 2, 2024Assignee: Mitsubishi Electric CorporationInventors: Wataru Yamamoto, Koji Tsutsumi, Masaomi Tsuru
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Patent number: 11929723Abstract: A phase-variable frequency multiplier includes: a 90-degree divider for dividing an input signal into an I-signal and a Q-signal; an amplitude setting circuit for distributing each of the I-signal and the Q-signal to two paths, setting amplitudes of two of four signals including the two distributed I-signals and the two distributed Q-signals depending on a phase shift amount of the input signal, and outputting as set signals, the four signals including the signals with the set amplitudes; a first mixer for multiplying one of the two I-signals included in the set signals by one of the two Q-signals included in the set signals to generate a first signal having a frequency being twice the frequency of the input signal; a second mixer for multiplying the other of the two I-signals included in the set signals by the other of the two Q-signals included in the set signals to generate a second signal with an amplitude ratio with respect to the first signal, being a tangent or a reciprocal of a tangent of the phase shType: GrantFiled: August 18, 2021Date of Patent: March 12, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Wataru Yamamoto, Koji Tsutsumi, Sho Ikeda, Masaomi Tsuru
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Patent number: 11870447Abstract: A third signal having a phase intermediate between a first signal based on a reference signal and a second signal with a phase shifted by an element of a previous stage is generated, a signal obtained by shifting the phase of the third signal by a first phase shill amount is output as a second signal to an element of a subsequent stage, a phase difference between the third signal and a fourth signal obtained by shifting the phase of a first signal output from the element of the subsequent stage by the first phase shift amount is detected, and the first phase shift amount is controlled on the basis of the detected phase difference.Type: GrantFiled: October 18, 2021Date of Patent: January 9, 2024Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Sho Ikeda, Akihito Hirai, Koji Tsutsumi, Masaomi Tsuru
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Patent number: 11841457Abstract: A radar device includes a transmission module, a reception module, and a signal processing unit. The transmission module includes an RF signal source that generates a transmission chirp signal synchronized with a reference signal. The reception module includes an RF signal source that generates a reception chirp signal used as a reception local signal and synchronized with the reference signal. The reception module receives a reflected wave of the transmission chirp signal emitted from the transmission module, and mixes a received reception signal with the reception chirp signal. The signal processing unit detects a target based on a beat signal generated by the mixing by the reception module.Type: GrantFiled: December 1, 2020Date of Patent: December 12, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Koji Tsutsumi, Tatsuya Hagiwara, Mitsuhiro Shimozawa
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Patent number: 11757454Abstract: A delay synchronization circuit includes a pulse synthesizing circuit to generate a synthesized signal including a first pulse signal synchronized with a reference signal and a second pulse signal synchronized a feedback signal, a VCDL to delay the synthesized signal g and output a delayed synthesized signal, a pulse separation circuit to generate a first separation signal synchronized with a first pulse signal included in the delayed synthesized signal and generate a second separation signal synchronized with a second pulse signal included in the delayed synthesized signal, a circulator to output a first separation signal to a clock reception circuit and then output the first separation signal returned from the clock reception circuit to the pulse synthesizing circuit as the feedback signal, and a delay-amount control circuit to control a delay amount of the delayed synthesized signal according to a phase difference between the reference signal and the second separation signal.Type: GrantFiled: September 20, 2022Date of Patent: September 12, 2023Assignee: Mitsubishi Electric CorporationInventors: Sho Ikeda, Koji Tsutsumi, Masaomi Tsuru
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Publication number: 20230017177Abstract: A delay synchronization circuit includes a pulse synthesizing circuit to generate a synthesized signal including a first pulse signal synchronized with a reference signal and a second pulse signal synchronized a feedback signal, a VCDL to delay the synthesized signal g and output a delayed synthesized signal, a pulse separation circuit to generate a first separation signal synchronized with a first pulse signal included in the delayed synthesized signal and generate a second separation signal synchronized with a second pulse signal included in the delayed synthesized signal, a circulator to output a first separation signal to a clock reception circuit and then output the first separation signal returned from the clock reception circuit to the pulse synthesizing circuit as the feedback signal, and a delay-amount control circuit to control a delay amount of the delayed synthesized signal according to a phase difference between the reference signal and the second separation signal.Type: ApplicationFiled: September 20, 2022Publication date: January 19, 2023Applicant: Mitsubishi Electric CorporationInventors: Sho IKEDA, Koji TSUTSUMI, Masaomi TSURU
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Patent number: 11502656Abstract: A variable gain amplifier includes a first transistor group which is connected to an input terminal and an output terminal, and which amplifies a signal from the input terminal to output the amplified signal to the output terminal; a second transistor group connected to the input terminal; a third transistor group connected to the output terminal; and a controller configured to control the first transistor group, the second transistor group, and the third transistor group so that a total number of the number of transistors to be turned on in the first transistor group and the second transistor group is kept at a constant value, and total numbers of transistors to be turned on in the first transistor group and in the third transistor group are the same.Type: GrantFiled: December 15, 2020Date of Patent: November 15, 2022Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Wataru Yamamoto, Koji Tsutsumi, Mitsuhiro Shimozawa
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Publication number: 20220349992Abstract: In a radar device, a reception antenna directly receives a chirp signal transmitted by a transmission antenna of a module other than a module to which the reception antenna belongs among a plurality of modules, a mixer generates a baseband signal by mixing a chirp signal generated by a chirp signal source and a chirp signal received by the reception antenna, and an analog-to-digital converter generates a digital signal by digital-converting the baseband signal generated by the mixer.Type: ApplicationFiled: July 18, 2022Publication date: November 3, 2022Applicant: Mitsubishi Electric CorporationInventors: Koji TSUTSUMI, Sho IKEDA
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Publication number: 20220329231Abstract: A first phase shift circuit amplifies, when a first signal, a second signal having a phase difference of 90 degrees from the first signal, a third signal having a phase difference of 180 degrees from the first signal, and a fourth signal having a phase difference of 270 degrees from the first signal are output from a 90-degree distributor that distributes an input signal, each of any three signals from among the first signal to the fourth signal. A second phase shift circuit amplifies each of any two signals of any three signals and one signal that is not amplified by the first phase shift circuit from among the first signal to the fourth signal. One or more phase shift circuits of the first phase shift circuit and the second phase shift circuit each include a compensation circuit that compensates for a phase error of the synthesized signal.Type: ApplicationFiled: June 22, 2022Publication date: October 13, 2022Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Wataru YAMAMOTO, Koji TSUTSUMI, Masaomi TSURU
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Patent number: 11283455Abstract: A lock detection circuit is configured to include an integrating circuit that integrates a phase difference between a frequency-divided signal of a VCO and a reference signal during a constant period within a transient response period for an output signal from the VCO, and integrates a phase difference between the frequency-divided signal and the reference signal during a constant period within a convergence period for the output signal from the VCO; and a degree-of-convergence calculating circuit that calculates a degree at which the output signal from the VCO has converged, from a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the transient response period and a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the convergence period.Type: GrantFiled: March 24, 2021Date of Patent: March 22, 2022Assignee: Mitsubishi Electric CorporationInventors: Koji Tsutsumi, Sho Ikeda
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Publication number: 20220052699Abstract: A third signal having a phase intermediate between a first signal based on a reference signal and a second signal with a phase shifted by an element of a previous stage is generated, a signal obtained by shifting the phase of the third signal by a first phase shill amount is output as a second signal to an element of a subsequent stage, a phase difference between the third signal and a fourth signal obtained by shifting the phase of a first signal output from the element of the subsequent stage by the first phase shift amount is detected, and the first phase shift amount is controlled on the basis of the detected phase difference.Type: ApplicationFiled: October 18, 2021Publication date: February 17, 2022Applicant: Mitsubishi Electric CorporationInventors: Sho IKEDA, Akihito HIRAI, Koji TSUTSUMI, Masaomi TSURU
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Publication number: 20210376817Abstract: A phase-variable frequency multiplier includes: a 90-degree divider for dividing an input signal into an I-signal and a Q-signal; an amplitude setting circuit for distributing each of the I-signal and the Q-signal to two paths, setting amplitudes of two of four signals including the two distributed I-signals and the two distributed Q-signals depending on a phase shift amount of the input signal, and outputting as set signals, the four signals including the signals with the set amplitudes; a first mixer for multiplying one of the two I-signals included in the set signals by one of the two Q-signals included in the set signals to generate a first signal having a frequency being twice the frequency of the input signal; a second mixer for multiplying the other of the two I-signals included in the set signals by the other of the two Q-signals included in the set signals to generate a second signal with an amplitude ratio with respect to the first signal, being a tangent or a reciprocal of a tangent of the phase shType: ApplicationFiled: August 18, 2021Publication date: December 2, 2021Applicant: Mitsubishi Electric CorporationInventors: Wataru YAMAMOTO, Koji TSUTSUMI, Sho IKEDA, Masaomi TSURU
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Patent number: 11088698Abstract: A phase-locked loop circuit includes: a division ratio control circuit controlling a division ratio of an output signal of a variable frequency divider on the basis of an addition signal of a negative feedback signal and a division ratio setting signal indicating the division ratio, in synchronization with a divided signal output from the variable frequency divider; a first phase detection circuit calculating a first phase detection signal indicating a phase of an output signal of a signal output circuit; a second phase detection circuit calculating a second phase detection signal indicating a phase of the output signal of a case where it is assumed that the division ratio control circuit controls the division ratio of the output signal of the variable frequency divider in synchronization with the reference signal; and a shift circuit generating a negative feedback signal from a difference between the first phase detection signal and the second phase detection signal, and outputting an addition signal of theType: GrantFiled: November 30, 2020Date of Patent: August 10, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Sho Ikeda, Akihito Hirai, Koji Tsutsumi, Mitsuhiro Shimozawa
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Patent number: 11088697Abstract: A phase-frequency comparator compares a reference signal with an output signal from a variable frequency divider, and outputs an up signal of frequency and a down signal of frequency depending on results of the comparison. An AND circuit performs an AND operation between the up signal and the down signal, and outputs a result of the operation as a retiming si al CLKretime. A flip-flop circuit holds an output signal from a frequency control circuit at timing of the output signal from the AND circuit, and outputs the held output signal. At ?? modulator determines a division ratio for the variable frequency divider on the basis of the output from the flip-flop circuit.Type: GrantFiled: July 4, 2017Date of Patent: August 10, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Koji Tsutsumi, Yuki Yanagihara, Mitsuhiro Shimozawa
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Publication number: 20210211134Abstract: A lock detection circuit is configured to include an integrating circuit that integrates a phase difference between a frequency-divided signal of a VCO and a reference signal during a constant period within a transient response period for an output signal from the VCO, and integrates a phase difference between the frequency-divided signal and the reference signal during a constant period within a convergence period for the output signal from the VCO; and a degree-of-convergence calculating circuit that calculates a degree at which the output signal from the VCO has converged, from a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the transient response period and a result of the integration of the phase difference obtained by the integrating circuit during the constant period within the convergence period.Type: ApplicationFiled: March 24, 2021Publication date: July 8, 2021Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Koji TSUTSUMI, Sho IKEDA
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Patent number: 11043955Abstract: A first pulse selector outputs an output signal of a variable frequency divider to phase frequency detectors in a time division manner. A second pulse selector outputs a reference signal from a reference signal source to the phase frequency detectors in a time division manner. Outputs of the phase frequency detectors are provided, respectively, for multiple disposed charge pump circuits.Type: GrantFiled: July 24, 2020Date of Patent: June 22, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Koji Tsutsumi, Sho Ikeda, Mitsuhiro Shimozawa
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Patent number: 11005429Abstract: A first transistor, a second transistor, a third transistor, and a fourth transistor, their source terminals being grounded, are provided. Further, a first feedback circuit connected between a gate terminal and a drain terminal in the first transistor, and having first impedance, a second feedback circuit connected between a gate terminal and a drain terminal in the second transistor, and having the first impedance, a current source for outputting a current, a first load circuit connected between the drain terminal of the first transistor and a first output terminal of the current source, and having second impedance, and a second load circuit connected between the drain terminal of the second transistor and a second output terminal of the current source, and having the second impedance are provided.Type: GrantFiled: March 23, 2017Date of Patent: May 11, 2021Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Takaya Maruyama, Koji Tsutsumi
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Publication number: 20210109193Abstract: A radar device includes a transmission module, a reception module, and a signal processing unit. The transmission module includes an RF signal source that generates a transmission chirp signal synchronized with a reference signal. The reception module includes an RF signal source that generates a reception chirp signal used as a reception local signal and synchronized with the reference signal. The reception module receives a reflected wave of the transmission chirp signal emitted from the transmission module, and mixes a received reception signal with the reception chirp signal. The signal processing unit detects a target based on a beat signal generated by the mixing by the reception module.Type: ApplicationFiled: December 1, 2020Publication date: April 15, 2021Applicant: MITSUBISHI ELECTRIC CORPORATIONInventors: Koji TSUTSUMI, Tatsuya HAGIWARA, Mitsuhiro SHIMOZAWA