Patents by Inventor Kota V R M Murali
Kota V R M Murali has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9070579Abstract: A stack of a gate dielectric layer and a workfunction material layer are deposited over a plurality of semiconductor material portions, which can be a plurality of semiconductor fins or a plurality of active regions in a semiconductor substrate. A first gate conductor material applying a first stress is formed on a first portion of the workfunction material layer located on a first semiconductor material portion, and a second gate conductor material applying a second stress is formed on a second portion of the workfunction material layer located on a second semiconductor material portion. The first and second stresses are different in at least one of polarity and magnitude, thereby inducing different strains in the first and second portions of the workfunction material layer. The different strains cause the workfunction shift differently in the first and second portions of the workfunction material layer, thereby providing devices having multiple different workfunctions.Type: GrantFiled: October 16, 2014Date of Patent: June 30, 2015Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mohit Bajaj, Kota V. R. M. Murali, Rahul Nayak, Edward J. Nowak, Rajan K. Pandey
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Publication number: 20150035075Abstract: A stack of a gate dielectric layer and a workfunction material layer are deposited over a plurality of semiconductor material portions, which can be a plurality of semiconductor fins or a plurality of active regions in a semiconductor substrate. A first gate conductor material applying a first stress is formed on a first portion of the workfunction material layer located on a first semiconductor material portion, and a second gate conductor material applying a second stress is formed on a second portion of the workfunction material layer located on a second semiconductor material portion. The first and second stresses are different in at least one of polarity and magnitude, thereby inducing different strains in the first and second portions of the workfunction material layer. The different strains cause the workfunction shift differently in the first and second portions of the workfunction material layer, thereby providing devices having multiple different workfunctions.Type: ApplicationFiled: October 16, 2014Publication date: February 5, 2015Inventors: Mohit Bajaj, Kota V.R.M. Murali, Rahul Nayak, Edward J. Nowak, Rajan K. Pandey
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Publication number: 20140361397Abstract: A low power thermal imager is disclosed. In one embodiment, the thermal imager comprises a cross-bar architecture having a plurality of horizontal lines each arranged in a row, a plurality of vertical lines each arranged in a column, and a plurality of cross-points each formed at an intersection between one of the plurality of horizontal lines and one of the plurality of vertical lines; and a plurality of tunnel junction structures each located at one of the plurality cross-points, each tunnel junction structure including a first metal layer disposed over one of the plurality of vertical lines, an insulator layer disposed over the first metal layer, and a second metal layer disposed over the insulator layer and underneath one of the plurality of horizontal lines.Type: ApplicationFiled: June 11, 2013Publication date: December 11, 2014Inventors: Kota V R M Murali, Karthik Venkataraman
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Patent number: 8896035Abstract: Disclosed is a metal oxide semiconductor field effect transistor (MOSFET) having phase transition material incorporated into one or more components and an associated method. The MOSFET can comprise an asymmetric gate electrode having a phase transition material section (e.g., a chromium or titanium-doped vanadium dioxide (VO2) section) above the drain-side of the channel region. Additionally or alternatively, the MOSFET can comprise source and drain contact landing pads comprising different phase transition materials (e.g., un-doped VO2 and chromium or titanium-doped VO2, respectively). In any case, the phase transition material(s) are pre-selected so as to be insulative when the MOSFET is in the OFF state and the voltage difference between the drain region and the source region (VDS) is high in order to minimize leakage current and so as to be conductive when the MOSFET is in the ON state and VDS is high in order to maintain drive current.Type: GrantFiled: October 22, 2012Date of Patent: November 25, 2014Assignee: International Business Machines CorporationInventors: Kota V. R. M. Murali, Edward J. Nowak, Stuart P. Parkin
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Patent number: 8883371Abstract: Hydrogen storage materials are provided that may be capable of a hydrogenated state and dehydrogenated state. The hydrogen storage material comprises a plurality of hydrogen storage molecular units. Each hydrogen storage molecular unit comprises a transition metal bonded to one or more elements from period 2 of the periodic table, wherein the hydrogen storage material includes at least 6.5% molecular hydrogen by weight when in the hydrogenated state and is stable at temperatures below about 200° C. and at pressures of about 1 atm and below. The hydrogen storage materials may be used in conjunction with fuel cells in portable electronic devices.Type: GrantFiled: October 16, 2007Date of Patent: November 11, 2014Assignee: Motorola Mobility LLCInventors: Joydeep Bhattacharjee, Kota V. R. M. Murali
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Publication number: 20140283616Abstract: A workfunction modulation-based sensor comprising a field-effect transistor (FET). The FET comprises a substrate, a gate dielectric, a metal gate, a source, a drain, and a layer of sensing material that is electrically connected to the metal gate. An electrical connection that connects to the source of the FET. An electrical connection that connects to the drain of the FET. An electrical connection that connects to the layer of sensing material. An environment that includes an adsorbate gas surrounding, at least a portion of, the layer of sensing material. Wherein the sensing material is adapted to adsorb, at least in part, the adsorbate gas. The amount of adsorbate gas adsorbed on the layer of sensing material modulates the workfunction of the FET such that the degree of adsorbate gas adsorption corresponds to one of the temperature or pressure associated with the environment of the FET.Type: ApplicationFiled: March 25, 2013Publication date: September 25, 2014Applicant: International Business Machines CorporationInventors: Balaji Jayaraman, Kota V. R. M. Murali, Edward J. Nowak, Ninad D. Sathaye, Rajesh Sathiyanarayanan
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Publication number: 20140117965Abstract: A system and method for providing power is disclosed. A variable direct current (DC) power source provides a variable DC voltage. A configurator dynamically converts the variable DC voltage to a selected DC voltage to provide the power. A set of switches combines the solar voltage with a substantially constant DC voltage. A control unit controls the set of switches and the configurator to provide the combined voltages at a selected voltage level.Type: ApplicationFiled: March 8, 2013Publication date: May 1, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Shankar KM, William P. Kostenko, Anand D. Meshram, Kota V R M Murali, Roger R. Schmidt
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Publication number: 20140117761Abstract: A system and method for providing power is disclosed. A variable direct current (DC) power source provides a variable DC voltage. A configurator dynamically converts the variable DC voltage to a selected DC voltage to provide the power. A set of switches combines the solar voltage with a substantially constant DC voltage. A control unit controls the set of switches and the configurator to provide the combined voltages at a selected voltage level.Type: ApplicationFiled: October 26, 2012Publication date: May 1, 2014Applicant: International Business Machines CorporationInventors: Shankar KM, William P. Kostenko, Anand D. Meshram, Kota V. R. M. Murali, Roger R. Schmidt
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Publication number: 20140110765Abstract: Disclosed is a metal oxide semiconductor field effect transistor (MOSFET) having phase transition material incorporated into one or more components and an associated method. The MOSFET can comprise an asymmetric gate electrode having a phase transition material section (e.g., a chromium or titanium-doped vanadium dioxide (VO2) section) above the drain-side of the channel region. Additionally or alternatively, the MOSFET can comprise source and drain contact landing pads comprising different phase transition materials (e.g., un-doped VO2 and chromium or titanium-doped VO2, respectively). In any case, the phase transition material(s) are pre-selected so as to be insulative when the MOSFET is in the OFF state and the voltage difference between the drain region and the source region (VDS) is high in order to minimize leakage current and so as to be conductive when the MOSFET is in the ON state and VDS is high in order to maintain drive current.Type: ApplicationFiled: October 22, 2012Publication date: April 24, 2014Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Kota V. R. M. Murali, Edward J. Nowak, Stuart P. Parkin
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Publication number: 20130228872Abstract: A stack of a gate dielectric layer and a workfunction material layer are deposited over a plurality of semiconductor material portions, which can be a plurality of semiconductor fins or a plurality of active regions in a semiconductor substrate. A first gate conductor material applying a first stress is formed on a first portion of the workfunction material layer located on a first semiconductor material portion, and a second gate conductor material applying a second stress is formed on a second portion of the workfunction material layer located on a second semiconductor material portion. The first and second stresses are different in at least one of polarity and magnitude, thereby inducing different strains in the first and second portions of the workfunction material layer. The different strains cause the workfunction shift differently in the first and second portions of the workfunction material layer, thereby providing devices having multiple different workfunctions.Type: ApplicationFiled: March 1, 2012Publication date: September 5, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mohit Bajaj, Kota V.R.M. Murali, Rahul Nayak, Edward J. Nowak, Rajan K. Pandey
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Patent number: 8450792Abstract: Gate induced drain leakage in a tunnel field effect transistor is reduced while drive current is increased by orienting adjacent semiconductor bodies, based on their respective crystal orientations or axes, to optimize band-to-band tunneling at junctions. Maximizing band-to-band tunneling at a source-channel junction increases drive current, while minimizing band-to-band tunneling at a channel-drain junction decreases GIDL. GIDL can be reduced by an order of magnitude in an embodiment. Power consumption for a given frequency can also be reduced by an order of magnitude.Type: GrantFiled: April 8, 2011Date of Patent: May 28, 2013Assignee: International Business Machines CorporationInventors: Mohit Bajaj, Kota V. R. M. Murali, Edward J. Nowak, Rajan K. Pandey
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Publication number: 20130087856Abstract: A CMOS structure is formed on a semiconductor substrate that includes first and second regions having an nFET and a pFET respectively formed thereon. Each nFET and pFET device is provided with a gate, a source and drain, and a channel formed on the substrate. A high permittivity dielectric layer formed on top of the channel is superimposed to the permittivity dielectric layer. The pFET gate includes a thick metal nitride alloy layer or rich metal nitride alloy or carbon metal nitride layer that provides a controlled WF. Superimposed to the permittivity dielectric layer, the nFET gate is provided with a thin metal nitride alloy layer, enabling to control the WF. A metal deposition is formed on top of the respective nitride layers. The gate last approach characterized by having a high thermal budget smaller than 500° C. used for post metal deposition, following the dopant activation anneal.Type: ApplicationFiled: October 5, 2011Publication date: April 11, 2013Applicant: International Business Machines CorporationInventors: Claude Ortolland, Unoh Kwon, Kota V.R.M. Murali, Edward J. Nowak, Rajan Kumar Pandey
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Publication number: 20120256248Abstract: Gate induced drain leakage in a tunnel field effect transistor is reduced while drive current is increased by orienting adjacent semiconductor bodies, based on their respective crystal orientations or axes, to optimize band-to-band tunneling at junctions. Maximizing band-to-band tunneling at a source-channel junction increases drive current, while minimizing band-to-band tunneling at a channel-drain junction decreases GIDL. GIDL can be reduced by an order of magnitude in an embodiment. Power consumption for a given frequency can also be reduced by an order of magnitude.Type: ApplicationFiled: April 8, 2011Publication date: October 11, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mohit Bajaj, Kota V.R.M. Murali, Edward J. Nowak, Rajan K. Pandey
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Publication number: 20090098423Abstract: Hydrogen storage materials are provided that may be capable of a hydrogenated state and dehydrogenated state. The hydrogen storage material comprises a plurality of hydrogen storage molecular units. Each hydrogen storage molecular unit comprises a transition metal bonded to one or more elements from period 2 of the periodic table, wherein the hydrogen storage material includes at least 6.5% molecular hydrogen by weight when in the hydrogenated state and is stable at temperatures below about 200° C. and at pressures of about 1 atm and below. The hydrogen storage materials may be used in conjunction with fuel cells in portable electronic devices.Type: ApplicationFiled: October 16, 2007Publication date: April 16, 2009Applicant: MOTOROLA, INC.Inventors: Joydeep Bhattacharjee, Kota V.R. M. Murali
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Patent number: 7453412Abstract: A communication device (310) is provided that includes a nano-sized RF antenna (100) having low power consumption and wide-range frequency spectrum based on bottom-up nanotechnology. The antenna (100) includes an insulator layer (110) positioned between a free magnetic layer (112) and a fixed magnetic layer (108). A DC voltage source (124) is coupled to the free magnetic layer (112) and the fixed magnetic layer (108) for providing a current (118) therethrough. A detector (126) is coupled between the antenna (100) and the DC voltage source (124) for detecting a change in the current (118) in response to a radiated signal being received by the antenna (100) which causes a change in the spin on electrons in the free magnetic layer (112).Type: GrantFiled: March 26, 2007Date of Patent: November 18, 2008Assignee: Motorola, Inc.Inventors: Kota V R M Murali, Steven J. Franson
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Publication number: 20080238779Abstract: A communication device (310) is provided that includes a nano-sized RF antenna (100) having low power consumption and wide-range frequency spectrum based on bottom-up nanotechnology. The antenna (100) includes an insulator layer (110) positioned between a free magnetic layer (112) and a fixed magnetic layer (108). A DC voltage source (124) is coupled to the free magnetic layer (112) and the fixed magnetic layer (108) for providing a current (118) therethrough. A detector (126) is coupled between the antenna (100) and the DC voltage source (124) for detecting a change in the current (118) in response to a radiated signal being received by the antenna (100) which causes a change in the spin on electrons in the free magnetic layer (112).Type: ApplicationFiled: March 26, 2007Publication date: October 2, 2008Applicant: MOTOROLA, INC.Inventors: Kota V. R. M. Murali, Steven J. Franson