Abstract: To reduce power consumption of a processing device including a processor and a main memory in the processor. The main memory includes not only a volatile memory such as a DRAM but also a nonvolatile memory. The processor monitors access requirements to the main memory. The processor determines on the basis of the monitoring results whether the volatile memory or the nonvolatile memory operates mainly. In the case where the main memory changes from the volatile memory to the nonvolatile memory, part or all of data stored in the volatile memory is backed up to the nonvolatile memory. While the nonvolatile memory operates mainly, supply of power supply voltage to the volatile memory is stopped or power supply voltage to be supplied is lowered.

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

Abstract: Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every M rows. The shift register includes k first unit circuits connected in cascade. The demultiplexer includes k second unit circuits to each of which a signal is input from the first unit circuit and to each of which M gate lines are connected. The second unit circuit selects one or more wirings which output an input signal from the first unit circuit among M gate lines, and outputs the signal from the first unit circuit to the selected wiring(s). Since gate signals can be output from an output of a one-stage shift register to the M gate lines, the width of the shift register can be narrowed.

Abstract: To reduce power consumption of a display device including a scan line driver circuit formed using either n-channel transistors or p-channel transistors when the scan line driver circuit outputs, to one of two kinds of scan lines, inverted or substantially inverted signals of signals output to the other of the two kinds of scan lines. The display device includes a plurality of pulse output circuits each of which outputs a signal to one of two kinds of scan lines and a plurality of inverted pulse output circuits each of which outputs, to the other of the two kinds of scan lines, an inverted or substantially inverted signal output from the each of the pulse output circuits. The plurality of inverted pulse output circuits operate with signals used for the operation of the plurality of pulse output circuits. Thus, through current generated in the inverted pulse output circuits can be reduced.

Abstract: To provide a semiconductor device having a high aperture ratio and including a capacitor with a high charge capacitance. To provide a semiconductor device with a narrow bezel. A transistor over a substrate; a first conductive film over a surface over which a gate electrode of the transistor is provided; a second conductive film over a surface over which a pair of electrodes of the transistor is provided; and a first light-transmitting conductive film electrically connected to the first conductive film and the second conductive film are included. The second conductive film overlaps the first conductive film with a gate insulating film of the transistor laid between the second conductive film and the first conductive film.

Abstract: Transistors each include a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, and a source electrode and a drain electrode over the oxide semiconductor layer. A driver circuit portion includes first to third wirings formed in the same step as the gate electrode, fourth to sixth wirings formed in the same step as the source electrode and the drain electrode, a seventh wiring formed in the same step as a pixel electrode, a first region where the second wiring intersects with the fifth wiring, and a second region where the third wiring intersects with the sixth wiring. The first wiring is connected to the fourth wiring through the seventh wiring. A distance between the wirings in the second region is longer than that in the first region.

Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.

Abstract: To reduce crosstalk in sequential frame periods. An image signal is written to a pixel in a first sub-frame period. Then, just before a second sub-frame period, the light source is lit in accordance with the image signal written in the first sub-frame period and sequentially, the image signal is written in the second sub-frame period of the right eye frame period. Then, just before the next first sub-frame period, the light source is lit in accordance with the image signal in the third sub-frame period and sequentially, writing of the image signal is performed in the third sub-frame period of the right eye frame period.

Abstract: Disclosed is a liquid crystal display device and a driving method thereof for displaying an image, in which the polarity of a voltage applied to the liquid crystal element is inverted in a first frame period and a second frame period which are sequential. The voltage applied to the liquid crystal element is compensated in the case where images of the first frame period and the second frame period are judged as a still image as a result of comparison of the image of the first frame period with the image of the second frame period and the absolute value of the voltage applied to the liquid crystal element in the first frame period is different from that of the voltage applied to the liquid crystal element in the second frame period.

Abstract: Provided is a liquid crystal display device having a pixel including a transistor and a liquid crystal element and a protection circuit electrically connected to one of a source and a drain of the transistor through a data line. The protection circuit includes a first terminal supplied with a first power supply potential and a second terminal supplied with a second power supply potential higher than the first power supply potential. In a moving image display mode, an image signal is input from the data line to the liquid crystal element through the transistor, and the first power supply potential is set at the first potential. In a still image display mode, supply of the image signal is stopped, and the first power supply potential is set at the second potential. The second potential is substantially the same as the minimum value of the image signal.

Abstract: To provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit includes a plurality of transistors each including an oxide semiconductor. In accordance with operations of the pulse signal output circuit, the threshold voltage of the transistor including an oxide semiconductor is changed. A shift register including the pulse signal output circuit is formed. A pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

Abstract: Disclosed is a liquid crystal display device and a driving method thereof for displaying an image, in which the polarity of a voltage applied to the liquid crystal element is inverted in a first frame period and a second frame period which are sequential. The voltage applied to the liquid crystal element is compensated in the case where images of the first frame period and the second frame period are judged as a still image as a result of comparison of the image of the first frame period with the image of the second frame period and the absolute value of the voltage applied to the liquid crystal element in the first frame period is different from that of the voltage applied to the liquid crystal element in the second frame period.

Abstract: Provided is a liquid crystal display device having a pixel including a transistor and a liquid crystal element and a protection circuit electrically connected to one of a source and a drain of the transistor through a data line. The protection circuit includes a first terminal supplied with a first power supply potential and a second terminal supplied with a second power supply potential higher than the first power supply potential. In a moving image display mode, an image signal is input from the data line to the liquid crystal element through the transistor, and the first power supply potential is set at the first potential. In a still image display mode, supply of the image signal is stopped, and the first power supply potential is set at the second potential. The second potential is substantially the same as the minimum value of the image signal.

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

Abstract: A highly reliable semiconductor device in which a shift in the threshold voltage of a transistor due to deterioration is prevented is provided. The semiconductor device is formed using a sequential circuit including: a first transistor controlling the electrical connection between a first wiring and a second wiring; a second transistor and a third transistor in each of which a source and a drain are electrically connected to each other and which control the electrical connection between the second wiring and a third wiring; and a switch group controlling the electrical connection between a gate of the first transistor and the third wiring or a fourth wiring, the electrical connection between a gate of the second transistor and the third wiring or the fourth wiring, and the electrical connection between a gate of the third transistor and the third wiring or the fourth wiring in response to a control signal.

Abstract: An object of the present invention is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. In an embodiment of the pulse signal output circuit, a transistor has a source terminal or a drain terminal connected to a gate electrode of another transistor having a source terminal or a drain terminal forming an output terminal of the pulse signal output circuit, the channel length of the transistor being longer than the channel length of the other transistor. Thereby, the amount of a leakage current modifying the gate potential of the other transistor can be reduced, and a malfunction of the pulse signal output circuit can be prevented.

Abstract: A semiconductor device which has reduced power consumption and includes a selection transistor is provided. A semiconductor device in which the number of wirings and terminals for inputting a power supply potential is reduced and which operates at high speed is provided. A buffer circuit connected to a gate line connected to a gate of the selection transistor has a function of generating a potential higher than a high power supply potential by using the high power supply potential and outputs the potential depending on the selection signal. A bootstrap circuit boosts a high power supply potential that is input to an inverter that is the closest to an output side among a plurality of inverters included in a buffer circuit. Further, by providing a delay circuit in the buffer circuit, the bootstrap circuit starts to boost a potential at the timing later than the input of the selection signal.

Abstract: A liquid crystal display device capable of performing image signal writing and display with a field-sequential method in parallel, with a simple pixel configuration. In the liquid crystal display device, image signal writing to pixels in a row can be followed by image signal writing to pixels in a row which is separate from the row by at least two rows. Therefore, in the liquid crystal display device, image signal writing and lighting of the backlights are not performed per pixel portion but can be performed per unit region of the pixel portion. Accordingly, image signal writing and lighting of the backlight can be performed in parallel in the liquid crystal display device.

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

Abstract: Provided is a light-emitting device which can prevent appearance of an after-image after power on. Before or after supply of a power voltage applied to a light-emitting element is cut, a potential of a gate electrode of a transistor controlling the supply of the power voltage to the light-emitting element is initialized. Specifically, in the case where the transistor is n-channel type, the potential of the gate electrode is initialized so that a gate voltage is equal to or lower than a threshold voltage. In the case where the transistor is p-channel type, the potential of the gate electrode is initialized so that the gate voltage is equal to or higher than the threshold voltage.