Patents by Inventor Kouhei Toyotaka

Kouhei Toyotaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9954011
    Abstract: Provided is a display device with high resolution, high display quality, or high aperture ratio. A pixel includes three subpixels and is electrically connected to two gate lines. One of the gate lines is electrically connected to a gate of a transistor included in each of the two subpixels, and the other gate line is electrically connected to a gate of a transistor included in the other subpixel. Display elements of the three subpixels are arranged in the same direction. Three pixel electrodes of the three subpixels are arranged in the same direction.
    Type: Grant
    Filed: December 16, 2016
    Date of Patent: April 24, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Shishido, Hiroyuki Miyake, Kouhei Toyotaka, Makoto Kaneyasu
  • Patent number: 9939692
    Abstract: The following semiconductor device provides high reliability and a narrower frame width. The semiconductor device includes a driver circuit and a pixel portion. The driver circuit has a first transistor including a first gate and a second gate electrically connected to each other with a semiconductor film sandwiched therebetween, and a second transistor electrically connected to the first transistor. The pixel portion includes a third transistor, a liquid crystal element, and a capacitor. The liquid crystal element includes a first transparent conductive film electrically connected to the third transistor, a second conductive film, and a liquid crystal layer. The capacitor includes the first conductive film, a third transparent conductive film, and a nitride insulating film. The nitride insulating film is positioned between the first transparent conductive film and the third transparent conductive film, and positioned between the semiconductor film and the second gate of the first transistor.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: April 10, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hiroyuki Miyake, Kouhei Toyotaka, Masahiko Hayakawa, Daisuke Matsubayashi, Shinpei Matsuda
  • Publication number: 20180082645
    Abstract: A liquid crystal display device comprising a backlight and a pixel portion including first to 2n-th scan lines, wherein, in a first case of expressing a color image, first pixels controlled by the first to n-th scan lines are configured to express a first image using at least one of first to third hues supplied in a first rotating order, and second pixels controlled by the (n+1)-th to 2n-th scan lines are configured to express a second image using at least one of the first to third hues supplied in a second rotating order, wherein, in a second case of expressing a monochrome image, the first and second pixels controlled by the first to 2n-th scan lines are configured to express the monochrome image by external light reflected by the reflective pixel electrode, and wherein the first rotating order is different from the second rotating order.
    Type: Application
    Filed: November 21, 2017
    Publication date: March 22, 2018
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Kouhei TOYOTAKA
  • Publication number: 20180061919
    Abstract: A display device with high luminance and excellent white balance is provided. The display device includes a first display element, a second display element, a first transistor, and a second transistor. The first display element includes a light-emitting layer and is electrically connected to the first transistor. The first transistor includes a first semiconductor film, a first gate electrode and a second gate electrode facing each other with the first semiconductor film provided therebetween, and a first source electrode and a first drain electrode over and in contact with the first semiconductor film. The second gate electrode is electrically connected to the first source electrode or the first drain electrode. The second display element includes a light-emitting layer and is electrically connected to the second transistor.
    Type: Application
    Filed: August 21, 2017
    Publication date: March 1, 2018
    Inventors: Kouhei TOYOTAKA, Hiroyuki MIYAKE
  • Patent number: 9886905
    Abstract: A display device includes a plurality of pulse output circuits each of which outputs signals to one of the two kinds of scan lines and a plurality of inverted pulse output circuits each of which outputs, to the other of the two kinds of scan lines, inverted or substantially inverted signals of the signals output from the pulse output circuits. Each of the plurality of inverted pulse output circuits operates with at least two kinds of signals used for the operation of the plurality of pulse output circuits. Thus, through current generated in the inverted pulse output circuits can be reduced.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: February 6, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kouhei Toyotaka
  • Publication number: 20180026218
    Abstract: A display device that can be easily and more flexibly designed is provided. The display device includes a pixel circuit and a driver circuit in a display portion. The driver circuit includes a plurality of pulse output circuits. Each of the plurality of pulse output circuits has a function of driving a gate line. The pixel circuit is electrically connected to the gate line. Each of the plurality of pulse output circuits includes a first transistor. The pixel circuit includes a second transistor. A layer including the second transistor is over a layer including the first transistor, and the first transistor and the second transistor overlap with each other.
    Type: Application
    Filed: July 17, 2017
    Publication date: January 25, 2018
    Inventors: Hidetomo KOBAYASHI, Kouhei TOYOTAKA
  • Patent number: 9859300
    Abstract: To provide a light-emitting device or an input/output device with little unevenness in display luminance or high reliability and to provide an input/output device with high detection sensitivity, a light-emitting device is configured to include a first substrate, a light-emitting element over the first substrate, a first conductive layer over the light-emitting element, a first insulating layer over the first conductive layer, a second conductive layer over the first insulating layer, and a second substrate over the second conductive layer. The light-emitting element includes a first electrode over the first substrate, a layer containing a light-emitting organic compound over the first electrode, and a second electrode over the layer containing a light-emitting organic compound. The second electrode is electrically connected to the first and second conductive layers. The first conductive layer and the second electrode transmit light emitted from the light-emitting element.
    Type: Grant
    Filed: April 30, 2015
    Date of Patent: January 2, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daiki Nakamura, Hisao Ikeda, Kouhei Toyotaka
  • Patent number: 9851776
    Abstract: A low-power semiconductor device is provided. The semiconductor device includes a movable portion, a plurality of scan line driver circuits, and a control portion. The movable portion includes a plurality of regions driven by the plurality of scan line driver circuits. One of the scan line driver circuits is electrically connected to another one of the scan line driver circuits adjacent to the scan line driver circuit through a switch. The control portion has a function of supplying a start pulse to one scan line driver circuit selected from the plurality of scan line driver circuits. The movable portion can be folded between the plurality of regions.
    Type: Grant
    Filed: April 24, 2015
    Date of Patent: December 26, 2017
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Kouhei Toyotaka, Yuji Iwaki
  • Publication number: 20170358683
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Application
    Filed: August 8, 2017
    Publication date: December 14, 2017
    Inventors: Shunpei YAMAZAKI, Masashi TSUBUKU, Kosei NODA, Kouhei TOYOTAKA, Kazunori WATANABE, Hikaru HARADA
  • Patent number: 9817520
    Abstract: A novel transmissive imaging panel, a novel imaging panel with a display function, or a novel imaging device is provided. The imaging panel that includes a plurality of windows or pixels arranged in matrix, a photoelectric conversion element extending between the plurality of windows or pixels, and a sensor circuit supplied with a signal from the photoelectric conversion element has been devised.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: November 14, 2017
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takayuki Ikeda, Seiko Inoue, Hiroyuki Miyake, Kouhei Toyotaka, Takashi Nakagawa
  • Publication number: 20170263777
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.
    Type: Application
    Filed: May 31, 2017
    Publication date: September 14, 2017
    Inventors: Shunpei YAMAZAKI, Jun KOYAMA, Hiroyuki MIYAKE, Kei TAKAHASHI, Kouhei TOYOTAKA, Masashi TSUBUKU, Kosei NODA, Hideaki KUWABARA
  • Patent number: 9735285
    Abstract: An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: August 15, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masashi Tsubuku, Kosei Noda, Kouhei Toyotaka, Kazunori Watanabe, Hikaru Harada
  • Publication number: 20170213851
    Abstract: Provided is a display device with high resolution, high display quality, or high aperture ratio. A pixel includes three subpixels and is electrically connected to two gate lines. One of the gate lines is electrically connected to a gate of a transistor included in each of the two subpixels, and the other gate line is electrically connected to a gate of a transistor included in the other subpixel. Display elements of the three subpixels are arranged in the same direction. Three pixel electrodes of the three subpixels are arranged in the same direction.
    Type: Application
    Filed: December 16, 2016
    Publication date: July 27, 2017
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki SHISHIDO, Hiroyuki MIYAKE, Kouhei TOYOTAKA, Makoto KANEYASU
  • Publication number: 20170186777
    Abstract: A novel display device or the like in which a transistor connected to a scan line has small gate capacitance is provided. A novel display device or the like in which a scan line has low resistance is provided. A novel display device or the like in which pixels can be arranged with high density is provided. A novel display device or the like that can be manufactured without an increase in cost is provided. In a transistor including a first gate electrode and a second gate electrode, the first gate electrode is formed using a metal material with low resistance and the second gate electrode is formed using a metal oxide material that can reduce oxygen vacancies in an oxide semiconductor layer. The first gate electrode is connected to the scan line, and the second gate electrode is connected to a wiring to which a constant potential is supplied.
    Type: Application
    Filed: December 12, 2016
    Publication date: June 29, 2017
    Inventors: Kouhei TOYOTAKA, Kei TAKAHASHI, Hideaki SHISHIDO, Koji KUSUNOKI
  • Publication number: 20170170200
    Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.
    Type: Application
    Filed: December 1, 2016
    Publication date: June 15, 2017
    Inventors: Hisao IKEDA, Kouhei TOYOTAKA, Hideaki SHISHIDO, Hiroyuki MIYAKE, Kohei YOKOYAMA, Yasuhiro JINBO, Yoshitaka DOZEN, Takaaki NAGATA, Shinichi HIRASA
  • Patent number: 9673337
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: June 6, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
  • Patent number: 9666678
    Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: May 30, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake, Kei Takahashi, Kouhei Toyotaka, Masashi Tsubuku, Kosei Noda, Hideaki Kuwabara
  • Publication number: 20170148402
    Abstract: To provide a semiconductor device including a narrowed bezel obtained by designing a gate driver circuit. A gate driver of a display device includes a shift register unit, a demultiplexer circuit, and n signal lines. By connecting the n signal lines for transmitting clock signals to one stage of the shift register unit, (n?3) output signals can be output. The larger n becomes, the smaller the rate of signal lines for transmitting clock signals which do not contribute to output becomes; accordingly, the area of the shift register unit part is small compared to a conventional structure in which one stage of a shift register unit outputs one output signal. Therefore, the gate driver circuit can have a narrow bezel.
    Type: Application
    Filed: December 1, 2016
    Publication date: May 25, 2017
    Applicant: Semiconductor Energy Laboratory Co .. Ltd.
    Inventors: Hiroyuki Miyake, Kouhei TOYOTAKA, Shunpei YAMAZAKI
  • Publication number: 20170140719
    Abstract: A reflective region where display is performed with reflection of incident light through a liquid crystal layer and a transmissive region where display is performed by transmission of light from a backlight are provided, and the reflective mode and the transmissive mode are switched. In the case of displaying a full-color image, a pixel portion includes at least a first region and a second region, a plurality of lights of different hues are sequentially supplied to the first region according to a first order, and a plurality of lights of different hues are also sequentially supplied to the second region according to a second order which is different from the first order. In the transmissive mode, the reflective region is made to display black, so that decrease in contrast due to reflection of external light at the reflective region is prevented.
    Type: Application
    Filed: November 22, 2016
    Publication date: May 18, 2017
    Inventors: Kouhei TOYOTAKA, Ryo ARASAWA
  • Publication number: 20170131607
    Abstract: To provide a semiconductor device having a high aperture ratio and including a capacitor with a high charge capacitance. To provide a semiconductor device with a narrow bezel. A transistor over a substrate; a first conductive film over a surface over which a gate electrode of the transistor is provided; a second conductive film over a surface over which a pair of electrodes of the transistor is provided; and a first light-transmitting conductive film electrically connected to the first conductive film and the second conductive film are included. The second conductive film overlaps the first conductive film with a gate insulating film of the transistor laid between the second conductive film and the first conductive film.
    Type: Application
    Filed: January 19, 2017
    Publication date: May 11, 2017
    Inventors: Shunpei YAMAZAKI, Hiroyuki MIYAKE, Kouhei TOYOTAKA