Patents by Inventor Kouichi Yamada

Kouichi Yamada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6822895
    Abstract: A magnetic memory device capable of preventing the structure of an amplifier (sense amplifier) from complication and performing high-speed reading is obtained. This magnetic memory device comprises a memory cell consisting of a storage element exhibiting ferromagnetic resistance and a transistor connected to the storage element, a word line connected to a control terminal of the transistor, a bit line connected to a first end of the storage element through the transistor, a reference bit line connected in common for a plurality of bit liens and an amplifier connected to the bit line and the reference bit line. The magnetic memory device reads potential difference caused between the bit line and the reference bit line with the amplifier in data reading.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: November 23, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Kouichi Yamada
  • Patent number: 6793424
    Abstract: A cutter device comprising a fixed blade and a movable blade is disclosed, the movable blade being opposed to the fixed blade and adapted to be displaced in such a manner that an engaging position thereof with the fixed blade shifts continuously. The cutter device is constructed so that the movable blade can be attached to and detached from a body of the device. Thus, attachment and detachment of the movable blade can be effected without requiring any troublesome work.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: September 21, 2004
    Assignee: Toshiba Tec Kabushiki Kaisha
    Inventors: Kouichi Yamada, Hiroyuki Koyama, Katsumune Hayashi
  • Patent number: 6760244
    Abstract: A memory device capable of rewriting data with smaller current consumption than a case of feeding a rewrite current every bit line is obtained. This memory device including a first bit line and a second bit line having a current path independently of the first bit line, and renders write current paths of the first and second bit lines in common. Thus, the memory device can rewrite data with smaller current consumption as compared with the case of feeding the rewrite current every bit line.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: July 6, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Kouichi Yamada
  • Publication number: 20040096256
    Abstract: In a novel printer and a commodity information processing apparatus of the present invention, a printing section has a platen and a printhead located oppositely on both sides of the guide path; in the printing section, a cutter section has a stationary blade and a movable blade located oppositely on both sides of the guide path and cuts paper printed at the printing section by engaging the movable blade with the stationary blade. A first unit is located on one side of the guide path arranged inside the casing which can be separated into a first casing member and a second casing member, holding either one of the stationary blade and the movable blade in the cutter section; and a second unit located on the other side of the guide path has either one of the other platen and the other printhead and either one of the other stationary blade and the other movable blade.
    Type: Application
    Filed: September 11, 2003
    Publication date: May 20, 2004
    Applicant: Toshiba Tec Kabushiki Kaisha
    Inventors: Katsumune Hayashi, Hiroyuki Koyama, Kouichi Yamada
  • Publication number: 20040057771
    Abstract: A cutter device comprising a fixed blade and a movable blade is disclosed, the movable blade being opposed to the fixed blade and adapted to be displaced in such a manner that an engaging position thereof with the fixed blade shifts continuously. The cutter device is constructed so that the movable blade can be attached to and detached from a body of the device. Thus, attachment and detachment of the movable blade can be effected without requiring any troublesome work.
    Type: Application
    Filed: May 22, 2003
    Publication date: March 25, 2004
    Applicant: Toshiba Tec Kabushiki Kaisha
    Inventors: Kouichi Yamada, Hiroyuki Koyama, Katsumune Hayashi
  • Publication number: 20040055435
    Abstract: A recording paper is cut such that the movable-blade holding member 17 of a resin holding the movable blade 15, which is rotatably provided in a supporting section, is driven to rotate by a drive section so as to shift a cutting position formed between the cutting edge 14b of the stationary blade 14 and the cutting edge 15a of the movable blade 15. Thereby formation of a support axis in the movable blade 15 is not needed, as needed in conventional movable blades. In addition, because the movable-blade holding member 17 folding the movable blade 15 is of a resin, it can be die-formed.
    Type: Application
    Filed: September 11, 2003
    Publication date: March 25, 2004
    Applicant: Toshiba TEC Kabushiki Kaisha
    Inventors: Katsumune Hayashi, Hiroyuki Koyama, Kouichi Yamada
  • Publication number: 20030142527
    Abstract: A memory device capable of rewriting data with smaller current consumption than a case of feeding a rewrite current every bit line is obtained. This memory device comprises a first bit line and a second bit line having a current path independently of the first bit line, and renders write current paths of the first and second bit lines in common. Thus, the memory device can rewrite data with smaller current consumption as compared with the case of feeding the rewrite current every bit line.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 31, 2003
    Applicant: Sanyo Electric Co., Ltd
    Inventor: Kouichi Yamada
  • Publication number: 20030125995
    Abstract: When, for example, an acceptance processing unit 151 among acceptance processing units 151 to 15N performs acceptance processing of a reservation request, whether or not there is availability in a resource of a video chat device 23 which is assigned to the acceptance processing unit 151 is checked, and if there is availability in the resource, the use of the resource is reserved.
    Type: Application
    Filed: December 19, 2002
    Publication date: July 3, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyoshi Yamatari, Kouichi Yamada, Kazushi Oota, Gentaro Washio, Kouichi Itou, Takahiro Tsunoji, Kazuhiro Mori, Issei Nishimura, Mitsuru Kodama
  • Publication number: 20030112205
    Abstract: Prior to writing new luminance data in the n-th row pixel, as the (n−1)th scanning line turns high to write the luminance data in the (n−1)th row pixel, the bypass transistor and the initialization transistor of the n-th row pixel turn on. Hence, the luminance data having been set in the driving transistor is initialized, and the organic light emitting diode goes out.
    Type: Application
    Filed: December 16, 2002
    Publication date: June 19, 2003
    Applicant: Sanyo Electric Co., Ltd.
    Inventor: Kouichi Yamada
  • Patent number: 6549455
    Abstract: A magnetic memory device capable of preventing complication of the structure of an amplifier (sense amplifier) and enabling high-speed reading is provided. In this magnetic memory device, a memory cell is formed by a pair of first and second storage elements exhibiting a ferromagnetic tunnel effect and a pair of first and second transistors while an amplifier detects potential difference between a bit line and an inverted bit line connected to the pair of first and second storage elements. Thus, data can be readily read. Further, the value of a small current flowing to the bit line may not be detected dissimilarly to a case of forming the memory cell by a storage element exhibiting a ferromagnetic tunnel effect and a transistor. Consequently, the structure of the amplifier is not complicated. Further, no amplifier having a complicated structure may be employed, whereby high-speed reading is enabled.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: April 15, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Kouichi Yamada
  • Publication number: 20020191437
    Abstract: A magnetic memory device capable of preventing the structure of an amplifier (sense amplifier) from complication and performing high-speed reading is obtained. This magnetic memory device comprises a memory cell consisting of a storage element exhibiting ferromagnetic resistance and a transistor connected to the storage element, a word line connected to a control terminal of the transistor, a bit line connected to a first end of the storage element through the transistor, a reference bit line connected in common for a plurality of bit liens and an amplifier connected to the bit line and the reference bit line. The magnetic memory device reads potential difference caused between the bit line and the reference bit line with the amplifier in data reading.
    Type: Application
    Filed: May 30, 2002
    Publication date: December 19, 2002
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Kouichi Yamada
  • Patent number: 6424002
    Abstract: A memory cell in a simple structure having a long life, less variations in the structure and writing characteristic, and a higher operation speed, free from the problem of over-erasure, and permitting down-sizing is disclosed. Floating gate electrodes are arranged on a channel region with a gate insulating film therebetween. A control gate is formed on the floating gate electrodes with a tunnel insulating film therebetween. A central part of the control gate electrode is provided on the channel region to form a select gate. Source/drain regions having the select gate therebetween and the select gate form a select transistor. The coupling capacitance between each of the floating gate electrodes and the control gate electrode is set much larger than the coupling capacitance between each of the floating gate electrodes and the substrate.
    Type: Grant
    Filed: April 21, 1998
    Date of Patent: July 23, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Sadao Kondo, Kouichi Yamada, Hideaki Fujiwara
  • Patent number: 6400530
    Abstract: A method for manufacturing a magnetic head core of a complex magnetic head includes binding a first core material of a U-shaped cross section and a second core material of a flat plate shape to form a tubular core material having two bonded portions between the first and second core materials. Then a plurality of grooves are formed in the tubular core material across one of the bonded portions to form a plurality of track surfaces. The grooves are then filled with a fused glass material, and the other of the bonded portions is removed to form a substantially U-shaped core block having a plurality of track surfaces separated by the glass-filled grooves. The U-shaped core block is then sliced along each of the grooves to obtain a plurality of magnetic head cores. A complex magnetic head manufactured by the method is also disclosed.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: June 4, 2002
    Assignee: Mitsubishi Denki K.K.
    Inventors: Hirofumi Ouchi, Toshihisa Obuse, Yoshio Kasuga, Tatsunori Hibara, Masao Kouhashi, Kouichi Yamada, Seiichi Handa, Hiromasa Ishii, Seiichi Watanabe
  • Publication number: 20020062335
    Abstract: In a point-to-multipoint system, the first communication processing apparatus (3) generates a signal (SG1) to inquire of the second communication processing apparatus (4-2) about languages used in the second terminal (2-A-2-1) and transmits the signal (SG1) to the second communication processing apparatus (4-2), when the first communication processing apparatus (3) receives from the broadcast terminal (1) a request signal (SG0) to perform a broadcast communication between the broadcast terminal (1) and the second terminal (2-A-2-1). The second communication processing apparatus (4-2) generates a second signal (SG2) which includes data indicating language which is used in the second terminal (2-A-2-1) and transmits the second signal (SG2) to the first communication processing apparatus (3), when the second communication processing apparatus (4-2) receives the first signal (SG1) from the first communication processing apparatus (3).
    Type: Application
    Filed: October 18, 2001
    Publication date: May 23, 2002
    Applicant: NEC Corporation
    Inventor: Kouichi Yamada
  • Publication number: 20020054500
    Abstract: A magnetic memory device capable of preventing complication of the structure of an amplifier (sense amplifier) and enabling high-speed reading is provided. In this magnetic memory device, a memory cell is formed by a pair of first and second storage elements exhibiting a ferromagnetic tunnel effect and a pair of first and second transistors while an amplifier detects potential difference between a bit line and an inverted bit line connected to the pair of first and second storage elements. Thus, data can be readily read. Further, the value of a small current flowing to the bit line may not be detected dissimilarly to a case of forming the memory cell by a storage element exhibiting a ferromagnetic tunnel effect and a transistor. Consequently, the structure of the amplifier is not complicated. Further, no amplifier having a complicated structure may be employed, whereby high-speed reading is enabled.
    Type: Application
    Filed: November 6, 2001
    Publication date: May 9, 2002
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Kouichi Yamada
  • Publication number: 20020040481
    Abstract: The digital broadcast receiving apparatus according to the present invention includes a tuning unit for outputting normal image data for performing a normal reproduction operation corresponding to a user selected channel, a memory unit for outputting background image data for performing a background reproduction operation when the normal reproduction operation cannot be performed, a data selector for receiving the normal image data and the background image data and outputting one of the normal image data and the background image data, and an MPEG video decode unit for decoding image data output by the data selector to generate an image signal. The tuning unit successively receives the respective channel selected in the background independently of the user selection, and stores the background image data corresponding to the respective channels in the memory unit.
    Type: Application
    Filed: September 28, 2001
    Publication date: April 4, 2002
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Shigeyuki Okada, Kouichi Yamada, Mamoru Mukuno
  • Patent number: 6356916
    Abstract: A replica system and a method of producing a replica are provided for dealing with a database management system including both database programs and files. The system transmits and receives data between interfaces using a common data format, by including a replica manager which receives a replica instruction and determines an object to be read from a master database and an object to be written in a copy database, according to the replica instruction. By giving a command to the database management system, data associated with the object to be read is read from the database, and data format is converted into a standard data format. The received data is then converted to data format associated with the object to be written, and the converted data is finally stored in the copy database.
    Type: Grant
    Filed: July 2, 1999
    Date of Patent: March 12, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyoshi Yamatari, Kouichi Yamada, Noriko Ichikawa
  • Patent number: 6300587
    Abstract: A wire electrode for wire electro-discharge machining comprises a core, and a coating layer formed on an outer periphery of the core at least a surface layer of which contains copper. The coating layer comprises an alloy of copper and at least one element selected from the group consisting of Zn, Cs, Se, Te and Mg, with the copper content being about 55.5 wt % to about 75 wt %. The coating layer does not have an oxide film thereon other than a natural oxide film.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: October 9, 2001
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshihiro Nakai, Kouichi Yamada, Kenji Miyazaki, Shinji Inazawa, Shigeo Ezaki, Toshihiro Kume
  • Patent number: 6097161
    Abstract: In a charge pump type booster circuit, a capacitance coupling is performed between each capacitor of a charge pump series and each capacitor of another charge pump series by an equalizer, and a discharge current of the capacitors of one charge pump series is used as a charging current for the capacitors of the other charge pump series. Thereafter, each capacitor in each charge pump series is subjected to a generally high or low potential coupling by a driver circuit. As a result, the sum of charge/discharge currents of the capacitors in each charge pump series can be half as much as compared to when a single charge pump type booster circuit is provided. Even when a number n of stages of the charge pump series is increased, the power consumption can be reduced.
    Type: Grant
    Filed: April 8, 1999
    Date of Patent: August 1, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yoh Takano, Kouichi Yamada
  • Patent number: 6097059
    Abstract: A memory cell including source-drain regions, a channel region, floating gate electrodes, and a control gate electrode. The floating gate electrodes are placed next to each other over the channel region on a gate insulating layer. The control gate electrode is located over the floating gate electrodes on an insulating layer and an insulating layer, both layers being formed by a LOCOS method. Protuberances are formed on the upper corners of the floating gate electrodes by the insulating layer. A central portion of the control gate electrode is laid over the channel region on insulating layers, to form a selecting gate. A selecting transistor comprises this selecting gate between both the source-drain regions.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: August 1, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Kouichi Yamada