Patents by Inventor Kramadhati V. Ravi

Kramadhati V. Ravi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7071552
    Abstract: An apparatus includes an integrated circuit (IC) die having a substrate formed of a first semiconductor material and a cooling device form of a second semiconductor material. The cooling device is directly mounted to the substrate of the IC die.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: July 4, 2006
    Assignee: Intel Corporation
    Inventors: Kramadhati V. Ravi, Ravi S. Prasher, Gregory M. Chrysler
  • Patent number: 7041993
    Abstract: Erosion-resistive coatings are provided on critical plasma-facing surfaces of an electrical gas plasma head for an EUV source. The erosion-resistive coatings comprise diamond and diamond-like materials deposited onto the critical plasma-facing surfaces. A pure diamond coating is deposited onto the plasma exposed insulator surfaces using, for example, a chemical vapor deposition processes. The diamond coating is made conductive by selective doping with p-type material, such as, but not limited to, boron and graphite.
    Type: Grant
    Filed: August 18, 2004
    Date of Patent: May 9, 2006
    Assignee: Intel Corporation
    Inventors: Manish Chandhok, Kramadhati V. Ravi, Robert Bristol, Melissa Shell
  • Patent number: 6987028
    Abstract: A method of fabricating a microelectronic die is provided. Transistors are formed in and on a semiconductor substrate. A channel of each transistor is stressed after the transistors are manufactured by first forming a diamond intermediate substrate at an elevated temperature on a handle substrate, allowing the intermediate substrate and the handle substrate to cool, and then removing the handle substrate. The intermediate substrate has a lower coefficient of thermal expansion than the handle substrate, so that the intermediate substrate tends to bow when the handle substrate is removed. Such bowing creates a tensile stress, which translates into a biaxial strain in channels of the transistors. Excessive bowing is counteracted with a compensating polysilicon layer formed at an elevated temperature and having a higher CTE on a side of the diamond intermediate substrate.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: January 17, 2006
    Assignee: Intel Corporation
    Inventor: Kramadhati V. Ravi
  • Patent number: 6982133
    Abstract: Damage-resistant coatings are provided on radiation-exposed surfaces of EUV lithographic components. The diamond coating provides resistance to particle impingement, cleaning processes, and degradation due to high temperatures. The diamond coating is beneficial when deposited on the reflecting surface of an EUV Si/Mo multilayer mirror, grazing collector incidence mirror, the reflecting surface of an EUV Si/Mo multilayer reflective mask, and radiation-exposed surfaces of EUV debris shield. The diamond coating provides longer lasting EUV components.
    Type: Grant
    Filed: December 21, 2002
    Date of Patent: January 3, 2006
    Assignee: Intel Corporation
    Inventors: Manish Chandhok, Kramadhati V. Ravi
  • Patent number: 6964880
    Abstract: A method of forming a strained silicon device and structures formed thereby is described. That method comprises forming a polysilicon layer on a first and second side of a substantially planar diamond coated silicon wafer, wherein the second side of the substantially planar diamond coated silicon wafer comprises defects, bonding a silicon device layer to a first side of the polysilicon layer, and removing the defects from the second side of the substantially planar diamond coated silicon wafer, wherein a tensile strain in the silicon device layer is induced that increases the electron mobility of the strained silicon device layer.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: November 15, 2005
    Assignee: Intel Corporation
    Inventor: Kramadhati V. Ravi
  • Patent number: 6940096
    Abstract: A double gate silicon over insulator transistor may be formed wherein the bottom gate electrode is formed of a doped diamond film. The doped diamond film may be formed in the process of semiconductor manufacture resulting in an embedded electrode. The diamond film may be advantageous as a heat spreader.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: September 6, 2005
    Assignee: Intel Corporation
    Inventor: Kramadhati V. Ravi
  • Patent number: 6936497
    Abstract: A process is described whereby a wafer is manufactured, a die from the wafer, and an electronic assembly including the die. A thin diamond layer is formed on a sacrificial wafer, and an integrated circuit is then formed on the thin diamond layer. The sacrificial wafer is then removed to expose the thin diamond layer. The resulting combination wafer is subsequently diced into individual dies. Each die has an exposed diamond layer forming the majority of the die and serving to conduct heat from the integrated circuit to a backside of the die, from where the heat can convect or be conducted away from the die.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: August 30, 2005
    Assignee: Intel Corporation
    Inventors: Kramadhati V. Ravi, Gregory M. Chrysler
  • Patent number: 6924170
    Abstract: An electronic device includes a die further having a first major surface, and a second major surface. The electronic device also includes a plurality of connectors associated with the first major surface of the die, and an integrated heat spreader in thermally conductive relation with the second major surface of the die. The integrated heat spreader also has a layer of silicon, and a layer of diamond attached to the layer of silicon. The first major surface of the die attached to a printed circuit board. A method for forming a heat dissipating device includes placing a layer of diamond on a silicon substrate, and thinning the silicon substrate. The substrate is diced to form a plurality of heat dissipating devices sized to form a thermally conductive connection to a die. A surface of the silicon substrate is placed in thermal communication with a source of heat.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: August 2, 2005
    Assignee: Intel Corporation
    Inventors: Kramadhati V. Ravi, James G. Maveety
  • Patent number: 6921706
    Abstract: Processes are described whereby a wafer is manufactured, a die from the wafer, and an electronic assembly including the die. The die has a diamond layer which primarily serves to spread heat from hot spots of an integrated circuit in the die.
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: July 26, 2005
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, Abhay A. Watwe, Sairam Agraharam, Kramadhati V. Ravi, Michael C. Garner
  • Patent number: 6847044
    Abstract: A diamond insulator collar and methods for fabricating a diamond insulator collar for electrical discharge gas plasma EUV source. The insulating collar is positioned at the base of the central electrode in the pre-ionization region of the plasma head. The insulating collar prevents electrical shorting between the outer electrode and the central electrode in this region. In one embodiment of a method for providing a wire mesh-reinforced diamond insulator collar, a mandrel is provided that replicates the shape of the base of the central electrode. A wire mesh is wrapped around the mandrel conforming to the shape of the mandrel. The wire mesh is coated with electrically insulating diamond using known plasma enhanced chemical vapor deposition (CVD) techniques to form a non-porous coating. The mandrel is removed from the diamond-coated wire mesh providing a porous-free wire-reinforced diamond insulator collar. Embodiments of non-wire reinforced collars are presented.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: January 25, 2005
    Assignee: Intel Corporation
    Inventors: Bryan J. Rice, Kramadhati V. Ravi
  • Publication number: 20040266055
    Abstract: A method of forming a strained silicon device and structures formed thereby is described. That method comprises forming a polysilicon layer on a first and second side of a substantially planar diamond coated silicon wafer, wherein the second side of the substantially planar diamond coated silicon wafer comprises defects, bonding a silicon device layer to a first side of the polysilicon layer, and removing the defects from the second side of the substantially planar diamond coated silicon wafer, wherein a tensile strain in the silicon device layer is induced that increases the electron mobility of the strained silicon device layer.
    Type: Application
    Filed: June 27, 2003
    Publication date: December 30, 2004
    Inventor: Kramadhati V. Ravi
  • Publication number: 20040266056
    Abstract: An electronic device includes a die further having a first major surface, and a second major surface. The electronic device also includes a plurality of connectors associated with the first major surface of the die, and an integrated heat spreader in thermally conductive relation with the second major surface of the die. The integrated heat spreader also has a layer of silicon, and a layer of diamond attached to the layer of silicon. The first major surface of the die attached to a printed circuit board. A method for forming a heat dissipating device includes placing a layer of diamond on a silicon substrate, and thinning the silicon substrate. The substrate is diced to form a plurality of heat dissipating devices sized to form a thermally conductive connection to a die. A surface of the silicon substrate is placed in thermal communication with a source of heat.
    Type: Application
    Filed: June 30, 2003
    Publication date: December 30, 2004
    Inventors: Kramadhati V. Ravi, James G. Maveety
  • Patent number: 6830813
    Abstract: Electronic apparatus having a heat transfer/stress-reducing layer combined with a device layer and methods of fabricating such electronic apparatus provide a means for incorporating a heat transfer layer in an integrated circuit. A structure with a diamond layer incorporated beneath a device layer provides a heat transfer layer for the structure. In an embodiment, a compliant layer is formed between a diamond layer and a substrate to provide stress reduction. In another embodiment, a diamond layer is formed as a layer of islands of diamond from nucleation centers to provide stress reduction.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: December 14, 2004
    Assignee: Intel Corporation
    Inventor: Kramadhati V. Ravi
  • Patent number: 6809328
    Abstract: Erosion-resistive coatings are provided on critical plasma-facing surfaces of an electrical gas plasma head for an EUV source. The erosion-resistive coatings comprise diamond and diamond-like materials deposited onto the critical plasma-facing surfaces. A pure diamond coating is deposited onto the plasma exposed insulator surfaces using, for example, a chemical vapor deposition processes. The diamond coating is made conductive by selective doping with p-type material, such as, but not limited to, boron and graphite.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: October 26, 2004
    Assignee: Intel Corporation
    Inventors: Manish Chandhok, Kramadhati V. Ravi, Robert Bristol, Melissa Shell
  • Publication number: 20040191933
    Abstract: Techniques for local and selective thinning of silicon using a combination of real time metrology for film thickness measurement accompanied by local etching of the silicon to thin the silicon to the desired value. Etching is accomplished using a miniature plasma etcher with activated etch gases. The etch tool and the metrology tool are stepped across the wafer surface to achieve wafer level thinning of the top silicon.
    Type: Application
    Filed: April 13, 2004
    Publication date: September 30, 2004
    Inventor: Kramadhati V. Ravi
  • Publication number: 20040188686
    Abstract: An apparatus including a circuit substrate comprising a single crystal semiconductor layer having a smallest dimension reduced; and circuit devices formed in the single crystal layer.
    Type: Application
    Filed: April 13, 2004
    Publication date: September 30, 2004
    Inventor: Kramadhati V. Ravi
  • Publication number: 20040157386
    Abstract: Processes are described whereby a wafer is manufactured, a die from the wafer, and an electronic assembly including the die. The die has a diamond layer which primarily serves to spread heat from hot spots of an integrated circuit in the die.
    Type: Application
    Filed: February 6, 2004
    Publication date: August 12, 2004
    Inventors: Gregory M. Chrysler, Abhay A. Watwe, Sairam Agraharam, Kramadhati V. Ravi, C. Michael Garner
  • Patent number: 6770966
    Abstract: Processes are described whereby a wafer is manufactured, a die from the wafer, and an electronic assembly including the die. The die has a diamond layer which primarily serves to spread heat from hot spots of an integrated circuit in the die.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: August 3, 2004
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, Abhay A. Watwe, Sairam Agraharam, Kramadhati V. Ravi, Michael C. Garner
  • Publication number: 20040121561
    Abstract: A process is described whereby a wafer is manufactured, a die from the wafer, and an electronic assembly including the die. A thin diamond layer is formed on a sacrificial wafer, and an integrated circuit is then formed on the thin diamond layer. The sacrificial wafer is then removed to expose the thin diamond layer. The resulting combination wafer is subsequently diced into individual dies. Each die has an exposed diamond layer forming the majority of the die and serving to conduct heat from the integrated circuit to a backside of the die, from where the heat can convect or be conducted away from the die.
    Type: Application
    Filed: December 24, 2002
    Publication date: June 24, 2004
    Inventors: Kramadhati V. Ravi, Gregory M. Chrysler
  • Publication number: 20040110314
    Abstract: Techniques for local and selective thinning of silicon using a combination of real time metrology for film thickness measurement accompanied by local etching of the silicon to thin the silicon to the desired value. Etching is accomplished using a miniature plasma etcher with activated etch gases. The etch tool and the metrology tool are stepped across the wafer surface to achieve wafer level thinning of the top silicon.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 10, 2004
    Inventor: Kramadhati V. Ravi