Patents by Inventor Krishnan Srinivasan
Krishnan Srinivasan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12261777Abstract: Some embodiments of the invention provide a method for forwarding packets through an SD-WAN. To facilitate the forwarding of packets between first and second regions of the SD-WAN, said first and second regions having respective first and second hub routers forwarding packets between respective first and second sets of edge routers of respective first and second sets of sites of the first and second regions, the method directs (1) the first set of edge routers to establish connections to the first and second hub routers, and to use the first hub router as a next-hop to initiate communications with the second set of edge routers, and (2) the second set of edge routers to establish connections to the first and second hub routers, and to use the second hub router as a next-hop to initiate communications with the first set of edge routers.Type: GrantFiled: August 16, 2023Date of Patent: March 25, 2025Assignee: VMWare LLCInventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250080716Abstract: Some examples described herein provide for display image data reliability and safety, for example end-to-end safety methods, apparatuses, and systems for display systems. One example includes a method, including replacing video frames from input video streams with a set of test frames. The method further includes generating an alpha-blended video stream based on the set of test frames and the input video streams. The method further includes generating and inserting cyclic redundancy check (CRC) information for the set of test frames into secondary data packets associated with the alpha-blended video stream. The method further includes processing the set of test frames and video frames by a display controller to generate an output video stream. The method further includes performing an error detection procedure for the set of test frames using the CRC information to detect an error associated with the set of video frames.Type: ApplicationFiled: August 31, 2023Publication date: March 6, 2025Inventors: Yanran CHEN, Roger MAY, Sagheer AHMAD, Qingyi SHENG, Krishnan SRINIVASAN, Vishal SAGAR, Pramod BHARDWAJ, Yashu GOSAIN
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Publication number: 20250077541Abstract: Various aspects of the disclosure relate to automated conversion of time and/or date information from a first format to a second format and initiating computing functionality based on a successful conversion event. Mainframe computer hardware and software are provided for automatically converting differing time formats used across an enterprise computing network, automatically presenting times in multiple formats and/or translations of times across time zones for different regional computing systems of the enterprise computing network, and translating time formats based on an input and automatically pulling data records based on time zones of one or more of the involved computing systems and/or a location associated with the input source.Type: ApplicationFiled: August 29, 2023Publication date: March 6, 2025Applicant: Bank of America CorporationInventors: Kajuluri Venkata Ashok, Vikas Kumar Sahu, Avinash Nigudkar, Karthikeyan Krishnan, Yadava Krishnan Srinivasan
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Publication number: 20250077116Abstract: An integrated circuit device includes interconnect circuitry. The interconnect circuitry includes interleaving switch circuitries, network switch circuitries, and crossbar circuitries. The interleaving switch circuitries are coupled to requester devices. A first interleaving switch circuitry includes first ports. The first interleaving switch circuitry receives a first memory command, and outputs the first memory command via first communication lanes connected to a first port based on a memory address of the first memory command. The network switch circuitries are connected to the interleaving switch circuitries. A first network switch circuitry is connected to the first communication lanes and route the first memory command along the first communication lanes based on the memory address.Type: ApplicationFiled: August 31, 2023Publication date: March 6, 2025Inventors: Ygal ARBEL, Krishnan SRINIVASAN
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Patent number: 12244518Abstract: An integrated circuit (IC) includes a Network-on-Chip (NoC). The NoC includes a plurality of NoC master circuits, a plurality of NoC slave circuits, and a plurality of switches. The plurality of switches are interconnected and communicatively link the plurality of NoC master circuits with the plurality of NoC slave circuits. The plurality of switches are configured to receive data of different widths during operation and implement different operating modes for forwarding the data based on the different widths.Type: GrantFiled: May 13, 2022Date of Patent: March 4, 2025Assignee: Xilinx, Inc.Inventors: Krishnan Srinivasan, Sagheer Ahmad, Ygal Arbel, Aman Gupta
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Publication number: 20250068583Abstract: Embodiments herein describe using virtual destinations to route packets through a NoC. In one embodiment, instead of decoding an address into a target destination ID of the NoC, an ingress logic block assigns packets for multiple different targets the same virtual destination ID. For example, these targets may be in the same segment or location of the NoC. Thus, instead of the ingress logic block having to store entries in a lookup-table for each target, it can have a single entry for the virtual destination ID. The packets for the targets are then routed using the virtual destination ID to a decoder switch in the NoC. This decoder switch can then use the address in the packet (which is different than the destination ID) to select the appropriate target destination ID.Type: ApplicationFiled: August 25, 2023Publication date: February 27, 2025Inventors: Krishnan SRINIVASAN, Ygal ARBEL
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Patent number: 12237990Abstract: Some embodiments provide a method for dynamically deploying a managed forwarding element (MFE) in a software-defined wide-area network (SD-WAN) for a particular geographic region across which multiple SaaS applications is distributed. The method determines, based on flow patterns for multiple flows destined for the multiple SaaS applications distributed across the particular geographic region, that an additional MFE is needed for the particular geographic region. The method configures the additional MFE to deploy at a particular location in the particular geographic region for forwarding the multiple flows to the multiple SaaS applications. The method provides, to a particular set of MFEs that connect a set of branch sites to the SD-WAN, a set of forwarding rules to direct the particular set of MFEs to use the additional MFE for forwarding subsequent data messages belonging to the multiple flows to the multiple SaaS applications.Type: GrantFiled: June 20, 2023Date of Patent: February 25, 2025Assignee: VMware LLCInventors: Navaneeth Krishnan Ramaswamy, Arun Kumar Srinivasan
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Patent number: 12235782Abstract: Embodiments herein describe a multi-chip device that includes multiple ICs with interconnected NoCs. Embodiments herein provided address translation circuitry in the ICs. The address translation circuitry establish a hierarchy where traffic originating for a first IC that is intended for a destination on a second IC is first routed to the address translation circuitry on the second IC which then performs an address translation and inserts the traffic back on the NoC in the second IC but with a destination ID corresponding to the destination. In this manner, the IC can have additional address apertures only to route traffic to the address translation circuitry of the other ICs rather than having address apertures for every destination in the other ICs.Type: GrantFiled: December 21, 2022Date of Patent: February 25, 2025Assignee: XILINX, INC.Inventors: Aman Gupta, Krishnan Srinivasan, Ahmad R. Ansari, Sagheer Ahmad
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Publication number: 20250062982Abstract: Some embodiments of the invention provide a method for implementing an SD-WAN connecting multiple sites at multiple physical locations. The method is performed at a first hub router of the SD-WAN. The method establishes, with a first edge router located at a first site in a first region, a new connection for the first hub router to use to connect the first edge router to a second edge router of a second site in the first region. The method determines that a peer-connection notification regarding a set of other routers of which the first hub router has been notified has to be sent to the first edge router. The method sends the peer-connection notification to the first edge router for the first edge router to analyze in order to determine whether the first edge router needs to obtain routes associated with each other router in the set of other routers.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250063461Abstract: Some embodiments of the invention provide a method for interconnecting hub router clusters in an SD-WAN. The method is performed for each hub router of a first cluster and located in a first of multiple regions connected by the SD-WAN. The method establishes a connection with a respective hub router of a second cluster and located in a second of the multiple regions. The method sends, to a route reflector for the first region connected to the first cluster, a first peer-connection notification identifying the hub router as a next-hop for reaching the respective hub router. For each other hub router of the first cluster, the method receives from the route reflector a second peer-connection notification identifying the other hub router as a next-hop for reaching the other hub router's respective second cluster hub router for use in reaching edge routers connected to each other hub router's respective hub router.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250062990Abstract: Some embodiments of the invention provide a method for forwarding packets through an SD-WAN. To facilitate the forwarding of packets between first and second regions of the SD-WAN, said first and second regions having respective first and second hub routers forwarding packets between respective first and second sets of edge routers of respective first and second sets of sites of the first and second regions, the method directs (1) the first set of edge routers to establish connections to the first and second hub routers, and to use the first hub router as a next-hop to initiate communications with the second set of edge routers, and (2) the second set of edge routers to establish connections to the first and second hub routers, and to use the second hub router as a next-hop to initiate communications with the first set of edge routers.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250063470Abstract: Some embodiments of the invention provide a method for providing asymmetric route resolutions in an SD-WAN. The method is performed at a first edge router at a first site in a first region connected by the SD-WAN. From a first hub router of a first cluster, the method receives a flow sent by a second edge router at a second site in a second region via a first route that points to a next-hop second hub router of a second cluster. The method identifies a default second route from the first edge router to the second edge router pointing to a next-hop third hub router of the second cluster. When the first route includes secure overlay tunnels, and source addresses of the first packet flow and the first route match, the method uses the first route to send a return flow to the second edge router to ensure symmetric routing.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Applicant: VMware, Inc.Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250062979Abstract: Some embodiments of the invention provide a method for forwarding packets through an SD-WAN. The method is performed at a route reflector that advertises routes to facilitate forwarding of packets between first and second regions of the SD-WAN. The method advertises (1) to a first set of edge routers in the first region, a first route identifying a next-hop first hub router for initiating communications with a second set of edge routers in the second region, and (2) to the second set of edge routers, a second route identifying a next-hop second hub router for initiating communications with the first set of edge routers. When the second hub router loses connectivity to a first edge router of the first set of edge routers, the method advertises to the second set of edge routers a third route identifying the next-hop first hub router for initiating communications with the first edge router.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250063420Abstract: Some embodiments of the invention provide a method of detecting and remediating anomalies in an SD-WAN implemented by multiple forwarding elements (FEs) located at multiple sites connected by the SD-WAN. The method receives, from the multiple FEs, multiple sets of flow data associated with application traffic that traverses the multiple FEs. The method uses a first set of machine-trained processes to analyze the multiple sets of flow data in order to identify at least one anomaly associated with at least one particular FE in the multiple FEs. The method uses a second set of machine-trained processes to identify at least one remedial action for remediating the identified anomaly. The method implements the identified remedial action by directing an SD-WAN controller deployed in the SD-WAN to implement the identified remedial action.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250063468Abstract: Some embodiments of the invention provide a method for implementing an SD-WAN connecting multiple sites at multiple physical locations. The method is performed at a first route reflector for a first region of the SD-WAN. The method receives, from a hub router of the first region, a peer-connection notification regarding a newly connected first edge router located at a first site in a second region. The method determines that a routing table maintained by the first route reflector does not include routes of the first edge router and that the first route reflector does not have a direct connection to the first edge router. Based on said determining, the method requests routes of the first edge router from the hub router. After receiving from the hub router the requested routes of the first edge router, the method updates the routing table to include the routes of the first edge router.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250063469Abstract: Some embodiments of the invention provide a method for providing dynamic edge-to-edge support across multi-hops in an SD-WAN connecting multiple regions. The method is performed at a first route reflector for a first of the multiple regions. The method receives, from a first edge router at a first site of the first region, a first request for endpoint information associated with a second edge router at a second site of a second region. After determining that the first route reflector does not have a direct connection to the second edge router, the method identifies a next-hop hub router for reaching the second edge router. The method sends a second request to the identified next-hop hub router to request the identified next-hop hub router to forward endpoint information for the second edge router to the first edge router for use in establishing a dynamic edge-to-edge connection with the second edge router.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250062983Abstract: Some embodiments of the invention provide a method for using route filtering to relay routes between members of hub router clusters in an SD-WAN to reduce redundant route notifications to route reflectors (RRs) that advertise routes to hub routers in multiple regions connected by the SD-WAN and multiple edge routers at sites across the multiple regions. The method is performed at a first hub router of a first cluster. From a first edge router at a first site in a first region, the method receives routes of the first edge router. The method distributes the routes of the first edge router to a particular RR directly connected to the first cluster. The method distributes, to each other hub router of the first cluster, the routes of the first edge router along with an identifier that indicates that the routes should not be redistributed to the particular RR.Type: ApplicationFiled: August 16, 2023Publication date: February 20, 2025Inventors: Arun Kumar Srinivasan, Navaneeth Krishnan Ramaswamy, Sumit Mundhra, Saravanan Kandasamy, Balaji Shanmugam
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Publication number: 20250030500Abstract: Some examples described herein provide for interconnect in chiplet systems, for example system-level techniques for error correction in chip-to-chip interfaces. In an example, a method of error correction includes receiving, at a first chiplet, a data message via a set of interconnect, and transmitting a first control message that requests retransmission of the data message based on detecting an error associated with receiving the data message. The method also includes transmitting one or more instances of a second control message that indicates an idle operation at the first chiplet until the first chiplet receives a third control message that triggers an end of a retransmission mode. The method also includes transmitting a fourth control message frame indicating the end of the retransmission mode, and receiving a retransmission of the data message from the second chiplet.Type: ApplicationFiled: July 18, 2023Publication date: January 23, 2025Inventors: Millind MITTAL, Krishnan SRINIVASAN, Kenneth MA
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Patent number: 12174809Abstract: Systems, computer program products, and methods are described herein for determining application degradation using advanced computational models for data analysis and automated decision-making. The present disclosure is configured to receive one or more applications, wherein the one or more applications comprise one or more access paths; update the one or more access paths, wherein updating the one or more access paths comprises reconfiguring details associated with the access paths; create, in response to updating the one or more access paths, updated access paths; determine that the one or more updated access paths experience one or more application degradations; and implement one or more degradation solutions for the one or more application degradations to an artificial intelligence model.Type: GrantFiled: July 24, 2023Date of Patent: December 24, 2024Assignee: BANK OF AMERICA CORPORATIONInventors: Yadava Krishnan Srinivasan, Karthikeyan Krishnan, Vikas Kumar Sahu, Avinash Basavant Nigudkar, Param Jabbal, Muthuraj Kumaresan, Mukesh Kumar Jain
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Publication number: 20240411715Abstract: Embodiments herein describe using an adaptive chip-to-chip (C2C) interface to interconnect two chips, wherein the adaptive C2C interface includes circuitry for performing multiple different C2C protocols to communicate with the other chip. One or both of the chips in the C2C connection can include the adaptive C2C interface. During boot time, the adaptive C2C interface is configured to perform one of the different C2C protocols. During runtime, the chip then uses the selected C2C protocol to communicate with the other chip in the C2C connection.Type: ApplicationFiled: August 16, 2024Publication date: December 12, 2024Inventors: Krishnan SRINIVASAN, Sagheer AHMAD, Ygal ARBEL, Millind MITTAL