Abstract: Methods for product data management and corresponding systems and computer-readable mediums. The systems and methods include receiving a request for expanded details about an architecture element of a model from an application client, parsing the request to identify the expanded details of the architecture element, identifying a structure and configuration details of the model, configuring the model according to the structure and configuration details, traversing the model to collect the expanded details for the architecture element, packaging the expanded details into an application format for the client, and returning the expanded details.

Abstract: A platform for providing projections, predictions, and recommendations for casino and gaming environments. The platform leverages machine learning and cognitive computing. Through a natural language interface, the platform presents this information in a way which is natural and timely for casino operational executives to understand and act upon. The platform can optimize gaming machine performance casino floor performance based on various metrics that are predicted by the platform.

Abstract: A platform for providing projections, predictions, and recommendations for casino and gaming environments. The platform leverages machine learning and cognitive computing. Through a natural language interface, the platform presents this information in a way which is natural and timely for casino operational executives to understand and act upon. The platform can optimize gaming machine performance casino floor performance based on various metrics that are predicted by the platform.

Abstract: In one embodiment, a design tool for designing a system on chip (SoC) includes hardware mapping logic to automatically generate a channel mapping for a path between a first intellectual property (IP) logic of the SoC and a second IP logic of the SoC. The hardware mapping logic, based at least in part on user input of a source channel associated with the first IP logic, a sink channel associated with the second IP logic and at least one derivation parameter, is to generate the channel mapping according to one of a plurality of derivation algorithms. Other embodiments are described and claimed.

Abstract: In one embodiment, a design tool for designing a system on chip (SoC) includes hardware logic to generate one or more configuration files for a fabric of a SoC to be designed by the design tool. This logic is configured, based at least in part on user input, to generate the one or more configuration files, according to at least one of: automatic derivation of all parameters of the fabric, according to a first user selection; manual input by a user of at least some parameters of the fabric and automatic derivation of at least other parameters of the fabric, according to a second user selection; and manual input by the user of the all parameters of the fabric, according to a third user selection. Other embodiments are described and claimed.

Abstract: A platform for providing projections, predictions, and recommendations for casino and gaming environments. The platform leverages machine learning and cognitive computing. Through a natural language interface, the platform presents this information in a way which is natural and timely for casino operational executives to understand and act upon. The platform can optimize gaming machine performance casino floor performance based on various metrics that are predicted by the platform.

Abstract: In one embodiment, a design tool for designing a system on chip (SoC) includes hardware mapping logic to automatically generate a channel mapping for a path between a first intellectual property (IP) logic of the SoC and a second IP logic of the SoC. The hardware mapping logic, based at least in part on user input of a source channel associated with the first IP logic, a sink channel associated with the second IP logic and at least one derivation parameter, is to generate the channel mapping according to one of a plurality of derivation algorithms. Other embodiments are described and claimed.

Abstract: In one embodiment, a design tool for designing a system on chip (SoC) includes hardware logic to generate one or more configuration files for a fabric of a SoC to be designed by the design tool. This logic is configured, based at least in part on user input, to generate the one or more configuration files, according to at least one of: automatic derivation of all parameters of the fabric, according to a first user selection; manual input by a user of at least some parameters of the fabric and automatic derivation of at least other parameters of the fabric, according to a second user selection; and manual input by the user of the all parameters of the fabric, according to a third user selection. Other embodiments are described and claimed.

Abstract: A scalable data feed system is disclosed. The data feed system may be offered as a cloud service that can serve many enterprises or tenants that require data to be pulled from information sources such as FTP, POP3, databases, line of business systems, a topic subscription, or an RSS feed, and pushed the data to information sinks, such as SMTP, email, FTP, mobile phones, and other devices and services. A pull agent pumps data from pull sources and pushes the data out to push agent counterparts. The push agent transforms and sends the data in messages to push sink, such as FTP, SMTP, or a mobile device. Both the pull agent and the push agent services are implemented as replicated services over a structured overlay network for high availability that can serve multiple requests to pump out data from multiple pull sources and push the data to multiple information sinks.

Abstract: A scalable data feed system is disclosed. The data feed system may be offered as a cloud service that can serve many enterprises or tenants that require data to be pulled from information sources such as FTP, POP3, databases, line of business systems, a topic subscription, or an RSS feed, and pushed the data to information sinks, such as SMTP, email, FTP, mobile phones, and other devices and services. A pull agent pumps data from pull sources and pushes the data out to push agent counterparts. The push agent transforms and sends the data in messages to push sink, such as FTP, SMTP, or a mobile device. Both the pull agent and the push agent services are implemented as replicated services over a structured overlay network for high availability that can serve multiple requests to pump out data from multiple pull sources and push the data to multiple information sinks.

Abstract: Methods for product data management and corresponding systems and computer-readable mediums. The systems and methods include receiving a request for expanded details about an architecture element of a model from an application client, parsing the request to identify the expanded details of the architecture element, identifying a structure and configuration details of the model, configuring the model according to the structure and configuration details, traversing the model to collect the expanded details for the architecture element, packaging the expanded details into an application format for the client, and returning the expanded details.

Abstract: An apparatus having a first memory circuit, a plurality of arithmetic modules, and a plurality of second memory circuits. The first memory circuit may be configured to read or write data to or from a host. The plurality of arithmetic modules each may be configured to be enabled or disabled in response to control signals received from the first memory circuit. The plurality of second memory circuits may be configured to read or write data to or from the first memory circuit through a data exchange layer. The arithmetic modules provide cryptographic protection of the data.

Abstract: An apparatus having a first memory circuit, a plurality of arithmetic modules, and a plurality of second memory circuits. The first memory circuit may be configured to read or write data to or from a host. The plurality of arithmetic modules each may be configured to be enabled or disabled in response to control signals received from the first memory circuit. The plurality of second memory circuits may be configured to read or write data to or from the first memory circuit through a data exchange layer. The arithmetic modules provide cryptographic protection of the data.

Abstract: A method, apparatus, and system in which an integrated circuit comprises an initiator Intellectual Property (IP) core, a target IP core, an interconnect, and a tag and thread logic. The target IP core may include a memory coupled to the initiator IP core. Additionally, the interconnect can allow the integrated circuit to communicate transactions between one or more initiator Intellectual Property (IP) cores and one or more target IP cores coupled to the interconnect. A tag and thread logic can be configured to concurrently perform per-thread and per-tag memory access scheduling within a thread and across multiple threads such that the tag and thread logic manages tags and threads to allow for per-tag and per-thread scheduling of memory accesses requests from the initiator IP core out of order from an initial issue order of the memory accesses requests from the initiator IP core.

Abstract: According to example configurations, a translation quality assessment application (e.g., system) receives a set of text derived from a translation of an audio signal. The translation quality assessment application aligns and compares the received set of text to reference text to identify occurrence of speech-to-text translation errors in the set of text. For each of the errors, the translation quality assessment application identifies a type associated with the error and retrieves an appropriate weighted coefficient. For example, the translation quality assessment application produces a respective weighted value for each error based on the weighted coefficients. A magnitude of each of the weighted values varies depending on a type of the error that occurred during the translation. The translation quality assessment application utilizes the weighted values to generate a metric indicating a level of quality of the set of captioned text with respect to the set of reference text.

Abstract: Product data management systems, methods, and mediums. A method includes receiving PDM model and applying a template to the model. The method includes creating a description file based on the application of the template to the model. The method includes transferring the description file to a diagramming application. A diagram corresponding to the description file is created.

Abstract: Data transformation can be performed across various data structures and formats. Moreover, data transformation can be format agnostic. Output data of a second structure can be generated as a function of input data of a first structure and a transform independent of the format of input and output data. In one instance, the transform can be specified by way of a graphical representation and encoded in a form independent of input and output data formats. Subsequently, data transformation can be performed as a function of the transform and input data.

Abstract: A scalable data feed system is disclosed. The data feed system may be offered as a cloud service that can serve many enterprises or tenants that require data to be pulled from information sources such as FTP, POP3, databases, line of business systems, a topic subscription, or an RSS feed, and pushed the data to information sinks, such as SMTP, email, FTP, mobile phones, and other devices and services. A pull agent pumps data from pull sources and pushes the data out to push agent counterparts. The push agent transforms and sends the data in messages to push sink, such as FTP, SMTP, or a mobile device.

Abstract: Various methods and apparatus are described for a memory scheduler. The memory scheduler has a pipelined arbiter to determine which request will access the target memory core. Pipelining occurs in stages within the arbiter over a period of more than one clock cycle. The pipelined arbiter uses two or more weighting factors affecting an arbitration decision that are processed in parallel. A predictive scheduler in the memory scheduler uses data from a previous cycle to make the arbitration decision about a request during a current clock cycle in which the arbitration decision is made in order to increase overall system efficiency of requests being serviced in the integrated circuit.

Abstract: A method, apparatus, and system for providing layer concurrency connecting two or more master Intellectual Property cores to a Network on a Chip (NoC) for an integrated circuit is provided. An embodiment includes two masters connected using a common tightly coupled protocol to a first interface of an NoC. A protocol conversion unit can be coupled between the two or more masters and the NoC to convert a request in the tightly coupled protocol to a decoupled protocol that decouples request phasing from response phasing and then passes the request in the decoupled protocol format onto the NoC. The system also provides for arbitration amongst the two or more masters. Requests from the masters are still in the common tightly coupled protocol and are translated by the protocol conversion unit into a request in a decoupled protocol to enable out of order return of responses.