Patents by Inventor Kuan Cheng

Kuan Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9653450
    Abstract: An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, and at least a first doped region formed in the drain region. The source region and the drain region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The first doped region is electrically connected to a ground potential.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: May 16, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Yu Huang, Kuan-Cheng Su, Tien-Hao Tang, Ping-Jui Chen, Po-Ya Lai
  • Patent number: 9647090
    Abstract: The present disclosure provides a method forming a semiconductor device in accordance with some embodiments. The method includes receiving a substrate having a fin protruding through the substrate, wherein the fin is formed of a first semiconductor material, exposing the substrate in an environment including hydrogen radicals, thereby passivating the protruded fin using the hydrogen radicals, and epitaxially growing a cap layer of a second semiconductor material to cover the protruded fin.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: May 9, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Cheng Wang, Chien-Feng Lin, Jeng-Yang Pan, Keng-Chu Lin
  • Publication number: 20170125399
    Abstract: An electrostatic discharge (ESD) unit is described, including a first device, and a second device coupled to the first device in parallel. In an ESD event, the first device is turned on before the second device is turned on. The second device may be turned on by the turned-on first device to form an ESD path in the ESD event.
    Type: Application
    Filed: October 28, 2015
    Publication date: May 4, 2017
    Inventors: Chung-Yu Huang, Kuan-Cheng Su, Tien-Hao Tang, Ping-Jui Chen, Po-Ya Lai
  • Patent number: 9640524
    Abstract: An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, at least a first doped region formed in the source region, and at least a second doped region formed in the drain region. The source region, the drain region and the second doped region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The second doped region is electrically connected to the first doped region.
    Type: Grant
    Filed: October 27, 2015
    Date of Patent: May 2, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chung-Yu Huang, Kuan-Cheng Su, Tien-Hao Tang, Ping-Jui Chen, Po-Ya Lai
  • Publication number: 20170110446
    Abstract: An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, and at least a first doped region formed in the drain region. The source region and the drain region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The first doped region is electrically connected to a ground potential.
    Type: Application
    Filed: November 12, 2015
    Publication date: April 20, 2017
    Inventors: Chung-Yu Huang, Kuan-Cheng Su, Tien-Hao Tang, Ping-Jui Chen, Po-Ya Lai
  • Patent number: 9607977
    Abstract: An electrostatic discharge protection device includes an anode, a cathode, a negative voltage holding transistor and a positive voltage holding transistor. The anode is coupled to an input terminal, and the cathode is coupled to a ground. The negative voltage holding transistor includes an N-well. The positive voltage holding transistor includes an N-well. The N-well of the positive voltage holding transistor and the N-well of the negative voltage holding transistor are coupled together and are float. The negative voltage holding transistor and the positive voltage holding transistor are coupled between the anode and the cathode in a manner of back-to-back.
    Type: Grant
    Filed: October 23, 2015
    Date of Patent: March 28, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Li-Cih Wang, Mei-Ling Chao, Tien-Hao Tang, Kuan-Cheng Su
  • Publication number: 20170084604
    Abstract: A layout structure is provided. The layout structure includes a substrate, a gate conductive layer, a first doped region having a first conductivity, a second doped region having the first conductivity, and a third doped region having a second conductivity. The gate conductive layer is formed on the substrate. The first doped region the second doped region are formed in the substrate and located at two sides of the gate conductive layer. The third doped region is formed in the substrate and adjacent to the second doped region. The third doped region and the second doped region form a diode. The gate conductive layer, the first doped region, and the third doped region are connected to ground, and the second doped region is connected to an input/output pad.
    Type: Application
    Filed: September 22, 2015
    Publication date: March 23, 2017
    Inventors: Pei-Shan Tseng, Yu-Cheng Liao, Ping-Chen Chang, Tien-Hao Tang, Kuan-Cheng Su
  • Publication number: 20170084603
    Abstract: An ESD protection semiconductor device includes a substrate, a gate set formed on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, at least a first doped region formed in the source region, and at least a second doped region formed in the drain region. The source region, the drain region and the second doped region include a first conductivity type, and the first doped region includes a second conductivity type. The first conductivity type and the second conductivity type are complementary to each other. The second doped region is electrically connected to the first doped region.
    Type: Application
    Filed: October 27, 2015
    Publication date: March 23, 2017
    Inventors: Chung-Yu Huang, Kuan-Cheng Su, Tien-Hao Tang, Ping-Jui Chen, Po-Ya Lai
  • Publication number: 20170084602
    Abstract: An electrostatic discharge protection device includes an anode, a cathode, a negative voltage holding transistor and a positive voltage holding transistor. The anode is coupled to an input terminal, and the cathode is coupled to a ground. The negative voltage holding transistor includes an N-well. The positive voltage holding transistor includes an N-well. The N-well of the positive voltage holding transistor and the N-well of the negative voltage holding transistor are coupled together and are float. The negative voltage holding transistor and the positive voltage holding transistor are coupled between the anode and the cathode in a manner of back-to-back.
    Type: Application
    Filed: October 23, 2015
    Publication date: March 23, 2017
    Inventors: Li-Cih Wang, Mei-Ling Chao, Tien-Hao Tang, Kuan-Cheng Su
  • Publication number: 20170053798
    Abstract: An embodiment is a method including depositing a first flowable film over a substrate in a processing region, the first flowable film comprising silicon and nitrogen, curing the first flowable film in a first step at a first temperature with a first process gas and ultra-violet light, the first process gas including oxygen, curing the first flowable film in a second step at a second temperature with a second process gas and ultra-violet light, the second process gas being different than the first process gas, and annealing the cured first flowable film at a third temperature to convert the cured first flowable film into a silicon oxide film over the substrate.
    Type: Application
    Filed: August 21, 2015
    Publication date: February 23, 2017
    Inventors: Kuan-Cheng Wang, Chun-Hao Hsu, Han-Ti Hsiaw, Keng-Chu Lin
  • Patent number: 9564436
    Abstract: A semiconductor device is described, including a substrate including a first area and a second area, a first MOS element of a first conductivity type in the first area, and a second MOS element of the first conductivity type in the second area. The first area is closer to a pick-up region of the substrate than the second area. The substrate has a second conductivity type. The bottom depth of a first electrical conduction path in the substrate in the first area is smaller than that of a second electrical conduction path in the substrate in the second area.
    Type: Grant
    Filed: November 18, 2013
    Date of Patent: February 7, 2017
    Assignee: United Microelectronics Corp.
    Inventors: Yung-Ju Wen, Chang-Tzu Wang, Tien-Hao Tang, Kuan-Cheng Su
  • Patent number: 9559091
    Abstract: A method of manufacturing a fin diode structure includes providing a substrate, forming a doped well in said substrate, forming at least one doped region of first conductivity type or at least one doped region of second doped type in said doped well, performing an etching process to said doped region of first conductivity type or said doped region of second conductivity type to form a plurality of fins on said doped region of first conductivity type or on said doped region of second conductivity type, forming shallow trench isolations between said fins, and performing a doping process to said fins to form fins of first conductivity type and fins of second conductivity type.
    Type: Grant
    Filed: June 21, 2015
    Date of Patent: January 31, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chang-Tzu Wang, Ping-Chen Chang, Tien-Hao Tang, Kuan-Cheng Su
  • Patent number: 9554434
    Abstract: A light-emitting diode driver includes a power switch, a logic unit and a pulse adjustment signal generator. The power switch is used to control a charging level of a light-emitting diode voltage terminal, and controlled to be turned on or off by a pulse-width modulation signal. The logic unit is coupled to a control terminal of the power switch, and used to generate a frequency control signal. The pulse adjustment signal generator is coupled to the logic unit, and used to generate an operational wave according to the frequency control signal and update the pulse-width modulation signal according to the operational wave. When the duty cycle of the pulse-width modulation signal is smaller than a pulse-width modulation threshold, the operational wave has a first frequency. When the duty cycle of the pulse-width modulation signal is larger than the pulse-width modulation threshold, the operational wave has a second frequency higher than the first frequency.
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: January 24, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Kuan-Cheng Chen, Yung-Hsu Lin
  • Publication number: 20160347571
    Abstract: A paper outputting mechanism includes a frame, a motor mounted to the frame, a paper supply tray assembly, a gear assembly, a paper pressing element, a blocking element and a plurality of elastic elements. A rear of the frame has a receiving room, a front of the frame has a slope connected with the receiving room. The paper supply tray assembly includes a first paper supply tray slidably mounted to the frame and a second paper supply tray placed on the first paper supply tray. A gear assembly is driven by the motor, the gear assembly drives the first and second paper supply tray to move frontward and rearward. The paper pressing element is up and down movably mounted to the frame and located over the slope. The blocking element is front and down slidably mounted to the frame and in front of the paper pressing element.
    Type: Application
    Filed: November 27, 2015
    Publication date: December 1, 2016
    Inventors: Kuan Cheng Huang, Yung Kai Chen
  • Publication number: 20160351558
    Abstract: A fin type ESD protection device includes at least one first fin, at least one second fin, and at least one gate structure. The first fin is disposed on a semiconductor substrate, and a source contact contacts the first fin. The second fin is disposed on the semiconductor substrate, and a drain contact contacts the second fin. The first fin and the second fin extend in a first direction respectively, and the first fin is separated from the second fin. The gate structure is disposed between the source contact and the drain contact. The first fin is separated from the drain contact, and the second fin is separated from the source contact.
    Type: Application
    Filed: May 3, 2016
    Publication date: December 1, 2016
    Inventors: Yu-Chun Chen, Ping-Chen Chang, Tien-Hao Tang, Kuan-Cheng Su
  • Patent number: 9488414
    Abstract: A crucible heating apparatus includes a crucible, a metal barrel around the crucible, a heating wire wound between the metal barrel and the crucible, a measuring unit for measuring the position of the liquid level of a material in the crucible and a controller, and the apparatus is characterized in that the heating wire includes at least two subsections arranged along the longitudinal direction, and the controller controls the heating power of each subsection respectively, thus dividing the crucible into at least two corresponding temperature control zones. In such a manner, by disposing a plurality of subsections of the heating wire and the corresponding temperature control zones of the crucible, the temperature of each position of the crucible is accurately controlled. A crucible heating method is also provided.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: November 8, 2016
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xindi Zhang, Kuan-Cheng Lee
  • Publication number: 20160294316
    Abstract: AC motor driving system and driving method thereof are provided. The driving system and method are capable of increasing power factor, adjusting waveform of the DC ripple voltage for increasing driving efficiency. The driving system is basically constructed by connecting three circuits. The first circuit is a three-phase full wave rectifying circuit and is used to transfer commercial electricity to a first DC voltage. Then, the second circuit is used to transfer the first DC voltage to a second DC voltage that ripples voltage thereof having a semi-sinusoidal waveform. The third circuit is an AC driving circuit, and receives the second AC voltage for driving the AC motor. Thereby, the driving efficiency can be increased. The capacitance used in the present disclosure has low capacitance value, thus the power factor can be increased, and usage time of the AC motor driving apparatus can also be increased.
    Type: Application
    Filed: October 8, 2015
    Publication date: October 6, 2016
    Inventors: Ming-Shi HUANG, Chang-Ming WANG, Kuan-Cheng CHEN, Ming-Chang CHOU
  • Patent number: 9455246
    Abstract: A fin diode structure and method of manufacturing the same is provided in present invention, which the structure includes a substrate, a doped well formed in the substrate, a plurality of fins of first conductivity type and a plurality of fins of second conductivity type protruding from the doped well, and a doped region of first conductivity type formed globally in the substrate between the fins of first conductivity type, the fins of second conductivity type, the shallow trench isolation and the doped well and connecting with the fins of first doped type and the fins of second doped type.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: September 27, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chang-Tzu Wang, Ping-Chen Chang, Tien-Hao Tang, Kuan-Cheng Su
  • Publication number: 20160256111
    Abstract: A biosensor of the invention is a capacitive noncontact sensor with two sensor channels split into a plurality of physically interdigitated symmetrical electrodes and shield sections. Two capacitive plates are electrically connected to the two sensor channels. The capacitive noncontact sensor is sized and packaged to be worn by a person to place the capacitive plates close to the skin of the person and form first and second channel input capacitors with the skin. A signal reconstruction circuit obtains a bio signal from the first and second channel input capacitors through the electrodes by reconstructing differences in the two sensor channels. The circuit includes different parasitic input capacitance in the two channels to create channel-specific outputs that depend on input coupling capacitance.
    Type: Application
    Filed: October 21, 2014
    Publication date: September 8, 2016
    Inventors: Chung-Kuan Cheng, Patrick Mercier, Shih-Hung Weng
  • Publication number: 20160260700
    Abstract: An electrostatic discharge protection semiconductor device includes a substrate, a gate set positioned on the substrate, a source region and a drain region formed in the substrate respectively at two sides of the gate set, at least a first doped region formed in the drain region, and at least a second doped region formed in the substrate. The source region and the drain region include a first conductivity type, the first doped region and the second doped region include a second conductivity type, and the first conductivity and the second conductivity type are complementary to each other. The first doped region and the second doped region are electrically connected to each other.
    Type: Application
    Filed: May 29, 2015
    Publication date: September 8, 2016
    Inventors: Chung-Yu Huang, Kuan-Cheng Su, Tien-Hao Tang, Ping-Chen Chang