Abstract: A circuit for driving an LCD panel and a method thereof is provided. The circuit utilizes a timing controller to receive a plurality of low-voltage differential signals (LVDS) provided by an image inverter, wherein the LVDS have a horizontal synchronize signal. The timing controller, based on the horizontal synchronize signal, undergoes a modulation and transmits a plurality of lamp operation controlling signals to an inverter controlling IC, wherein the frequencies of the lamp operation controlling signals are different from one another, thereby changing the frequency of the lamp operation of the inverter controlling IC used in the LCD panel.

Abstract: A shift register circuit includes plural stages of shift registers. Each stage of shift register includes a pull-up circuit, a control signal generator and a voltage-stabilizing circuit. The pull-up circuit is used for charging a first node. The control signal generator is electrically connected with the first node. According to a voltage level of the first node, a corresponding control signal is outputted from an output terminal of the control signal generator. The voltage-stabilizing circuit is electrically connected with the output terminal of the control signal generator for stabilizing the control signal from the control signal generator. Some circuits of some other shift registers are controlled according to the control signal.

Abstract: A semiconductor device and a method of manufacturing are provided. In some embodiments, a backside annealing process such that a first heat source is placed along a backside of the substrate. In other embodiments, the first heat source is used in combination with an anti-reflection dielectric (ARD) layer is deposited over the substrate. In yet other embodiments, a second heat source is placed along a front side of the substrate in addition to the first heat source placed on the backside of the substrate. In yet other embodiments, a heat shield may be placed between the substrate and the second heat source on the front side of the substrate. In yet further embodiments, a single heat source may be used on the front side of the substrate in combination with the ARD layer. A reflectivity scan may be performed to determine which anneal stage (RTA or MSA or both) to place thermal leveling solution.

Abstract: A waterproof structure for a housing of a portable electronic apparatus comprises a cover and an elastic pad. The cover comprises a pivot portion, and the cover is connected to the housing via the pivot portion such that the cover is capable of rotating in relation to the housing. The elastic pad comprises at least one protrusion structure, and the at least one protrusion structure is capable of inserting into a waterproof groove on the housing corresponding to the protrusion structure. When the cover is rotated to close the housing, the cover is capable of compressing the elastic pad to form a seal between the at least one protrusion structure and the waterproof groove.

Abstract: An exemplary shift register circuit includes a plurality of shift registers for sequentially outputting a plurality of driving pulse signals. Among each M number of the shift registers for sequentially outputting M number of the driving pulse signals, the shift register for lastly outputting one of the M number of driving pulse signals is enabled, by (M?1) number of start pulse signals sequentially outputted from the remained (M?1) number of the shift registers, to generate the driving pulse signal. Herein, M is a positive integer greater than 2. Moreover, a circuit structure of a shift register also is provided.

Abstract: An image signal processing system is presented, which includes a computer, a master image processing device, and at least one slave image processing device. The master image processing device is used for receiving an image signal. The master image processing device includes a master signal conversion device and a master signal output device. The master signal conversion device is used for converting the image signal into an instruction signal, and the master signal output device is used for outputting the instruction signal. The slave image processing device includes a slave signal input device, a slave signal conversion device, and a GPU. The slave signal input device is used for receiving the instruction signal. The slave signal conversion device is used for selectively converting the instruction signal into an image signal according to the instruction signal. The GPU is used for receiving the image signal and generating a broadcasting signal.

Abstract: A circuit for amplifying a display signal transmitted to a repair line by using a non-inverting amplifier is disclosed, which comprises a voltage follower, a non-inverting amplifier, a repair line, a thin film transistor (TFT) and a liquid crystal (LC) capacitor. The voltage follower is electrically connected to a data driver chip to thereby provide a display signal to the non-inverting amplifier. The non-inverting amplifier amplifies the display signal to thus obtain an amplified display signal, and transmits the amplified display signal to the TFT and the LC capacitor through the repair line. The amplified display signal is kept at a desired voltage level when the LC capacitor receives the amplified display signal.

Abstract: An electroluminescent display includes an electroluminescent panel, and at least one brightness enhanced film. The electroluminescent panel has a plurality of sub-pixels, and at least one illumination surface. The brightness enhanced film is disposed on the at least one illumination surface. The brightness enhanced film has a plurality of micro lenses, and the width of the micro lens is smaller than half of the minimum width of the sub-pixels.

Abstract: The present invention is related to derivatives of benzenesulfonamide represented by formula (I), and the pharmaceutical composition thereof. In addition, the benzenesulfonamide derivatives disclosed in the present invention can serve as potential cell cycle inhibitors, and thereby these benzenesulfonamide derivatives and the pharmaceutical composition thereof can be antitumor drug candidates, which might aim at cell cycle. Particularly, the benzenesulfonamide derivatives disclosed in the present invention may function as antitumor drugs to treat solid cancers.

Abstract: A method of forming an integrated circuit structure includes providing a wafer including a substrate and a semiconductor fin at a major surface of the substrate, and performing a deposition step to epitaxially grow an epitaxy layer on a top surface and sidewalls of the semiconductor fin, wherein the epitaxy layer includes a semiconductor material. An etch step is then performed to remove a portion of the epitaxy layer, with a remaining portion of the epitaxy layer remaining on the top surface and the sidewalls of the semiconductor fin.

Abstract: The present invention discloses an image processing method for feature retention associated with averaging processes. The image processing method comprises: scaling and aligning a plurality of image data for acquiring feature information; determining a plurality of two-dimensional feature label points according to the feature information for generating at least one Bezier curve; utilizing the at least one Bezier curve to generate at least one Bezier tube and performing Bezier tube fitting for generating result of Bezier tube fitting; deforming the plurality of image data according to the Bezier tube or the result of Bezier tube fitting for generating a plurality of deformed image data; and averaging the plurality of deformed image data for generating feature-preserved average image data. The present invention also provides an image processing system, a computer readable storage medium, and a computer program product, for implementing the image processing method.

Abstract: A circuit for amplifying a display signal transmitted to a repair line by using a non-inverting amplifier is disclosed, which comprises a voltage follower, a non-inverting amplifier, a repair line, a thin film transistor (TFT) and a liquid crystal (LC) capacitor. The voltage follower is electrically connected to a data driver chip to thereby provide a display signal to the non-inverting amplifier. The non-inverting amplifier amplifies the display signal to thus obtain an amplified display signal, and transmits the amplified display signal to the TFT and the LC capacitor through the repair line. The amplified display signal is kept at a desired voltage level when the LC capacitor receives the amplified display signal.

Abstract: An extension to USB includes an insulative tongue portion and a number of contacts held in the insulative tongue portion. The contacts have four conductive contacts and a plurality of differential contacts for transferring differential signals located behind/forward the four standard USB contacts along a front-to-rear direction. The four conductive contacts are adapted for USB 2.0 protocol and the plurality of differential contacts are adapted for non-USB 2.0 protocol. The extension to USB is capable of mating with a complementary standard USB 2.0 connector and a non-USB 2.0 connector, alternatively.

Abstract: The present disclosure provides a method of fabricating a semiconductor device that includes forming a plurality of fins, the fins being isolated from each other by an isolation structure, forming a gate structure over a portion of each fin; forming spacers on sidewalls of the gate structure, respectively, etching a remaining portion of each fin thereby forming a recess, epitaxially growing silicon to fill the recess including incorporating an impurity element selected from the group consisting of germanium (Ge), indium (In), and carbon (C), and doping the silicon epi with an n-type dopant.

Abstract: An extension to USB includes an insulative tongue portion and a number of contacts held in the insulative tongue portion. The contacts have four conductive contacts and a plurality of differential contacts for transferring differential signals located behind/forward the four standard USB contacts along a front-to-rear direction. The four conductive contacts are adapted for USB 2.0 protocol and the plurality of differential contacts are adapted for non-USB 2.0 protocol. The extension to USB is capable of mating with a complementary standard USB 2.0 connector and a non-USB 2.0 connector, alternatively.

Abstract: A service workflow generation apparatus, having a quality of service (QoS) monitor for obtaining a plurality of real time QoS values respectively corresponding to a plurality of service elements on the web. A QoS calculation module generates a plurality of possible service workflows composed of the service elements and a plurality of overall QoS values of the possible service workflows based on the real time QoS values by using a Modified Heuristic Algorithm. A service workflow selection module dynamically selects a service workflow from the possible service workflows according to the overall QoS value.

Abstract: A reference current generator circuit suitable for low-voltage applications is provided. The generator circuit is fabricated in a chip for generating a precise reference current based on a precise reference voltage and a precise external resistor. The generator circuit provides an equivalent resistance coupled in parallel with the external resistor to provide resistance compensation and reduce the impedance of seeing into the chip from a chip pad. In addition to the resistance compensation, only moderate capacitance compensation is required to enhance the phase margin of the generator circuit, so as to achieve a stable loop. Therefore, chip area and cost can be reduced in low-voltage applications. In addition, the generator circuit reproduces the reference current generated by the external resistor by utilizing current mirrors, so as to eliminate the effect on currents caused by parallel coupling of the equivalent resistance and the external resistor.

Abstract: The present disclosure provides a method of fabricating that includes providing a semiconductor substrate; forming a gate structure on the substrate; performing an implantation process to form a doped region in the substrate; forming spacers on sidewalls of the gate structure; performing an first etching to form a recess in the substrate, where the first etching removes a portion of the doped region; performing a second etching to expand the recess in the substrate, where the second etching includes an etchant and a catalyst that enhances an etching rate at a remaining portion of the doped region; and filling the recess with a semiconductor material.

Abstract: A light-emitting diode structure includes a base with a recessed portion, a light-emitting chip and a light-transmissive block. The light-emitting chip disposed in the recessed portion of the base and emits a light beam. The light-transmissive block disposed on the base covers the recessed portion and the light-emitting chip, so that the light beam emitted from the light-emitting chip is radiated outwardly via the light-transmissive block. The light-transmissive block is a flat-top multilateral cone including a bottom surface, a top surface, and several side surfaces connected to and located between the bottom surface and the top surface. A slot with a bottom portion is formed on the top surface of the light-transmissive block.

Abstract: An integrated circuit structure includes a fin field-effect transistor (FinFET) including a semiconductor fin over and adjacent to insulation regions; and a source/drain region over the insulation regions. The source/drain region includes a first and a second semiconductor region. The first semiconductor region includes silicon and an element selected from the group consisting of germanium and carbon, wherein the element has a first atomic percentage in the first semiconductor region. The first semiconductor region has an up-slant facet and a down-slant facet. The second semiconductor region includes silicon and the element. The element has a second atomic percentage lower than the first atomic percentage. The second semiconductor region has a first portion on the up-slant facet and has a first thickness. A second portion of the second semiconductor region, if any, on the down-slant facet has a second thickness smaller than the first thickness.