Abstract: Some embodiments relate to an integrated circuit (IC) including one or more finFET devices. A finFET includes a fin of semiconductor material extending upwards from a semiconductor substrate. First and second source/drain regions, which have a first doping type, are spaced apart laterally from one another in the fin. A channel region is disposed in the fin and physically separates the first and second source/drain regions from one another. The channel region has a second doping type opposite the first doping type. A conductive gate electrode straddles the fin about the channel region and is separated from the channel region by a gate dielectric. A shallow doped region, which has the first doping type, is disposed near a surface of the fin around upper and sidewall fin regions. The shallow doped region extends continuously under the gate electrode between outer edges of the gate electrode.

Abstract: The present invention provides a digital receiver configured to demodulate or decode a pulse-width modulated (PWM) signal from a transmitter. The receiver digitally demodulates or decodes the pulse-width modulated signal so as to obtain (binary) values of data modulated on pulse periods of the pulse-width modulated signal. The digital receiver includes multiple delay cells coupled to one another in series and a sampling circuit coupled to one of the delay cells. A sequential coupling of the delay cells composes a signal path, and each of the delay cells is designed to provide a corresponding delay to a corresponding input signal propagating along the signal path so as to generate a delayed signal as its output.

Abstract: A LED package including a transparent substrate, at least one LED chip, a first sealing layer and a second sealing layer is provided. The transparent substrate has a first surface and a second surface opposite the first surface. The LED chip is disposed on the first surface of the transparent substrate. The first sealing layer is disposed on the first surface of the transparent substrate and covers the LED chip. The second sealing layer is disposed on the second surface of the transparent substrate and overlaps with the LED chip in a direction perpendicular to the transparent substrate. The LED chip is used to emit a light beam. A portion of the light beam exits the LED package by passing through the transparent substrate and the second sealing layer. Moreover, an illuminating device including the aforementioned LED package is also provided.

Abstract: A capacitive touch sensor structure comprises a substrate, a first transmissive electrode, a first wire, a first receiving electrode and a second wire. The first transmissive electrode is disposed on the substrate and has at least one first electrode. The first wire is disposed on the substrate and connects to the first electrode of the first transmissive electrode. The first receiving electrode is disposed on the substrate and has at least one second electrode. The second wire is disposed on the substrate and extends along a first direction to connect to the first receiving electrode. The first electrode has a plurality of first slits and the second electrode has a plurality of second slits.

Abstract: An axial hybrid magnetic bearing (HMB) is disclosed herein. The HMB has a first electric magnet, a second electric magnet, and a rotor being between the two electric magnets. The rotor has a permanent magnet (PM) structure facing the two electric magnets by its two sides. By doing so, the power consumption can be lower by a bias magnetic flux provided by the PM structure; the equilibrium point of the rotor can be adjusted by the magnetic force of the two electric magnets, which will not change the magnetic characteristic of the PM structure.

Abstract: An apparatus and a method for frequency locking are provided. The apparatus includes a phase-locked loop (PLL), a local clock generator, a data buffer unit and a control unit. The PLL locks the phase and the frequency of a radio frequency signal to generate a recovery clock signal and received data. The data buffer unit writes the received data into an elastic buffer of the data buffer unit according to the frequency of the recovery clock signal, and reads the received data from the elastic buffer according to the frequency of a local clock signal generated by the local clock generator. The control unit obtains a write-in address and a read-out address in the elastic buffer, and sends a control signal to the local clock generator for adjusting the frequency of the local clock signal according to relationship between the write-in address and the read-out address.

Abstract: A LDMOS structure including a semiconductor substrate, a drain region, a lightly doped drain (LDD) region, a source region and a gate structure is provided. The substrate has a trench. The drain region is formed in the semiconductor substrate under the trench. A LDD region is formed in the semiconductor substrate at a sidewall of the trench. The source region is formed in the semiconductor substrate. The gate structure is formed on a surface of the semiconductor substrate above the LDD region between the drain region and the source region. A method for manufacturing the LDMOS structure is also provided.

Abstract: An integrated circuit structure includes a fin field-effect transistor (FinFET) including a semiconductor fin over and adjacent to insulation regions; and a source/drain region over the insulation regions. The source/drain region includes a first and a second semiconductor region. The first semiconductor region includes silicon and an element selected from the group consisting of germanium and carbon, wherein the element has a first atomic percentage in the first semiconductor region. The first semiconductor region has an up-slant facet and a down-slant facet. The second semiconductor region includes silicon and the element. The element has a second atomic percentage lower than the first atomic percentage. The second semiconductor region has a first portion on the up-slant facet and has a first thickness. A second portion of the second semiconductor region, if any, on the down-slant facet has a second thickness smaller than the first thickness.

Abstract: An apparatus and a method for frequency locking are provided. The apparatus includes a phase-locked loop (PLL), a local clock generator, a data buffer unit and a control unit. The PLL locks the phase and the frequency of a radio frequency signal to generate a recovery clock signal and received data. The data buffer unit writes the received data into an elastic buffer of the data buffer unit according to the frequency of the recovery clock signal, and reads the received data from the elastic buffer according to the frequency of a local clock signal generated by the local clock generator. The control unit obtains a write-in address and a read-out address in the elastic buffer, and sends a control signal to the local clock generator for adjusting the frequency of the local clock signal according to relationship between the write-in address and the read-out address.

Abstract: A capacitive touch sensor structure comprises a substrate, a first transmissive electrode, a first wire, a first receiving electrode and a second wire. The first transmissive electrode is disposed on the substrate and has at least one first electrode. The first wire is disposed on the substrate and connects to the first electrode of the first transmissive electrode. The first receiving electrode is disposed on the substrate and has at least one second electrode. The second wire is disposed on the substrate and extends along a first direction to connect to the first receiving electrode. The first electrode has a plurality of first slits and the second electrode has a plurality of second slits.

Abstract: A shift register circuit includes plural stages of shift registers. Each stage of shift register includes a pull-up circuit, a first driving circuit and a voltage-stabilizing circuit. The pull-up circuit is used for charging a first node. The first driving circuit is electrically connected with the first node. According to a voltage level of the first node, a corresponding control signal is outputted from an output terminal of the first driving circuit. The voltage-stabilizing circuit is electrically connected with the output terminal of the first driving circuit for stabilizing the control signal from the first driving circuit. Some circuits of some other shift registers are controlled according to the control signal.

Abstract: A lateral double-diffused metal-oxide-semiconductor transistor device includes a substrate having at least a shallow trench isolation formed therein, an epitaxial layer encompassing the STI in the substrate, a gate, and a drain region and a source region formed in the substrate at respective two sides of the gate. The epitaxial layer, the source region and the drain region include a first conductivity type. The gate includes a first portion formed on the substrate and a second portion extending into the STI.

Abstract: An integrated circuit structure includes a fin field-effect transistor (FinFET) including a semiconductor fin over and adjacent to insulation regions; and a source/drain region over the insulation regions. The source/drain region includes a first and a second semiconductor region. The first semiconductor region includes silicon and an element selected from the group consisting of germanium and carbon, wherein the element has a first atomic percentage in the first semiconductor region. The first semiconductor region has an up-slant facet and a down-slant facet. The second semiconductor region includes silicon and the element. The element has a second atomic percentage lower than the first atomic percentage. The second semiconductor region has a first portion on the up-slant facet and has a first thickness. A second portion of the second semiconductor region, if any, on the down-slant facet has a second thickness smaller than the first thickness.

Abstract: The present invention provides a digital receiver configured to demodulate or decode a pulse-width modulated (PWM) signal from a transmitter. The receiver digitally demodulates or decodes the pulse-width modulated signal so as to obtain (binary) values of data modulated on pulse periods of the pulse-width modulated signal. The digital receiver includes multiple delay cells coupled to one another in series and a sampling circuit coupled to one of the delay cells. A sequential coupling of the delay cells composes a signal path, and each of the delay cells is designed to provide a corresponding delay to a corresponding input signal propagating along the signal path so as to generate a delayed signal as its output.

Abstract: A method of enhancing 3D image information density, comprising providing a confocal fluorescent microscope and a rotational stage. 3D image samples at different angles are collected. A deconvolution process of the 3D image samples by a processing unit is performed. A registration process of the deconvoluted 3D image samples by the processing unit is performed. An interpolation process of the registered 3D image samples by the processing unit is performed to output a 3D image in high resolution.

Abstract: An optical toy is disclosed. The optical toy includes a frame, at least one emitting part, at least one receiving part, a plurality of light guiding parts, and at least one power source. The frame includes a container and at least one containing structure. The emitting part is movably located on the containing structure. The emitting part includes at least one light source for emitting light. The receiving part is movably located on the containing structure. The receiving part includes a light sensor for sensing the light. The plurality of light guiding parts is located in the container for changing the direction of the light. The relative positions of the plurality of light guiding parts can be changed. The power source is located in the frame for providing power to the optical toy.

Abstract: A lateral double-diffused metal-oxide-semiconductor transistor device includes a substrate having at least a shallow trench isolation formed therein, an epitaxial layer encompassing the STI in the substrate, a gate, and a drain region and a source region formed in the substrate at respective two sides of the gate. The epitaxial layer, the source region and the drain region include a first conductivity type. The gate includes a first portion formed on the substrate and a second portion extending into the STI.

Abstract: Methods and systems to support input output (IO) communications may include an IO connector having a housing with surfaces defining a paddle card region, and a set of compressible contacts extending vertically through the housing into the paddle card region. In addition, an IO interconnect can include a cable portion and at least one end portion coupled to the cable portion. The end portion may include a paddle card having a circuit board with a set of contacts disposed on a bottom surface of the circuit board. The end portion can also include an asymmetric metal shell having a configuration that encloses at least a portion of the paddle card and exposes the set of contacts.

Abstract: An apparatus is described herein. The apparatus includes a receptacle to receive a plug to couple a peripheral device to a computing device. The apparatus includes a ground contact of a printed circuit board of the computing device. The apparatus includes a shield communicatively coupled to the ground contact, wherein the shield is to reduce radio frequency interference (RFI) from an interface between the plug and the receptacle.

Abstract: An illuminable building block is disclosed. The illuminable building block has a cell body, at least one circuit board, at least one illuminating device, at least one photo sensing device, at least one circuit control module, and at least one assembly portion. The cell body has an accommodating space, and the circuit board is located therein. The at least one illuminating device is disposed at the inner surface of the circuit board, and each photo sensing device corresponds to at least one illuminating device. The at least one circuit control module is used for illuminating the illuminating device.