Patents by Inventor Kuei-Wei Huang

Kuei-Wei Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140374922
    Abstract: A method includes aligning a top package to a bottom package using an alignment mark in the bottom package, and placing the top package over the bottom package, wherein the top package is aligned to the bottom package after the placing the top package over the bottom package. A reflow is then performed to bond the top package to the bottom package.
    Type: Application
    Filed: June 19, 2013
    Publication date: December 25, 2014
    Inventors: Kuei-Wei Huang, Chih-Wei Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20140367867
    Abstract: An embodiment is a method including forming a first package and a second package. The first package includes packaging a first die, forming a plurality of solder balls on the first die, and coating the plurality of solder balls with an epoxy flux. The second package includes forming a first electrical connector, attaching a second die adjacent the first electrical connector, forming a interconnect structure over the first die and the first electrical connector, the interconnect structure being a frontside of the second package, forming a second electrical connector over the interconnect structure, and the second electrical connector being coupled to both the first die and the first electrical connector. The method further includes bonding the first package to the backside of the second package with the plurality of solder balls forming a plurality of solder joints, each of the plurality of solder joints being surrounded by the epoxy flux.
    Type: Application
    Filed: August 29, 2014
    Publication date: December 18, 2014
    Inventors: Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu, Wei-Yu Chen, Hsiu-Jen Lin, Kuei-Wei Huang
  • Patent number: 8900922
    Abstract: A method includes laminating a Non-Conductive Film (NCF) over a first package component, and bonding a second package component on the first package component. The NCF and the second package component are on a same side of the first package component. Pillars of a mold tool are then forced into the NCF to form openings in the NCF. The connectors of the first package component are exposed through the openings.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: December 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chung Lin, Kuei-Wei Huang, Ai-Tee Ang, Tsai-Tsung Tsai, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20140331462
    Abstract: Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.
    Type: Application
    Filed: July 23, 2014
    Publication date: November 13, 2014
    Inventors: Wen-Hsiung Lu, Ming-Da Cheng, Wei-Hung Lin, Kuei-Wei Huang, Chih-Wei Lin, Chun-Cheng Lin, Chung-Shi Liu
  • Patent number: 8884431
    Abstract: Packaging methods and structures for semiconductor devices are disclosed. In one embodiment, a packaged semiconductor device includes a redistribution layer (RDL) having a first surface and a second surface opposite the first surface. At least one integrated circuit is coupled to the first surface of the RDL, and a plurality of metal bumps is coupled to the second surface of the RDL. A molding compound is disposed over the at least one integrated circuit and the first surface of the RDL.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wei Lin, Ming-Da Cheng, Wen-Hsiung Lu, Hsiu-Jen Lin, Bor-Ping Jang, Chung-Shi Liu, Mirng-Ji Lii, Chen-Hua Yu, Meng-Tse Chen, Chun-Cheng Lin, Yu-Peng Tsai, Kuei-Wei Huang, Wei-Hung Lin
  • Patent number: 8878352
    Abstract: A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: November 4, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Cheng Lin, Chung-Shi Liu, Kuei-Wei Huang, Cheng-Ting Chen, Wei-Hung Lin, Ming-Da Cheng
  • Patent number: 8846448
    Abstract: The present disclosure relates to a tool arrangement and method to reduce warpage within a package-on-package semiconductor structure, while minimizing void formation within an electrically-insulating adhesive which couples the packages. A pressure generator and a variable frequency microwave source are coupled to a process chamber which encapsulates a package-on-package semiconductor structure. The package-on-package semiconductor structure is simultaneously heated by the variable frequency microwave source at variable frequency, variable temperature, and variable duration and exposed to an elevated pressure by the pressure generator. This combination for microwave heating and elevated pressure limits the amount of warpage introduced while preventing void formation within an electrically-insulating adhesive which couples the substrates of the package-on-package semiconductor structure.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: September 30, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Tse Chen, Wei-Hung Lin, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20140264856
    Abstract: A package includes a package component, which further includes a top surface and a metal pad at the top surface of the package component. The package further includes a non-reflowable electrical connector over and bonded to the metal pad, and a molding material over the package component. The non-reflowable electrical connector is molded in the molding material and in contact with the molding material. The non-reflowable electrical connector has a top surface lower than a top surface of the molding compound.
    Type: Application
    Filed: June 19, 2013
    Publication date: September 18, 2014
    Inventors: Kuei-Wei Huang, Chih-Wei Lin, Hsiu-Jen Lin, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 8809117
    Abstract: Packaging process tools and packaging methods for semiconductor devices are disclosed. In one embodiment, a packaging process tool for semiconductor devices includes a mechanical structure including a frame. The frame includes a plurality of apertures adapted to retain a plurality of integrated circuit dies therein. The frame includes at least one hollow region.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: August 19, 2014
    Assignee: Taiwain Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Hsiung Lu, Ming-Da Cheng, Wei-Hung Lin, Kuei-Wei Huang, Chih-Wei Lin, Chun-Cheng Lin, Chung-Shi Liu
  • Publication number: 20140183732
    Abstract: The described embodiments of mechanisms of forming a die package and package on package (PoP) structure involve forming a solder paste layer over metal balls of external connectors of a die package. The solder paste layer protects the metal balls from oxidation. In addition, the solder paste layer enables solder to solder bonding with another die package. Further, the solder paste layer moves an intermetallic compound (IMC) layer formed between the solder paste layer and the metal balls below a surface of a molding compound of the die package. Having the IMC layer below the surface strengthens the bonding structure between the two die packages.
    Type: Application
    Filed: June 12, 2013
    Publication date: July 3, 2014
    Inventors: Kuei-Wei Huang, Wei-Yu Chen, Meng-Tse Chen, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20140124955
    Abstract: A semiconductor device includes a first package component and a second package component. The first package component has a first die formed on a first substrate. A second package component has a second die formed on a second substrate. A thermal isolation material is attached on the first die, wherein the thermal isolation material thermally insulates the second die from the first die, and the thermal isolation material has a thermal conductivity of from about 0.024 W/mK to about 0.2 W/mK. A first set of conductive elements couples the first package component to the second package component.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Inventors: Meng-Tse CHEN, Kuei-Wei HUANG, Tsai-Tsung TSAI, Ai-Tee ANG, Ming-Da CHENG, Chung-Shi LIU
  • Patent number: 8702871
    Abstract: A method includes generating a solvent-containing vapor that contains a solvent. The solvent-containing vapor is conducted to a package assembly to clean the package assembly. The solvent-containing vapor condenses to form a liquid on a surface of the package assembly, and flows off from the surface of the package assembly.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: April 22, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Li Hsiao, Bor-Ping Jang, Kuei-Wei Huang, Lin-Wei Wang, Chien Ling Hwang, Chung-Shi Liu
  • Publication number: 20140091509
    Abstract: A method includes dispensing an underfill between a first package component and a second package component, wherein the first package component is placed on a lower jig, and the second package component is over and bonded to the first package component. A through-opening is in the lower jig and under the first package component. The underfill is cured, wherein during the step of curing the underfill, a force is applied to flatten the first package component. The force is applied by performing an action selected from the group consisting of vacuuming and air blowing through the through-opening.
    Type: Application
    Filed: December 4, 2013
    Publication date: April 3, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Tse Chen, Chun-Cheng Lin, Kuei-Wei Huang, Yu-Peng Tsai, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20140045300
    Abstract: The present disclosure relates to a tool arrangement and method to reduce warpage within a package-on-package semiconductor structure, while minimizing void formation within an electrically-insulating adhesive which couples the packages. A pressure generator and a variable frequency microwave source are coupled to a process chamber which encapsulates a package-on-package semiconductor structure. The package-on-package semiconductor structure is simultaneously heated by the variable frequency microwave source at variable frequency, variable temperature, and variable duration and exposed to an elevated pressure by the pressure generator. This combination for microwave heating and elevated pressure limits the amount of warpage introduced while preventing void formation within an electrically-insulating adhesive which couples the substrates of the package-on-package semiconductor structure.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 13, 2014
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Meng-Tse Chen, Wei-Hung Lin, Kuei-Wei Huang, Tsai-Tsung Tsai, Ai-Tee Ang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20140008786
    Abstract: A device comprises a first package component, and a first metal trace and a second metal trace on a top surface of the first package component. The device further includes a dielectric mask layer covering the top surface of the first package component, the first metal trace and the second metal trace, wherein the dielectric mask layer has an opening therein exposing the first metal trace. The device also includes a second package component and an interconnect formed on the second package component, the interconnect having a metal bump and a solder bump formed on the metal bump, wherein the solder bump contacts the first metal trace in the opening of the dielectric mask layer.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 9, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Tse Chen, Wei-Hung Lin, Chih-Wei Lin, Kuei-Wei Huang, Hui-Min Huang, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 8616433
    Abstract: A method of forming a bump structure includes providing a first work piece including a dielectric layer having a top surface; placing a second work piece facing the first work piece; placing a heating tool contacting the second work piece; and heating the second work piece using the heating tool to perform a reflow process. A first solder bump between the first and the second work pieces is melted to form a second solder bump. Before the second solder bump solidifies, pulling the second work piece away from the first work piece, until an angle formed between a tangent line of the second solder bump and the top surface of the dielectric layer is greater than about 50 degrees, wherein the tangent line is drawn at a point where the second solder bump joins the dielectric layer.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 31, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuei-Wei Huang, Wei-Hung Lin, Lin-Wei Wang, Bor-Ping Jang, Ming-Da Cheng, Chung-Shi Liu
  • Publication number: 20130334710
    Abstract: A system and method for forming contacts is provided. An embodiment comprises forming the contacts on a substrate and then coining the contacts by physically shaping them using, e.g., a molding chamber. The physical shaping of the contacts may be performed using a patterned portion of the molding chamber or else by placing a patterned stencil around the contacts prior before a force is applied to physically reshape the contacts. The contacts may be reshaped into a cylindrical, oval, cuboid, or rectangular shape, for example.
    Type: Application
    Filed: August 21, 2013
    Publication date: December 19, 2013
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Wei-Hung Lin, Kuei-Wei Huang, Chih-Wei Lin, Chih Chun Chiu, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 8609462
    Abstract: A method includes dispensing an underfill between a first package component and a second package component, wherein the first package component is placed on a lower jig, and the second package component is over and bonded to the first package component. A through-opening is in the lower jig and under the first package component. The underfill is cured, wherein during the step of curing the underfill, a force is applied to flatten the first package component. The force is applied by performing an action selected from the group consisting of vacuuming and air blowing through the through-opening.
    Type: Grant
    Filed: October 12, 2011
    Date of Patent: December 17, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Chun-Cheng Lin, Kuei-Wei Huang, Yu-Peng Tsai, Wei-Hung Lin, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 8603860
    Abstract: A method includes loading a first package component on a concave boat, and placing a second package component over the first package component. A load clamp is placed over the second package component, wherein the load clamp is supported by a temperature-variable spacer of the concave boat. A reflow step is performed to bond the second package component to the first package component. During a temperature-elevation step of the reflow step, the temperature-variable spacer is softened in response to an increase in temperature, and a height of the softened temperature-variable spacer is reduced, until the load clamp is stopped by a rigid spacer of the concave boat.
    Type: Grant
    Filed: October 24, 2011
    Date of Patent: December 10, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, L.L.C.
    Inventors: Meng-Tse Chen, Kuei-Wei Huang, Wei-Hung Lin, Wen-Hsiung Lu, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 8586408
    Abstract: A system and method for forming contacts is provided. An embodiment comprises forming the contacts on a substrate and then coining the contacts by physically shaping them using, e.g., a molding chamber. The physical shaping of the contacts may be performed using a patterned portion of the molding chamber or else by placing a patterned stencil around the contacts prior before a force is applied to physically reshape the contacts. The contacts may be reshaped into a cylindrical, oval, cuboid, or rectangular shape, for example.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: November 19, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Meng-Tse Chen, Wei-Hung Lin, Kuei-Wei Huang, Chih-Wei Lin, Chih Chun Chiu, Ming-Da Cheng, Chung-Shi Liu